Prosecution Insights
Last updated: October 02, 2026

Examiner: KEAGY, ROSE ALYSSA

Tech Center 2800 • Art Units: 2818

This examiner grants 93% of resolved cases

Analysis

Rose Alyssa Keagy is an examiner in Tech Center 2800 and Art Unit 2818. Her record includes 44 resolved cases with an allowance rate of 93.2 percent. This rate suggests that most applications assigned to her result in a patent grant. The median days to allowance is 1156, which provides a timeline for when these grants typically occur. This duration is an important factor for applicants to consider in their planning.

The interview lift of 10.7 percent indicates that interviews provide a boost to the probability of success. While the 93.2 percent allowance rate is already high, the 10.7 percent lift shows that verbal engagement can still be a useful tool for resolving remaining issues. With 44 resolved cases, the examiner has shown a consistent tendency toward allowance. Practitioners should plan for a 1156-day median timeline but can be confident in the likelihood of a positive outcome, especially when utilizing the 10.7 percent interview lift to supplement written prosecution.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

93.2%
Allow Rate
+25.2% vs TC avg
58
Total Applications
+10.7%
Interview Lift
1156
Avg Prosecution Days
Based on 44 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
25.8%
§102 Novelty
63.1%
§103 Obviousness
10.7%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18796684 IMAGE SENSOR Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18772310 SEMICONDUCTOR PACKAGE Non-Final OA Samsung Electronics Co., Ltd.
18389699 SEMICONDUCTOR PACKAGE Final Rejection SAMSUNG ELECTRONICS CO., LTD.
18215985 SEMICONDUCTOR DEVICE INCLUDING BACKSIDE CONTACT STRUCTURE Final Rejection SAMSUNG ELECTRONICS CO., LTD.
18304659 INTEGRATED CIRCUITS WITH MONOLAYER TMD CHANNEL AND MULTILAYER TMD SOURCE AND DRAIN Non-Final OA Intel Corporation
19185707 SEMICONDUCTOR STRUCTURE WITH CRACK-BLOCKING THREE-DIMENSIONAL STRUCTURE Non-Final OA Murata Manufacturing Co., Ltd.
18519256 METHOD FOR OBTAINING AN INTEGRATED DEVICE COMPRISING USING AN ETCHING MASK TO DEFINE DICING LINES Final Rejection Murata Manufacturing Co., Ltd.
18216749 ORTHOGONAL BRIDGE PACKAGING TECHNOLOGY Non-Final OA International Business Machines Corporation
18360666 PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18340843 ACTIVE REGION TRIMMING AFTER FORMATION OF SOURCE/DRAIN COMPONENTS Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18766767 Self-Aligned Contact Hard Mask Structure of Semiconductor Device and Method of Forming Same Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18404266 INTEGRATED CIRCUIT PACKAGE AND METHOD Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18491237 MAGNETIC BONDING STRUCTURE AND METHOD OF FORMING SAME Final Rejection Taiwan Semiconductor Manufacturing Co., Ltd.
18768925 SEMICONDUCTOR DEVICE Non-Final OA ROHM CO., LTD.
18738727 SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE Non-Final OA ROHM CO., LTD.
18593863 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME Non-Final OA NANYA TECHNOLOGY CORPORATION

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