DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant election of group I, claims 1-12 and 17-24, without traverse. Applicant cancelled Claims 13-16.
Claim Rejections - 35 USC § 112
Claim 22 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 22 depend of the cancelled Claim 20. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claim(s) 1, 2 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over HUNG et al. (US 2020/0350357), (hereinafter, HUNG) in view of Tu et al. (US 2011/0291215), (hereinafter, Tu) and in Further view of TAN et al. (US 2020//0161351), (hereinafter, TAN).
PNG
media_image1.png
431
1050
media_image1.png
Greyscale
RE Claim 1, HUNG discloses in FIGS. 1-5 discloses a sensor package structure and a sensing module. HUNG discloses a package comprising:
a package substrate 1 having top and bottom major package substrate 1 surfaces, the top major package surface includes a die region, referring to the annotated FIG. 1 above;
a die “sensor chip” attached to the die region “chip bonding region”, the die “sensor chip” includes a first major die surface, the first major die surface includes a sensor region with a sensor “sensor chip”, a cover adhesive region 4 “light curing layer” surrounding the sensor region, referring to FIG. 1. Examiner notes that the light-curing layer is a UV cured material, which implies that the material is adhesive cured by UV [0027], hence meeting the claimed limitation;
a second major surface, the second major surface 11 is attached to the die region of the top major package surface 1, referring to FIG. 1;
a cover attached 5 “light-permeable layer” to the first major die 2 “sensor chip” surface, the cover includes top and bottom major cover surfaces and side cover surfaces, the cover comprises an opaque region 6 disposed at a periphery of the bottom major cover surface of the cover 5 [0030], the opaque region is configured to prevent flaring or scattering of light [0032], and
a cover bond region on a bottom major cover surface, the bottom major cover surface faces the die “sensor chip”, referring to FIG. 2;
a cover adhesive 4, the cover adhesive is configured to attach the cover to the die to form a sealed cavity “E” between the cover 5 and sensor region, referring to FIGS. 1 and 2,
wherein the adhesive 4 contacts the cover bond region on the bottom major cover surface and the cover adhesive region on the first major die surface, referring to FIGS. 1 and 2; and
an encapsulant 7, the encapsulant covers exposed portions of the package substrate 1, die and bond wires 3 and side surfaces of the cover while leaving the first major cover surface exposed, referring to FIG. 1.
HUNG does not disclose a semiconductor package, however in the same field of endeavor, Tu discloses a wafer level silicon-based, i.e. semiconductor-based, image sensor packaging structure and a manufacturing method for the same.
Therefore, it would have been obvious for one of ordinary skill in the art, at the effective filing date of the instant application, to have the sensor chip of HUNG to be made of semiconductor silicon-based, as a well-known material for image sensors, hence achieving cost effective image sensing.
Furthermore, HUNG does not disclose wherein the opaque region comprises a recessed structure at the periphery of the bottom major cover surface.
However, in the same field of endeavor, TAN discloses in FIG. 1gii a method involves providing a package substrate having top and bottom major package substrate surfaces. The top major package surface includes a die attach region. A die (130) is attached onto the die attach region. The die includes first and second major die surfaces (130a, 130b). The first major die surface includes a cover adhesive region surrounding the die active region. A protective cover (150) is attached with first and second major cover surfaces and side surfaces to the die using the cover adhesive (140). The protective cover includes a discontinuity 160 “a recess” on one of the side surfaces. An encapsulant (170) is deposited on the package substrate. The encapsulant covers exposed portions of the package substrate, die and bond wires (132) and side surfaces of the protective cover while leaving the first major cover surface exposed. The discontinuity “recess” 160 enhances adhesion of the encapsulant to the protective cover.
Therefore, it would have been obvious for one of ordinary skill in the art, at the effective filing date of the instant application to include a recessed structure at the periphery of the bottom major cover surface in the opaque region similar to the discontinuity 160 of TAN in order to enhance adhesion of the opaque material layer to the protective cover as disclosed by TAN [0050].
RE Claim 2, HUNG in view Tu discloses semiconductor package, wherein the opaque region comprises an opaque coating 6 disposed on the opaque region, referring to FIG. 2.
RE Claim 6, HUNG in view Tu discloses semiconductor package, wherein the opaque region 6 having a width in the transverse direction, inwardly from the side cover surfaces, wherein the width is within a range of ½ to ⅔ of the first distance, hence the opaque region width is a result effective variable.
HUNG in view Tu does not disclose semiconductor package, opaque region 6 extends inwardly from the side cover surfaces about 25-50 mm beyond the cover adhesive.
Therefore, it would have been obvious to one having ordinary skill in the art at the effective filing date of the instant application to use the claimed spacing, absent unexpected result, and the width opaque region width is a result effective variable, since it has been held that discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233; In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980); In re Huang, 100 F.3d 135, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996).
Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over HUNG et al. (US2020/0350357), (hereinafter, HUNG) in view of TAN et al. (US 2020//0161351), (hereinafter, TAN).
RE Claim 21, HUNG cover 5 comprising:
a top cover surface, and a bottom cover surface, wherein the top and bottom cover surfaces are parallel planar surfaces, and side cover surfaces, referring to FIG. 1 and
wherein the bottom cover surface comprises an opaque region 6 disposed at a periphery of the bottom cover surface, referring to FIG. 1, and the opaque region 6 is configured to prevent flaring or scattering of light, which is an inherent property of an optically opaque region.
HUNG does not disclose the opaque region comprises a recessed structure below the periphery of the bottom cover surface, an opaque coating is disposed in the recessed structure.
However, However, in the same field of endeavor, TAN discloses in FIG. 1gii a method involves providing a package substrate having top and bottom major package substrate surfaces. The top major package surface includes a die attach region. A die (130) is attached onto the die attach region. The die includes first and second major die surfaces (130a, 130b). The first major die surface includes a cover adhesive region surrounding the die active region. A protective cover (150) is attached with first and second major cover surfaces and side surfaces to the die using the cover adhesive (140). The protective cover includes a discontinuity 160 “a recess” on one of the side surfaces. An encapsulant (170) is deposited on the package substrate. The encapsulant covers exposed portions of the package substrate, die and bond wires (132) and side surfaces of the protective cover while leaving the first major cover surface exposed. The discontinuity “recess” 160 enhances adhesion of the encapsulant to the protective cover.
Therefore, it would have been obvious for one of ordinary skill in the art, at the effective filing date of the instant application to include a recessed structure at the periphery of the bottom major cover surface in the opaque region similar to the discontinuity 160 of TAN in order to enhance adhesion of the opaque material layer to the protective cover as disclosed by TAN [0050].
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over HUNG et al. (US2020/0350357), (hereinafter, HUNG) in view of Tu et al. (US 2011/0291215), (hereinafter, Tu) and in further view of TAN et al. (US 2020//0161351), (hereinafter, TAN) and Ishinaga (US 20020134988), (hereinafter, Ishinaga).
RE Claim 5, HUNG in view of Tu discloses the opaque coating comprises an epoxy mold compound layer, a liquid crystal polymer (LCP) layer, an ink layer, or a solder mask.
However, in a related art, Ishinaga discloses a chip-type light-emitting device with case (10) includes an LED chip (12) which is bonded onto electrodes (16a, 16b) formed on a substrate (14). A case (20) is arranged such that the LED chip 12 is surrounded by a hole (22), wherein a liquid crystal polymer (opaque resin) 20a as described above and an impregnation prevention layer 20b.
Therefore, it would have been obvious for one of ordinary skill in the art, at the effective filing date of the instant application to use the liquid crystal polymer as the opaque coating for Hung’s package in order to prevent flaring and light penetration unto the package.
Claim(s) 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over HUNG et al. (US2020/0350357), (hereinafter, HUNG) in view TAN et al. (US 2020//0161351), (hereinafter, TAN) and in further view of Ishinaga (US 20020134988), (hereinafter, Ishinaga).
RE Claim 23, HUNG in view of TAN discloses the opaque coating comprises an epoxy mold compound layer, a liquid crystal polymer (LCP) layer, an ink layer, or a solder mask.
However, in a related art, Ishinaga discloses a chip-type light-emitting device with case (10) includes an LED chip (12) which is bonded onto electrodes (16a, 16b) formed on a substrate (14). A case (20) is arranged such that the LED chip 12 is surrounded by a hole (22), wherein a liquid crystal polymer (opaque resin) 20a as described above and an impregnation prevention layer 20b.
Therefore, it would have been obvious for one of ordinary skill in the art, at the effective filing date of the instant application to use the liquid crystal polymer as the opaque coating for Hung’s package in order to prevent flaring and light penetration unto the package.
Allowable Subject Matter
Claims 7-12, 17, 18 and 24 are allowed.
Claims 3, 4, 25 and 26 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YASSER ABDELAZIEZ whose telephone number is (571)270-5783. The examiner can normally be reached Monday - Friday 9 am - 6 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571)270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/YASSER A ABDELAZIEZ, PhD/Primary Examiner, Art Unit 2898