DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statement (IDS) submitted on 08/31/2023 is in compliance with provisions of 37 CFR 1.97. Accordingly, the information disclosure is being considered by the Examiner.
Election/Restrictions
The Applicant elected (see Response to Election, filed 09/25, 2025) without traverse the Invention I drawn to a device, an integrated biosensor structure recites in Claim(s) 1-16. Claim(s) 17-20 are canceled. New Claim(s) 21-24 are accepted based on their merits and are further entered.
Response to Amendment
The amendment with respect to claims 1-16 filed on 09/25/2025 has been fully considered for examination based on their merits. New claims 21-24 have been considered. Claims 17-20 are canceled.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 8, 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chun-Wen Cheng et al, (hereinafter CHENG), US 20160178568 A1, in view of Sin-Yao Huang et al, (hereinafter HUANG), US 20200152675 A1, further in view of Amit Lal et al, (hereinafter LAL), US 20140355381 A1, and further in view of Keith G. Fife, (hereinafter FIFE), US 20140193938 A1.
Regarding Claim 1, CHENG teaches an integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), comprising:
a CMOS structure (Figs. 4/9, 202/902, the sensing device/MOS transistor, [0044]), comprising:
a substrate (Fig. 4, 102, semiconductor substrate) having a first surface (annotated Figure 4), the substrate comprises a sensing region (annotated Figure 4) and a logic region surrounding the sensing region (annotated Figure 4);
a front-end-of-line (FEOL) structure (annotated Figure 4) having a plurality of doped regions (annotated Figure 4, S/D regions on the sensing device region 202, and S/D regions for the logic device region) at the first surface of the substrate; and
a back-end-of-line (BEOL) structure (annotated Figure 4, 402, BEOL metal stack) over the FEOL structure (annotated Figure 4), the BEOL structure comprises a first trench (Fig. 4, 406, sensing well, [0035]) penetrating the BEOL structure; and
a sensing oxide layer (Fig. 4, 404, sensing enhancement layer may comprise a high-k dielectric layer, [0035], [0050]) over the BEOL structure and in contact with the sensing region of the substrate through the first trench (annotated Figure 4);
wherein the sensing oxide layer (Fig. 4, 404, sensing enhancement layer may comprise a high-k dielectric layer, [0035], [0050]) is conformal (annotated Figure 4; 406h/406v, horizontal sensing surface/vertical sensing surface, [0035]) with the first trench of the BEOL (annotated Figure 4, 402, BEOL metal stack) structure to form a sensing trench (Fig. 4, 406, sensing well, [0035]).
PNG
media_image1.png
1117
1145
media_image1.png
Greyscale
CHENG does not explicitly disclose or show an integrated biosensor structure, comprising: logic region surrounding the sensing region.
HUANG teaches in Figures 1-3, an integrated biosensor structure (Figs. 1-3, 100a, IC: integrated circuit, [0028]) comprising: logic region (Figs. 1-3, 106) surrounding the sensing region (Figs. 1-3, 102, image sensor region).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified CHENG to incorporate the teachings of HUANG, such that an integrated biosensor structure, comprising: logic region surrounding the sensing region, so that if present, the logic region, can include logic devices to support the operation of the sensing device region (HUANG, [0027]).
CHENG as modified by HUANG does not explicitly disclose or show an integrated biosensor structure, comprising: a front-end-of-line (FEOL) structure at the first surface of the substrate; and a back-end-of-line (BEOL) structure over the FEOL structure.
LAL teaches in Figures 1A, an integrated biosensor structure (Fig. 1A, 10, conventional CMOS IC chip design, [0098]) comprising: a front-end-of-line (FEOL), structure (Fig. 1A, FEOL, [0098]) at the first surface of the substrate (Fig. 1A, top surface of the bulk semiconductor (e.g. Silicon), [0098]); and a back-end-of-line (BEOL) structure (Fig. 1A, BEOL, [0098]) over the FEOL structure.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG to incorporate the teachings of LAL, such that an integrated biosensor structure, comprising: a front-end-of-line (FEOL) structure at the first surface of the substrate; and a back-end-of-line (BEOL) structure over the FEOL structure, so that a back-end-of-line (BEOL) portion to provide the hardwiring connects within each circuit element and hardwiring interconnects between the discrete circuit elements in the FEOL portion, such as metal contacts or lines (LAL, Fig. 1A, [0098]).
CHENG as modified by HUANG and LAL, CHENG further teaches S/D regions within the sensing device region and logic region. However, CHENG as modified by HUANG and LAL does not explicitly disclose an integrated biosensor structure, comprising: a front-end-of-line (FEOL) structure having a plurality of doped regions at the first surface of the substrate.
FIFE teaches in Figure 5, an integrated biosensor structure (Fig. 5, 500, chemically sensitive sensor, [0033]) comprising: a front-end-of-line (FEOL) structure (Fig. 5, 505, substrate portion, [0034]) having a plurality of doped regions (Fig. 5, N+ doped regions, 591 (Source) and 595, drain, [0034]) at the first surface of the substrate (Fig. 5, 599).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG and LAL to incorporate the teachings of FIFE, such that an integrated biosensor structure, comprising: a front-end-of-line (FEOL) structure having a plurality of doped regions at the first surface of the substrate, so that the parasitic capacitance may be manipulated by addition of lightly doped regions 591′ and/or 595′ and therefore such doping processes enable to enhance operation of ISFET which is based on the modulation of charge concentration and thus channel conductance (FIFE, [0034]).
Regarding Claim 2, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the sensing oxide layer (Fig. 4, 404, sensing enhancement layer may comprise a high-k dielectric layer, [0035], [0050]) comprises hafnium oxide (Figs. 2/4, 212/404, sensing enhancement layer, may comprise hafnium oxide (HfO2), [0023]).
Regarding Claim 8, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 2A, 200, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the sensing trench (Fig. 2A, 214, sensing well) is configured to in contact with a fluidic biomedical sample (Fig. 2A, 218a, micro-fluidic channel, [0026-0028]).
Regarding Claim 21, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), further comprising a first gate oxide (Fig. 2A, 202e) over the sensing region (Fig. 2A, 202) of the substrate (Fig. 2A 102).
FIFE further teaches in Figure 5, an integrated biosensor structure (Fig. 5, 500, chemically sensitive sensor, [0033]), wherein each of the doped regions (N+ doped regions, 591/595) within the sensing region (annotated Figure 5) are covered by the first gate oxide (annotated Figure 5, [0005-0007]).
PNG
media_image2.png
922
764
media_image2.png
Greyscale
Claim(s) 3, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, and further in view of FIFE, and further in view of Lirong Xue et al, (hereinafter XUE, CN 107449812 A.
Regarding Claim 3, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein each of the doped regions (annotated Figure 4, S/D regions on the sensing device region 202, and S/D regions for the logic device region) free from in contact with the sensing oxide layer (Fig. 4, 404, sensing enhancement layer may comprise a high-k dielectric layer, [0035], [0050]).
FIFE further teaches in Figure 5, an integrated biosensor structure (Fig. 5, 500, chemically sensitive sensor, [0033]), wherein each of the doped regions (Fig. 5, N+ doped regions, 591 (Source) and 595, drain, [0034]) free from in contact with the sensing oxide layer (Fig. 5, 515, oxide layer, [0005]).
PNG
media_image3.png
1117
1145
media_image3.png
Greyscale
CHENG as modified by HUANG, LAL and FIFE does not explicitly disclose the integrated biosensor structure, wherein each of the doped regions free from in contact with the sensing oxide layer is covered by a silicide layer.
XUE teaches in Figure 2, the integrated biosensor structure (Figs. 2/5, on-chip integrated electrode structure/biochemical sensor chip through CMOS process, [0020], [0027]), wherein each of the doped regions (Fig. 2, N+ doped Source and N+ doped drain, [0030]) free from in contact with the sensing oxide layer (annotated Figure 2, Field oxide, [0011]) is covered by a silicide layer (Fig. 2, silicide layer, [0014]).
PNG
media_image4.png
587
926
media_image4.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL and FIFE to incorporate the teachings of XUE, such that an integrated biosensor structure, wherein each of the doped regions free from in contact with the sensing oxide layer is covered by a silicide layer, so that the bias voltage is provided to the silicon substrate through a very thin layer of dielectric material such as silicon dioxide and the layer of silicide act as a conductor to reduce the gate resistance, so that the polysilicon layer no longer has semiconductor properties (XUE, [0006]).
Regarding Claim 9, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]).
CHENG as modified by HUANG, LAL and FIFE does not explicitly disclose the integrated biosensor structure, further comprising an electrode disposed over the sensing trench, the electrode is configured to in contact with a medium located in the sensing trench.
XUE teaches in Figure 2, the integrated biosensor structure (Figs. 2/5, on-chip integrated electrode structure/biochemical sensor chip through CMOS process, [0020], [0027]) of claim 1, further comprising an electrode (annotated Figure 2, electrical materials) disposed over the sensing trench (annotated Figure 2), the electrode is configured to in contact with a medium (Fig. 2, electrolyte) located in the sensing trench (annotated Figure 2).
PNG
media_image5.png
661
938
media_image5.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL and FIFE to incorporate the teachings of XUE, such that an integrated biosensor structure, further comprising an electrode disposed over the sensing trench, the electrode is configured to in contact with a medium located in the sensing trench, so that the polysilicon channel area is exposed to connect to the electrolyte solution, and the gate voltage is provided to the polysilicon channel through the electrode in contact with the solution to achieve high reliability of biochemical sensors and significantly reduce errors (XUE, [0008-0010]).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, and further in view of FIFE, and further in view of James Bustillo et al, (hereinafter BUSTILLO), US 20140191293 A1.
Regarding Claim 4, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), further comprising a first gate oxide (Fig. 2A, 202d, gate region) over the sensing region (Fig. 2A, 202, sensing device) of the substrate (Fig. 2A, 102, semiconductor substrate).
CHENG as modified by HUANG, LAL and FIFE does not explicitly disclose the integrated biosensor structure of claim 1, wherein the first gate oxide is adjacent to an edge of the first trench.
BUSTILLO teaches in Figure 3A, the integrated biosensor structure (Figs. 2/3A, integrated circuit device/chemical sensor, [0011-0012]) of claim 1, wherein the first gate oxide (Fig. 3A, 318, floating gate structure), is adjacent to an edge of the first trench (Fig. 3A, opening, [0035]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL and FIFE to incorporate the teachings of BUSTILLO, such that an integrated biosensor structure, wherein the first gate oxide is adjacent to an edge of the first trench, so that the accumulated charge can become trapped in the gate oxide and/or gate oxide-semiconductor substrate interface of the chemFETs, thereby contributing to the noise and resulting in variations in operation and degradation in performance (BUSTILLO, Fig. 3A, [0015]).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, and further in view of FIFE, further in view of BUSTILLO, and further in view of Tse-Wei Chung et al, (hereinafter CHUNG), US 20170016830 A1.
Regarding Claim 5, CHENG as modified by HUANG, LAL, FIFE, and BUSTILLO teaches the integrated biosensor structure of Claim 4,
HUANG further teaches in Figures 1-3, the integrated biosensor structure (Figs. 1-3, 100a, IC: integrated circuit, [0028]) of claim 4, further comprising at least two second gate oxides over the logic region (Fig. 3A, 106, logic region, can include logic devices (no shown), [0027]) of the substrate (Fig. 3A, 130, second substrate.
CHENG as modified by HUANG, LAL, FIFE, and BUSTILLO does not explicitly disclose the integrated biosensor structure, wherein the two second gate oxides are located at two sides of the first trench.
CHUNG teaches in Figure 10, the integrated biosensor structure (Fig. 10, integrated bio-sensor, [0066]) of claim 4, wherein the two second gate oxides are located (Fig. 10, 160 gate structure, [0030]) at two sides of the first trench (Fig. 10, 200, recess structure).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL, FIFE and BUSTILLO to incorporate the teachings of CHUNG, such that an integrated biosensor structure, wherein the two second gate oxides are located at two sides of the first trench, so that the two gate oxide structures as part of the CMOS bio-sensor for signal processing circuit chips that can be integrated for the purposes of cost reduction, power consumption reduction and integrity enhancement (CHUNG, [0007]).
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, and further in view of FIFE, further in view of BUSTILLO, further in view of CHUNG, and further in view of Peter Dipl Ing Hein et al, (hereinafter HEIN), DE 4115398 A1.
Regarding Claim 6, CHENG as modified by HUANG LAL, FIFE, BUSTILLO, and CHUNG teaches the integrated biosensor structure of Claim 5,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]).
CHENG as modified by HUANG LAL, FIFE, BUSTILLO, and CHUNG does not explicitly teaches the integrated biosensor structure, wherein a thickness of the first gate oxide is less than a thickness of each of the second gate oxides.
HEIN teaches in Figure 4b, the integrated biosensor structure (Figs. 2a-5b, biosensor in the form of an integrated CMOS circuit, [0015]) of claim 5. wherein a thickness of the first gate oxide (Fig. 4b, 5, silicon dioxide layer (gate oxide thickness of 30 nm), as the construction of gate insulator, [0030]) is less than (gate oxide (or silicon dioxide, 5) thickness of 30 nm or 40 nm < field oxide region thickness approximately 650 nm, [0022], [0027], [0032]) a thickness of each of the second gate oxides (Fig. 4b, 4, field oxide region, [0027]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL, FIFE, BUSTILLO and CHUNG to incorporate the teachings of HEIN, such that an integrated biosensor structure, wherein a thickness of the first gate oxide is less than a thickness of each of the second gate oxides, so that the biosensor CMOS circuit has a small gate insulator thickness, as is desired for MOS transistors for high-speed switching and performance (HEIN, [0057]).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, and further in view of FIFE, and further in view Arjang Hassibi et al, (hereinafter HASSIBI), US 20140318958 A1.
Regarding Claim 7, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), further comprising a second trench (Fig. 4, 226, second opening, [0028]) over a drain region within the logic region (annotated Figure 4) of the substrate (Fig. 4, 102), wherein the second trench (Fig. 4, 226, second opening, [0028]) is leveled with a passivation layer (Fig. 4, 220, second capping structure, [0025]) over the logic region of the substrate (annotated Figure 4).
PNG
media_image6.png
1060
1145
media_image6.png
Greyscale
CHENG as modified by HUANG, LAL and FIFE does not explicitly disclose the integrated biosensor structure, wherein the second trench is leveled with a passivation layer.
HASSIBI teaches in Figure 2A, the integrated biosensor structure (Fig. 2A, 201, CMOS integrated circuit, [0042]), wherein the second trench (Fig. 2A, 207, opening, [0043]) is leveled with a passivation layer (Fig. 2A, 206).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL, FIFE and BUSTILLO to incorporate the teachings of HASSIBI, such that the integrated biosensor structure, wherein the second trench is leveled with a passivation layer, so that the passivation layer, 206 covers the top metal layer is a simple and straightforward approach for biosensing applications (HASSIBI, Fig. 2A, [0042]).
Claim(s) 10, and 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of FIFE, and further in view of CHUNG.
Regarding Claim 10, CHENG teaches an integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), comprising:
a substrate (Fig. 4, 102, semiconductor substrate) having a first surface (annotated Figure 4), the substrate comprises:
a sensing region (annotated Figure 4), comprising:
a plurality of first doped regions (annotated Figure 4, annotated Figure 4, S/D regions on the sensing device region 202) at the first surface of the substrate; and
a sensing oxide layer (Fig. 4, 404, sensing enhancement layer may comprise a high-k dielectric layer, [0035], [0050]) over the plurality of first doped regions (annotated Figure 4, annotated Figure 4, S/D regions on the sensing device region 202, and/or S/D regions for the logic device region); and
a logic region (annotated Figure 4) surrounding the sensing region, comprising:
a plurality of second doped regions (S/D regions for the logic device region) at the first surface of the substrate;
PNG
media_image7.png
989
1203
media_image7.png
Greyscale
CHENG does not explicitly disclose or show an integrated biosensor structure, comprising: logic region surrounding the sensing region.
HUANG teaches in Figures 1-3, an integrated biosensor structure (Figs. 1-3, 100a, IC: integrated circuit, [0028]) comprising: logic region (Figs. 1-3, 106) surrounding the sensing region (Figs. 1-3, 102, image sensor region).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have modified CHENG to incorporate the teachings of HUANG, such that an integrated biosensor structure, comprising: logic region surrounding the sensing region, so that if present, the logic region, can include logic devices to support the operation of the sensing device region (HUANG, [0027]).
CHENG as modified by HUANG does not explicitly disclose an integrated biosensor structure, comprising: a plurality of first doped regions at the first surface of the substrate; a logic region surrounding the sensing region, comprising: a plurality of second doped regions at the first surface of the substrate; a plurality of gate structures over the plurality of second doped regions; and a metallization structure over the plurality of gate structures.
FIFE teaches in Figure 5, an integrated biosensor structure (Fig. 5, 500, chemically sensitive sensor, [0033]) comprising: a plurality of doped regions (Fig. 5, N+ doped regions, 591 (Source) and 595, drain, [0034]) at the first surface of the substrate (Fig. 5, 599); a logic region surrounding the sensing region (annotated Figure 5), comprising: a plurality of second doped regions (Fig. 5, N+ doped regions, 591 (Source) and 595, drain, [0034]) at the first surface of the substrate (Fig. 5, 599); a plurality of gate structures (Fig. 5, 581/584, gate electrodes) over the plurality of second doped regions (Fig. 5, N+ doped regions, 591 (Source) and 595, drain, [0034]); and a metallization structure (Fig. 5, 571/552/569/546, metal layers) over the plurality of gate structures (Fig. 5, 581/584, gate electrodes).
PNG
media_image8.png
978
725
media_image8.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG to incorporate the teachings of FIFE, such that an integrated biosensor structure, comprising: a plurality of doped regions at the first surface of the substrate; a logic region surrounding the sensing region, comprising: a plurality of second doped regions at the first surface of the substrate; a plurality of gate structures over the plurality of second doped regions; and a metallization structure over the plurality of gate structures. The parasitic capacitance may be manipulated by addition of lightly doped regions 591′ and/or 595′ and therefore the said doping processes enable to enhance operation of ISFET which is based on the modulation of charge concentration and thus channel conductance (FIFE, [0034]).
CHENG as modified by HUANG and FIFE does not explicitly disclose an integrated biosensor structure, comprising: a sensing oxide layer over the plurality of first doped regions, wherein the sensing oxide layer and the first surface of the substrate are free from having a metallization therebetween.
CHUNG teaches in Figure 10, the integrated biosensor structure (Fig. 10, integrated bio-sensor, [0066]), comprising: a sensing oxide layer (Fig. 10, 220, liner layer) over the plurality of first doped regions (Fig. 10, 142/144, first or second conductivity type region), wherein the sensing oxide layer (Fig. 10, 220, liner layer) and the first surface (annotated Figure 10) of the substrate (Fig. 10, 100) are free from having a metallization therebetween (annotated Figure 10).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG and FIFE to incorporate the teachings of CHUNG, such that an integrated biosensor structure, comprising: a sensing oxide layer over the plurality of first doped regions, wherein the sensing oxide layer and the first surface of the substrate are free from having a metallization therebetween, so that the said fabrication of the CMOS bio-sensor that can be integrated in a signal processing circuit chip for the purposes of cost reduction, power consumption reduction and integrity enhancement (CHUNG, [0007]).
PNG
media_image9.png
805
747
media_image9.png
Greyscale
Regarding Claim 12, CHENG as modified by HUANG, FIFE and CHUNG teaches the integrated biosensor structure of Claim 10,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the substrate having a second surface (annotated Figure 4) opposite to the first surface (annotated Figure 4), the substrate is free from having a conductive via in proximity to the second surface (annotated Figure 4).
PNG
media_image10.png
927
1167
media_image10.png
Greyscale
Regarding Claim 13, CHENG as modified by HUANG, FIFE and CHUNG teaches the integrated biosensor structure of Claim 10,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the sensing region (annotated Figure 2A, 202, sensing device) further comprises a first gate oxide in contact with the first surface of the substrate in the sensing region, the first gate oxide (Fig. 2A, 202e, gate dielectric layer (e.g. silicon dioxide layer), [0020]).
FIFE further teaches in Figure 5, an integrated biosensor structure (Fig. 5, 500, chemically sensitive sensor, [0033]), wherein the sensing region (Fig. 5, 510, microwell) further comprises a first gate oxide (annotated Figure 5, [0005-0006]) is in contact with a side of the sensing oxide layer (Fig. 5, 515, oxide layer).
PNG
media_image11.png
910
1191
media_image11.png
Greyscale
PNG
media_image12.png
837
694
media_image12.png
Greyscale
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of FIFE, further in view of CHUNG, and further in view of Chong-Yao Chen et al, (hereinafter CHEN), US 20020192913 A1.
Regarding Claim 11, CHENG as modified by HUANG, FIFE and CHUNG teaches the integrated biosensor structure of Claim 10,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the plurality of gate structures (annotated Figure 4) in the logic region are leveled with the sensing oxide layer in the sensing region (Fig. 4, 202, sensing device).
PNG
media_image13.png
989
1150
media_image13.png
Greyscale
CHENG as modified by HUANG, FIFE and CHUNG does not explicitly disclose the integrated biosensor structure, wherein the plurality of gate structures in the logic region are leveled with the sensing oxide layer in the sensing region.
CHEN teaches in Figure 2D, the integrated biosensor structure (Fig. 2D, CMOS image sensor, [0024]), wherein the plurality of gate structures (Fig. 2D, 208a, gate electrode conductive layer, [0029]) in the logic region (Fig. 2D, 270, transistor element region) are leveled (annotated Figure 2D) with the sensing oxide layer (Fig. 2D, 224, barrier layer, [0032]) in the sensing region (Fig. 2D, 260, photodiode sensing region).
PNG
media_image14.png
704
735
media_image14.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG and FIFE and CHUNG to incorporate the teachings of CHEN, such that an integrated biosensor structure, wherein the plurality of gate structures in the logic region are leveled with the sensing oxide layer in the sensing region, so that to minimize the read out noise issues due to the current leakage by the sensing region of the CMOS sensing device (CHEN, [0012]).
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of FIFE, further in view of CHUNG, and further in view of HEIN.
Regarding Claim 14, CHENG as modified by HUANG, FIFE and CHUNG teaches the integrated biosensor structure of Claim 13,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]).
HUANG further teaches in Figures 1-3, an integrated biosensor structure (Figs. 1-3, 100a, IC: integrated circuit, [0028]), wherein each of the plurality of gate structures in the logic region (Figs. 1-3, 106, logic devices not shown, configured to support operation of devices in the sensing region, [0027]).
CHENG as modified by HUANG, FIFE and CHUNG does not teaches the integrated biosensor structure, wherein a thickness of the first gate oxide is different from a thickness of a second gate oxide of each of the plurality of gate structures in the logic region.
HEIN teaches in Figure 4b, the integrated biosensor structure (Figs. 2a-5b, biosensor in the form of an integrated CMOS circuit, [0015]) of claim 5. wherein a thickness of the first gate oxide (Fig. 4b, 5, silicon dioxide layer (gate oxide thickness of 30 nm), as the construction of gate insulator, [0030]) is different from (gate oxide (or silicon dioxide, 5) thickness of 30 nm or 40 nm < field oxide region thickness approximately 650 nm, [0022], [0027], [0032]) a thickness of each of the second gate oxides (Fig. 4b, 4, field oxide region, [0027]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG, FIFE and CHUNG to incorporate the teachings of HEIN, such that an integrated biosensor structure, wherein a thickness of the first gate oxide is less than a thickness of each of the second gate oxides, so that the biosensor CMOS circuit has a small gate insulator thickness, as is desired for MOS transistors for high-speed switching and performance (HEIN, [0057]).
Claim(s) 15 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of FIFE, further in view of CHUNG, and further in view of HASSIBI.
Regarding Claim 15, CHENG as modified by HUANG, FIFE and CHUNG teaches the integrated biosensor structure of Claim 15,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the logic region (annotated Figure 4) further comprises a passivation layer (Fig. 4, 220, second capping structure, [0025]), the sensing oxide layer (Fig. 4, 404, sensing enhancement layer may comprise a high-k dielectric layer, [0035], [0050]) in the sensing region (annotated Figure 4) further extends to the logic region (annotated Figure 4) along a side of the metallization structure (Fig. 4, C0-V2, [0057-0058]) and a side of the passivation layer (annotated Figure 4, Fig. 4, 220, second capping structure, [0025]).
CHENG as modified by HUANG, FIFE and CHUNG does not explicitly disclose the integrated biosensor structure, wherein the logic region further comprises a passivation layer over the metallization structure.
PNG
media_image15.png
1149
1177
media_image15.png
Greyscale
HASSIBI teaches in Figure 2A, the integrated biosensor structure (Fig. 2A, 201, CMOS integrated circuit, [0042]), wherein the logic region (annotated Figure 2A) further comprises a passivation layer (Fig. 2A, 206) over the metallization structure (Fig. 2A, 204/205, vias/Aluminum interconnects).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG FIFE and CHUNG to incorporate the teachings of HASSIBI, such that the integrated biosensor structure, wherein the logic region further comprises a passivation layer over the metallization structure, so that the passivation layer, 206 covers the top metal layer is a simple and straightforward approach for biosensing applications (HASSIBI, Fig. 2A, [0042]).
PNG
media_image16.png
795
764
media_image16.png
Greyscale
Regarding Claim 16, CHENG as modified by HUANG, FIFE, CHUNG, and HASSIBI teaches the integrated biosensor structure of Claim 15,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein a profile of the sensing oxide layer (annotated Figure 5, 504, sensing enhancement layer) in the first trench (Fig. 5, 506, sensing well) comprises at least a change of slope along an inner sidewall of the first trench (annotated Figure 5).
PNG
media_image17.png
961
996
media_image17.png
Greyscale
Claim(s) 22, and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, further in view of FIFE, and further in view of Todd Rearick et al, (hereinafter REARICK), US 20160187289 A1.
Regarding Claim 22, CHENG as modified by HUANG, LAL and FIFE teaches the integrated biosensor structure of Claim 1,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein the length of the first trench spans (annotated Figure 2A, 214, sensing well) two source regions and a drain region (annotated Figure 2A).
CHENG as modified by HUANG, LAL and FIFE, does not explicitly discloses the integrated biosensor structure, wherein the length of the first trench spans two source regions and a drain region between the two source regions.
REARICK teaches in Figure 11A-1, the integrated biosensor structure (Fig. 8, large scale chemFET array, [0179]), wherein the length of the first trench (annotated Figure 11A-1, 725, the well, [0348]) spans two source regions and a drain region (Fig. 11A-1, 156/158/159, p-type regions, [0337]) between the two source regions (Fig. 11A-1, 162, n-type regions, [0337]).
PNG
media_image18.png
759
896
media_image18.png
Greyscale
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL, and FIFE to incorporate the teachings of REARICK, such that the integrated biosensor structure, wherein the length of the first trench spans two source regions and a drain region between the two source region, so that sharing of drain regions between the sensing region and the logic region thus reduce the number of devices used in an integrated CMOS circuit, and reduce the cost of fabrication of the integrated biosensor chips (REARICK, [0345]).
Regarding Claim 24, CHENG as modified by HUANG, LAL, FIFE, and REARICK teaches the integrated biosensor structure of Claim 22,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]), wherein a plurality of first metal lines (Fig. 4, C0-V2, lower metal layers, [0021]) in the BEOL structure (Fig. 4, 402, BEOL metal stack) are substantially parallel to the two source regions and the drain region (annotated Figure 4).
PNG
media_image19.png
1059
1145
media_image19.png
Greyscale
Claim(s) 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHENG, in view of HUANG, further in view of LAL, FIFE, further in view of REARICK, and further in view of Asanterabi Malima et al, (hereinafter MALIMA), US 20130330747 A1.
Regarding Claim 23 CHENG as modified by HUANG, LAL, FIFE, and REARICK teaches the integrated biosensor structure of Claim 22,
CHENG further teaches the integrated biosensor structure (Fig. 4, 400, a cross-sectional view of an integrated chip comprising an integrated bio-sensor, [0003]).
CHENG as modified by HUANG, LAL, FIFE, and REARICK, does not teaches the integrated biosensor structure, wherein the length of the first trench is about 100 µm.
MALIMA teaches in Figure 1A, the integrated biosensor structure (biosensor assembly platform, [0063]), wherein the length of the first trench is about 100 µm (Fig. 1A, 5, nanowells, nanotrenches or nanowells are at least about 100000 nm (equivalent 100 µm) or more in length, [0090]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to have CHENG as modified by HUANG LAL, FIFE, and REARICK to incorporate the teachings of MALIMA, such that the integrated biosensor structure, wherein the length of the first trench is about 100 µm, so that the nanotrenches or nanowells allows to expose the fluid environment with the optimized areas (about 100000 nm or 100 µm or mor in length of the nanotrench or nanowell) of the trenches for maximizing the biosensing and thus increasing the efficiency of the system (MALIMA, [0090]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20100052080 A1 – Figure 1 and [0020]
Statement of Relevance – The dimension of nanoelectrodes (250 nm or less) be realized as sensing pockets having dimensions close to dimension of biological molecules to be detected.
US 20200284753 A1 – Figure 1
Statement of Relevance – A thickness of the first gate oxide (Fig. 1, 7, gate contact) is less than a thickness of the second gate oxides (Fig. 1, 3, the back gate contact).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SESHA SAIRAMAN SRINIVASAN whose telephone number is (703)756-1389. The examiner can normally be reached Monday-Friday 7:30 AM -5:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SESHA SAIRAMAN SRINIVASAN/ Examiner, Art Unit 2812
/CHRISTINE S. KIM/ Supervisory Patent Examiner, Art Unit 2812