DETAILED ACTION
This office action is in response to applicant’s RCE filed on 11/17/2025.
Currently claims 1-2, 4-10 and 12-20 are pending in the application.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by US 2002/0097541 A1 (Wei).
Regarding claim 1, Wei discloses, an apparatus (200; integrated circuit; Fig. 2; [0031] – [0035]) comprising:
a transistor (204; switch, consist of many individual transistors in parallel; Fig. 2; [0031]) having a control terminal (control input, as annotated on Fig. 2); and
a control circuit (203; amplifier; Fig. 2; [0031]) having a first input (as annotated on Fig. 2), a second input (as annotated on Fig. 2), and a control output (output of 203),
the control output coupled to the control terminal (as evident on Fig. 2), the control circuit (203) configurable to receive a first signal indicative of a first temperature (related to absolute temperature) at the first input, a second signal indicative of a second temperature (related to local temperature) at the second input, and set a state (a state at the output of OpAmp 203) of the control output responsive to a difference between the first and second temperatures (this is what an OpAmp does).
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Regarding claim 2, Wei discloses, the apparatus of claim 1, further comprising: a group of transistors including the transistor (switch 204 consist of many individual transistors in parallel; Fig. 2; [0031]), each transistor of the group of transistors having a respective control terminal (base of a bipolar transistor or gate of a MOS transistor) coupled to the control output; and a temperature sensor (as annotated on Fig. 2) having an output coupled to the first input (as evident in Fig. 2).
Claims 9-10 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by US 2002/0097541 A1 (Wei).
Regarding claim 9, Wei discloses, an apparatus (200; integrated circuit; Fig. 2; [0031] – [0035]) comprising:
a transistor (204; switch, consist of many individual transistors in parallel; Fig. 2; [0031]) having a control terminal (control input, as annotated on Fig. 2); and
a control circuit (203; amplifier; Fig. 2; [0031]) having a first input (as annotated on Fig. 2), a second input (as annotated on Fig. 2), and a control output (output of 203),
the control output coupled to the control terminal (as evident on Fig. 2), the control circuit (203) configurable to receive a first signal indicative of a first temperature (related to absolute temperature) at the first input, a second signal indicative of a second temperature (related to local temperature) at the second input, and provide a current (current at the output of OpAmp 203, as annotated on Fig. 2) of the control output responsive to a difference between the first and second temperatures (this is what an OpAmp does).
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Regarding claim 10, Wei discloses, the apparatus of claim 9, further comprising: a group of transistors including the transistor (switch 204 consist of many individual transistors in parallel; Fig. 2; [0031]), each transistor of the group of transistors having a respective control terminal (base of a bipolar transistor or gate of a MOS transistor) coupled to the control output; and a temperature sensor (as annotated on Fig. 2) having an output coupled to the first input (as evident in Fig. 2).
Allowable Subject Matter
Claims 4-8 and 12-17 are objected to as being dependent upon rejected base claims, but would be allowable if rewritten in independent forms including all of the limitations of the base claims and any intervening claims.
Regarding claim 4, the closest prior art, US 2002/0097541 A1 (Wei), fails to disclose, “the apparatus of claim 2, wherein: the group of transistors is a first group of transistors; the control circuit is a first control circuit, the control output is a first control output; the temperature sensor is a first temperature sensor; and the apparatus further comprises: a second control circuit having a third input, a fourth input, and a second control output a second temperature sensor having an output coupled to the third input; a second group of transistors, each transistor of the second group of transistors having a respective control terminal coupled to the second control output; and a third temperature sensor having an output coupled to the second and fourth inputs.”, in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 5, the closest prior art, US 2002/0097541 A1 (Wei), fails to disclose, “the apparatus of claim 1, wherein: the control circuit has first and second current terminals, the second current terminal coupled to the control output, and the control circuit includes: a resistor coupled between the first and second current terminals; a first current source having an output coupled to the first current terminal and a control input coupled to the first input; and a second current source having an output coupled to the second current terminal and a control input coupled to the second input”, in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 12, the closest prior art, US 2002/0097541 A1 (Wei), fails to disclose, “the apparatus of claim 10, wherein: the group of transistors is a first group of transistors; the control circuit is a first control circuit, the control output is a first control output; the temperature sensor is a first temperature sensor; and the apparatus further comprises: a second control circuit having a third input, a fourth input, and a second control output a second temperature sensor having an output coupled to the third input; a second group of transistors, each transistor of the second group of transistors having a respective control terminal coupled to the second control output; and a third temperature sensor having an output coupled to the second and fourth inputs.”, in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 13, the closest prior art, US 2002/0097541 A1 (Wei), fails to disclose, “the apparatus of claim 9e, wherein: the control circuit has first and second current terminals, the second current terminal coupled to the control output, and the control circuit includes: a resistor coupled between the first and second current terminals; a first current source having an output coupled to the first current terminal and a control input coupled to the first input; and a second current source having an output coupled to the second current terminal and a control input coupled to the second input”, in combination with the additionally claimed features, as are claimed by the Applicant.
Claims 6-8 and 14-17 are also objected to due to their dependence on an objected base claim.
Examiner’s Note
The examiner included a few prior arts which were not used in the rejection but are relevant to the disclosure.
US 2021/0104515 A1 (Ma) - An apparatus is disclosed including a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.
US 2020/0012304 A1 (Saha) - An apparatus includes a power transistor to conduct a load current from a supply voltage node to an output node and a current sense circuit coupled to the power transistor. The current sense circuit generates a current sense current proportional to the load current. A temperature sense circuit is included to generate a temperature sense voltage proportional to the temperature of the power FET. A thermal limit circuit is coupled to the temperature sense circuit. A current limit circuit is coupled to the current sense circuit and to the thermal limit circuit. The current limit circuit generates a control signal on a current limit circuit output node. The control signal is responsive to the current sense current and to a first current from the thermal limit circuit. The current limit circuit output node is coupled to a control input of the power transistor.
US 2015/0098163 A1 (Ferrara) - A circuit is disclosed having a temperature sensing device that is coupled to a transistor. A tunable clamping circuit is connected between transistor terminals and configured to provide an adjustable clamping voltage. A temperature controller is coupled to the temperature sensing device and the tunable clamping circuit. The temperature controller is configured to trigger a change in a clamping voltage of the tunable clamping circuit based on a feedback from the temperature sensing device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to S M SOHEL IMTIAZ whose telephone number is (408) 918-7566. The examiner can normally be reached on 8AM-5PM, M-F, PST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/S M SOHEL IMTIAZ/Primary Patent Examiner
Art Unit 2812
11/26/2025