DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 10-19 is/are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention / species there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 9/10/25.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9 have been considered but are moot because the new ground of rejection relies a new reference for teaching matters specifically challenged in the argument.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-9, 21 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
First, claim 1 recites “a leadframe having conductive channels and contact pads,” but does not recited any structural or functional relationship between the conductive channels and the contact pads or other claimed elements.
Second, the recitation of “an insulative layer formed on the leadframe and between the solder elements” is unclear because the claim does not specify the spatial relationship intended by “between” where multiple solder elements are present. This includes whether the insulative layer is required to extend between each adjacent solder element or merely within a region containing the solder elements.
Third, the recitation of “magnetic-molding compound (MMC) filler between the IC die and the insulative layer and encapsulating the IC die” is ambiguous as to whether the portion of the MMC filler located between the IC die and the insulative layer must itself encapsulate the IC die, or whether the MMC filler generally encapsulates the IC die while only a portion thereof is located between the IC die and the insulative layer.
According the structural relationships are not define with sufficient clarity to ascertain the metes and bounds of claim 1.
The other claims are rejected as being dependent on an indefinite claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-7 is/are, to the extent taught and understood, rejected under 35 U.S.C. 103 as being obvious over U.S. Patent Application Publication No. 2023/0335509 (Poddar) in view of JP Publication No. 2006-165303 (Sato).
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
Poddar discloses (Figs. 1, 2, 6, 20)
1. (Currently Amended) A module, comprising:
an integrated circuit (IC) die 120;
a leadframe 110 having conductive channels (vias [0015]) and contact pads 113-118;
solder elements 134 coupled between the IC die 120 and the contact pads 113-118 of the leadframe 110;
an insulative layer 136 formed on the leadframe 110; and
magnetic-molding compound (MMC) filler 145 between the IC die 120 and the insulative layer 136 and encapsulating the IC die 120.
Poddar fails to disclose
an insulative layer between the solder elements 26.
Sato teaches
A module, comprising:
an insulative layer 22 between the solder elements 26.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use an insulative layer between the solder elements in Poddar. The motivation would be to obtain electrical isolation between adjacent solder elements while preserving exposed contact regions for solder attachment which is well-known in the art as taught by Sato. See MPEP 2144.03.
Sato teaches
2. (Previously Presented) The module of claim 1, wherein a thickness of the MMC filler 40 / 42 / Q between the IC die 10 and the insulative layer 22is limited by a thickness SR of the insulative layer 22.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to limit the thickness of the filler in Poddar. The motivation would be to prevent damage on an active surface by completely packing a filler between a die and an insulative layer even if the height of a solder element reduces in accordance with a narrow pitch processing of a die as taught by Sato.
Sato teaches
3. (Previously Presented) The module of claim 2, wherein the thickness of the insulative layer 22 is based on a target gap G between the IC die 10 and the leadframe 20 and a threshold particle size Q / 42 of the MMC filler 40 / 42 / Q.
Sato teaches
4. (Previously Presented) The module of claim 3, wherein the target gap G is selected to limit particles Q / 42 of the MMC filler 40 / 42 / Q between the IC die 10 and the insulative layer 22 to less than the threshold particle size.
Sato teaches
5. The module of claim 1, wherein the insulative layer 22 comprises solder resist.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use solder resist in Poddar. The motivation would be solder resist is well-known and suitable insulative layer when combined with solder elements in the module art as taught by Sato. See MPEP 2144.03 and 2144.07.
Sato teaches
6. The module of claim 1, wherein the insulative layer 22 partially exposes the contact pads 24.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to partially expose the pads in Poddar. The motivation would be a matter of routine engineering design considerations and suitability as taught by Sato. See MPEP 2144.03 and 2144.07.
Sato teaches
7. The module of claim 1, wherein the insulative layer 22 has a layout based on an outline of the contact pads 24.
Sato teaches
21. (New) The module of claim 1, wherein the MMC filler 40 / 42 / Q includes first particles Q having a first size smaller than a threshold value and second particles 42 having a second size greater than the threshold value, and the MMC filler 40 / 42 / Q in regions between the leadframe 20 and the IC die 10 includes the first particles Q but not the second particles 42.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to select the gap and filler particle distribution so that particles below a threshold occupy the region while particles above the threshold are excluded in Poddar. The motivation would be to yield the predictable result of size-selective filler placement to prevent damage as a matter of routine optimization as shown in Sato. See MPEP 2144.05.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Poddar in view of Sato as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2024/0006259 (Inoue).
The combination of references fails to teach
8. (Original) The module of claim 1, further comprising a coil having a first end and a second end, the first end coupled to a first solder element of the solder elements and a respective contact pad of the contact pads, the second end coupled to a second solder element of the solder elements and a respective contact pad of the contact pads, wherein a core of the coil includes the MMC filler.
Inoue teaches
A module comprising:
a coil 202 having a first end 212a and a second end 212b, the first end 210a coupled to a first solder element of the solder elements and a respective contact pad of the contact pads, the second end 212b coupled to a second solder element of the solder elements and a respective contact pad of the contact pads, wherein a core 210 of the coil 202 includes the MMC filler (encapsulating the coil 202, [0020]; fill the space withing coil 202, such as the core 210, [0023]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a coil in the modified device of Poddar. The motivation would be to form a system to support a particular application, such as proximity sensing, energy storage, actuation, power transmission, and filtering as taught by Inoue ([0016]).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Poddar in view of Sato as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2023/0197621 (Meyyappan).
The combination of references fails to teach
9. (Original) The module of claim 1, wherein the IC die includes switching converter components.
Meyyappan teaches (Fig. 6A)
A module comprising:
wherein the IC die 216 includes switching converter components.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to partially expose the pads in the modified device of Poddar. The motivation would be a matter of routine engineering design considerations and suitability as taught by Meyyappan ([0035]). See MPEP 2144.03 and 2144.07.
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Application Publication Nos. 2025/0006575 (Komatsu), 2018/0218825 (Sato), 2013/0076347 (Toshida) teach a module having a filler.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.).
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/TERESA M. ARROYO/ Primary Examiner, Art Unit 2893
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