DETAILED ACTION
Response to Amendment
This action is responsive to the amendment filed on 5/6/2026. Claims 1-13, 15-17, 19-23 and 25 are pending and have been examined. Claims 1, 16, 20-21 and 23 have been amended. Claims 14, 18 and 24 have been cancelled.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 15 and 19 are objected to because of the following informalities:
In regards to claim 15, line 1 the limitation “The method of claim 14” should be amended to “The method of claim [[14]] 1”, as claim 14 has been cancelled and was previously dependent upon claim 1.
In regards to claim 19, line 1 the limitation “The compute block of claim 18” should be amended to “The compute block of claim [[18]] 16”, as claim 18 has been cancelled and was previously dependent upon claim 16.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4-13 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In regards to claim 4, line 2 the limitation stating “the vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13, the “second vector” of claim 1, line 14, the “third vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “third vector” of claim 1, line 21?
In regards to claim 5, line 2 the limitation stating “the vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13, the “second vector” of claim 1, line 14, the “third vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “third vector” of claim 1, line 21?
In regards to claim 6, line 1 the limitation stating “the vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13, the “second vector” of claim 1, line 14, the “third vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “third vector” of claim 1, line 21?
In regards to claim 8, each recitation in lines 1 and 11 stating “the vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13, the “second vector” of claim 1, line 14, the “third vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “third vector” of claim 1, line 21?
In regards to claim 10, each recitation in lines 7-8 stating “the second vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “second vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “second vector” of claim 10, line 4?
In regards to claim 10, line 8 limitation stating “the first vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13 or the “first vector” of claim 10, line 2?
In regards to claim 10, each recitation in lines 7-8 stating “the second vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “second vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “second vector” of claim 10, line 4?
In regards to claim 11, each recitation in lines 3 and 6 stating “the first vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13 or the “first vector” of claim 11, line 2?
In regards to claim 11, line 6 the recitation stating “the second vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “second vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “second vector” of claim 11, line 4?
In regards to claim 11, lines 3-4 each recitation stating “the multiplier” lacks clarity. The limitations lack clarity because it is unclear if each recitation is referring to “a first multiplier” of claim 1, line 12 or “a second multiplier” of claim 1, line 20?
In regards to claim 12, line 2 recitation stating “the multiplier” lacks clarity. The limitations lack clarity because it is unclear if each recitation is referring to “a first multiplier” of claim 1, line 12 or “a second multiplier” of claim 1, line 20?
In regards to claim 12, line 5 the recitation stating “the third vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “third vector” of claim 1, line 21 or the “third vector” of claim 12, line 2?
In regards to claim 12, line 5 stating “the first vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13 or the “first vector” of claim 11, line 2?
In regards to claim 12, lines 5-6 stating “the second vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “second vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “second vector” of claim 11, line 4?
In regards to claim 13, each recitation in lines 4- 5 stating “the first vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “first vector” of claim 1, line 13 or the “first vector” of claim 11, line 2?
In regards to claim 13, line 5 stating “the second vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “second vector” of claim 1, line 14, the “second vector” of claim 1, line 18 or the “second vector” of claim 11, line 4?
In regards to claim 15, lines 2-3 stating “the second vector” lacks clarity. The limitation lacks clarity because it is unclear if applicant is referring to the “second vector” of claim 1, line 14 or the “second vector” of claim 1, line 18?
Claims 5-7, 9 and 12-13 are dependent upon one or more claims above and therefore are similarly rejected for including the deficiencies of one or more claims above.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-13, 15-17, 19-23 and 25 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., abstract idea) without significantly more.
Regarding claim 1:
Subject Matter Eligibility Analysis Step 1:
Claim 1 recites “A method” and thus a process, one of the four statutory categories of patentable subject matter.
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 1 recites “…deep learning…a convolutional layer in a deep neural network (DNN)… perform multiplication operations… perform the multiplication operations on the first vector in a first operation round… perform multiplication operations on a second vector in a second operation round… perform multiplication operations on a third vector in the first operation round and in the second operation round” which describe a process that under its broadest reasonable interpretation encompasses mathematical concepts. That is other than reciting generic computing components (e.g. memory, datastore, processing elements and multipliers) nothing in the claimed elements precludes the steps from practically being performed in the mind with the aid of pen and paper.
For example, the claim discusses convolution layers in a DNN for deep learning and performing multiplication operations, thus the limitation encompasses mathematical calculations and/or relationships (MPEP 2106.04(a)(2)(I)) (see [0027-0028 and 0047-0049]: wherein convolution operations of DNN’s includes multiply-accumulate operations)
If a claim, limitation, under its broadest reasonable interpretation, covers performance of a mathematical calculation/relationship in the mind with the aid of pen and paper but for the recitation of generic computer components then it falls within the “Mathematical concepts” grouping of abstract ideas.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 1 further recites additional elements of
accelerating deep learning…a memory…a datastore comprising one or more databanks… a databank storing a group of activations in the channel …processing element comprising a multiplier… the multiplier is a first multiplier of the processing element…the first multiplier…of the processing element…a second multiplier of the processing element
storing, in a memory, an input tensor …the input tensor comprising one or more channels, a channel comprising activations arranged in rows and columns; reading at least a portion of the input tensor from the memory into a datastore; and providing a vector to a processing element, the vector comprising one or more activations in the group… the vector is a first vector in the input tensor…the input tensor further comprises a second vector and a third vector that have one or more different activations from the first vector
These additional elements do not integrate the abstract idea into a practical application because (a) recites at a high-level of generality the words “apply it” (or an equivalent) with the judicial exception, or use mere instructions to implement the abstract idea on a computer, or merely uses a computer (including generic computing components) as a tool to perform the abstract idea (See MPEP 2106.05(f)) (note it can also be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment of accelerator for machine learning (MPEP 2106.05(h)) and (b) recites insignificant extra-solution activity for particular type of data (i.e. data gathering and data outputting of vector/tensor data) (See MPEP 2106.05 (h and g)).
Therefore, claim 1 is directed to the abstract idea.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 1 do not provide significantly more than the abstract idea itself, taken alone and in combination, because (a) uses mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea which cannot provide significantly more (e.g. “apply it”) (see MPEP 2106.05(f)) and/or it can also be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment of accelerators (MPEP 2106.05(h)); (b) recites insignificant extra-solution activity of data gathering and outputting of particular types of data (e.g. tensor/vector data) (see MPEP 2106.05(g and h)) which the courts have deemed to be well-understood, routine and conventional activities that do not provide significantly more (MPEP 2106.05(d)); the courts have recognized that receiving or transmitting data over a network ((Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362), as well as storing and retrieving information in memory are well‐understood, routine, and conventional functionalities (Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93)). Furthermore, based on applicants’ own admission in paragraphs [0027-0028] it is well-known, routine and conventional to use DNN accelerators to accelerate convolution layers.
Therefore, based on the discussion of the additional elements above, claim 1 is not patent eligible.
Claim 2 recites further abstract ideas such as “…wherein the DNN further comprises one or more backend layers, the one or more backend layers comprise one or more other convolutional layers, and the convolutional layer is a frontend layer arranged before the one or more backend layers” which encompass mathematical concepts (see claim 1 rejection). Thus, additional abstract ideas cannot integrate the abstract idea of claim 1 into a practical application nor provide significantly more than the abstract idea of claim 1. Thus, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 3 further recites “…wherein the activations in the group are in one of the rows of the channel” which discusses further embellishments of the type of data operated on in claim 1 and thus can be viewed as nothing more than an attempt to generally link the use of the judicial exception to a particular technological field (e.g. a particular type of data) (MPEP 2106.05(h)). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 4 further recites “…wherein the convolutional layer has a kernel comprising weights arranged in rows and columns, and a number of activations in the vector equals a number of weights in a row of the kernel” which discusses further embellishments of the type of data included in the mathematical calculation of the convolutional layer of claim 1 and thus can be viewed as nothing more than an attempt to generally link the use of the judicial exception to a particular technological field (e.g. a particular type of data) (MPEP 2106.05(h)). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 5 recites further abstract ideas such as “…wherein the multiplier is to perform the multiplication operations on the vector and a weight vector, and the weight vector comprises weights in one of the rows of the kernel” which encompasses mathematical concepts and a particular type of data used in the mathematical concepts (see claim 1 rejection). Thus, can be viewed as nothing more than an attempt to generally link the use of the judicial exception to a particular technological field (e.g. a particular type of data) (MPEP 2106.05(h)). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 6 further recites “…wherein providing the vector to the processing element comprises: reading a sequence of activations from the datastore into a storage unit of the processing element, wherein a number of the activations in the sequence is larger than the number of the weights in the row of the kernel; and reading a bitmap from the datastore into the storage unit of the processing element, wherein the bitmap comprises a sequence of bits, a number of bits having values of one in the bitmap equals the number of the weights in the row of the kernel, and the bitmap is to be applied on the sequence of activations to extract the one or more activations from the group” which encompasses insignificant extra-solution activities of particular types of data (e.g. reading of activations and a bitmap) (MPEP 2106.05(g-h)) and an additional abstract idea including a mental process and/or mathematical relationship (applying a bitmap to extract activations). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 7 further recites “…wherein: the sequence of activations starts with a first activation and is read from the datastore at a first time, a different sequence of activation starts with a second activation and is read from the datastore at a second time that is different from the first time, and a position of the second activation in the input tensor is determined based on a position of the first activation in the input tensor and a stride size of the convolutional layer” which encompasses insignificant extra-solution activities of particular types of data (e.g. reading of activation data) (MPEP 2106.05(g-h)) and an additional abstract idea including a mental process and/or mathematical relationship/calculation (determining a position of a second activation based on position of first activation input tensor and stride size of convolution layer). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 8 further recites “…wherein providing the vector to the processing element comprises: reading a sequence of activations from the datastore; modifying the sequence of activations by adding one or more pad elements into the sequence to generate a new sequence of activations, the one or more pad elements having a predetermined value; writing the new sequence of activations into a storage unit of the processing element; and transferring a bitmap from the datastore into the storage unit of the processing element, wherein the bitmap comprises a sequence of bits that includes one or more bits have a value of zero and one or more bits have a value of one, and the vector is generated based on the bitmap and the new sequence of activations” which encompasses insignificant extra-solution activities of particular types of data (e.g. providing a vector, reading of activation data, writing new sequence, transferring a bitmap) (MPEP 2106.05(g-h)) and additional abstract ideas including a mental processes and/or mathematical relationship/calculations (modifying the sequence by adding pad elements to generate a new sequence…vector is generated based on the bitmap and the new sequence). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 9 further recites “…wherein: reading the sequence of activations from the datastore comprises reading the sequence of activations from the datastore at a first time, the one or more pad elements comprises two pad elements, the sequence of activations is read from the datastore at a second time that is later than the first time, and after the sequence of activations is read from the datastore at the second time, another new sequence of activations is generated by adding one pad element into the sequence of activations” which encompasses insignificant extra-solution activities of particular types of data (e.g. reading of activation data) (MPEP 2106.05(g-h)) and additional abstract ideas including a mental processes and/or mathematical relationship/calculations (generating new sequence of activations by adding one pad element). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 10 further recites “…wherein: the vector is a first vector in the input tensor, the multiplier is a first multiplier in the processing element, the method further comprises transmitting a second vector from another databank of the datastore to the processing element, a second multiplier of the processing element is to perform multiplication operations on the second vector, and the first vector is in a different row of the input tensor from the second vector” which encompasses insignificant extra-solution activities of particular types of data (e.g. transmitting vector data) (MPEP 2106.05(g-h)), merely uses a computer (including generic computing components of multipliers, processing elements, and datastores) as a tool to perform an abstract idea which cannot provide significantly more (e.g. “apply it”) (see MPEP 2106.05(f)) and additional abstract ideas including mathematical relationship/calculations (multiplication operations). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 11, further recites “…wherein: the vector is a first vector in the input tensor, the multiplier is to perform multiplication operations on the first vector at a first time, the multiplier is to perform multiplication operations on a second vector in the input tensor at a second time that is different from the first time, and the second vector comprises one or more activations in the first vector”, which discloses additional limitations which use mere instructions to implement an abstract idea on a computer, or merely uses a computer (including generic computer components such as multipliers) as a tool to perform an abstract idea which cannot provide significantly more (e.g. “apply it”) (see MPEP 2106.05(f)) and/or it can also be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment vector processing (MPEP 2106.05(h)). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 12, further recites “…wherein: the multiplier is to perform multiplication operations on a third vector in the input tensor at a third time, the second time is after the first time and before the third time, and the third vector comprises one or more activations in the first vector or in the second vector”, which discloses additional limitations which use mere instructions to implement an abstract idea on a computer, or merely uses a computer (including generic computer components such as multipliers) as a tool to perform an abstract idea which cannot provide significantly more (e.g. “apply it”) (see MPEP 2106.05(f)) and/or it can also be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment vector processing (MPEP 2106.05(h)). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 13 further recites “…further comprising transmitting the vector from the datastore to the processing element by: reading another vector from the databank into a register file of the processing element, wherein the another vector comprises activations in the first vector and activations in the second vector, and the one or more activations in the first vector are determined based on a stride size of the convolutional layer” which encompasses insignificant extra-solution activities of particular types of data (e.g. transmitting the vector, reading vector data comprising activations) (MPEP 2106.05(g-h)) and an additional abstract idea including a mental process and/or mathematical relationship/calculation (determining one or more activations based on stride size of convolution layer). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claim 15, further recites “…wherein: the first multiplier is configured to perform multiplication operations on the second vector in a third operation round of the processing element, and the second operation round is between the first operation round and the third operation round”, which discloses additional limitations which use mere instructions to implement an abstract idea on a computer, or merely uses a computer (including generic computer components such as multipliers) as a tool to perform an abstract idea which cannot provide significantly more (e.g. “apply it”) (see MPEP 2106.05(f)) and/or it can also be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment vector processing (MPEP 2106.05(h)). Therefore, the claim recites no additional elements which could integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.
Claims 16-17, 19-23 and 25 are similarly rejected on the same basis as claims 1-2 and 6-8 above. (Note: Independent claims 16 and 21 include additional computer components such as a compute block, accelerator, and external memory; as well as an additional abstract idea of performing multiply-accumulate operations. However, the additional limitations merely recite generic computing components which fall under MPEP 2106.05(f) or recite an additional abstract idea. Thus, the additional limitations would not integrate the abstract idea into a practical application nor provide significantly more than the abstract idea itself.)
Allowable Subject Matter
Claims 1-13, 15-17, 19-23 and 25 would be allowable if rewritten to overcome the respective rejection(s) under 35 U.S.C. 112 and/or 35 U.S.C 101, set forth in this Office action.
Response to Arguments
Applicant’s arguments, see pages 14-15 of the remarks, filed on 5/6/2026, with respect to previous 35 USC 112(a-b) and 35 USC 103 rejections have been fully considered and are persuasive. Therefore, the previous 35 USC 112(a-b) and 35 USC 103 rejections has been withdrawn.
Applicant's arguments, with regards to the previous 35 USC 101 rejections filed on 5/6/2026, have been fully considered but they are not persuasive. Therefore, the previous 35 USC 101 rejections are maintained with regards to claim 1-13, 15-17, 19-23 and 25.
Applicant first argues, the 35 USC 101 rejection of claims 1, 16 and 21 on pages 12-13 of the remarks, in the substance that:
“Similarly, here, the Specification identifies improvements in machine learning model and the claim itself reflects the disclosed improvement. For example, amended claim 1 relates to a method of accelerating deep learning and requires a processing element including a multiplier "to perform multiplication operations on a third vector in the first operation round and in the second operation round" (emphasis added). The third vector is reused in two operation rounds in the claimed method. Amended claim 16 relates to a compute block that includes read circuitry to "read a sequence of activations from the datastore into a storage unit of the processing element, wherein a number of the activations in the sequence is larger than the number of the weights in the row of the kernel, and read a bitmap from the datastore into the storage unit of the processing element, wherein the bitmap comprises a sequence of bits, a number of bits having values of one in the bitmap equals the number of the weights in the row of the kernel, and the bitmap is to be applied on the sequence of activations to extract the one or more activations from the group" (emphasis added). The claimed compute block can load data with an optimal schedule. Amended claim 21 relates to a DNN accelerator that includes padding circuitry to "receive a bitmap stored in the datastore, the bitmap comprising a sequence of bits that includes one or more bits have a value of zero and one or more bits have a value of one, and modify the sequence of activations by adding one or more pad elements into the sequence to generate a new sequence of activations, the one or more pad elements having a predetermined value." The claimed DNN accelerator can increase the number of input channels through padding. These claims reflect improvements that are described in the Specification.”
It appears the applicant is arguing that the specification identifies improvements to a machine learning model and the claim itself reflects that improvement. The examiner notes the specification may identify an improvement to a machine learning model however no such improvement is reflected in the claim.
In regards to claim 1, it appears applicant highlights performing multiplication operations on a third vector in first and second operation rounds, which is a mathematical calculation indicating a third vector is used in first and second iterations (rounds) of multiplication operations. Thus, the recitation merely recites an abstract idea (mathematical concept) and cannot reflect an improvement because an improvement cannot flow from the abstract idea itself. (See MPEP 2106.05(a) “…It is important to note, the judicial exception alone cannot provide the improvement… However, it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology.) It appears applicant is attempting to indicating that somehow reusing a third vector in a multiplication operation reflects an improvement but at best it merely reflects an improvement of the abstract idea itself (e.g. the identified mathematical calculation) and not to the functioning of a computer nor how the machine learning model itself operates as in Ex Parte Desjardins.
In regards to claim 16, it appears applicant highlights “…read a sequence of activations from the datastore into a storage unit of the processing element, wherein a number of the activations in the sequence is larger than the number of the weights in the row of the kernel, and read a bitmap from the datastore into the storage unit of the processing element, wherein the bitmap comprises a sequence of bits, a number of bits having values of one in the bitmap equals the number of the weights in the row of the kernel, and the bitmap is to be applied on the sequence of activations to extract the one or more activations from the group" which discusses reading of activation data (insignificant extra-solution activity under MPEP 2106.05(g)) and additional mathematical relationships and/or mental processes (e.g. abstract ideas). For example, the limitation stating “…wherein a number of the activations in the sequence is larger than the number of the weights in the row of the kernel” reflects a mathematical relationship where N (number of activations)> M (number of weights in row), then using a bitmap to extract activations can be viewed as a mental process (e.g. using a bitmap (vector of bits such as a mask) to determine which activation values in a sequence to extract can be done using the mind, with the aid of pen and paper. Thus, ultimately the limitations are using abstract ideas to read data, which the applicant argues somehow indicates loading data with an optimal schedule. However, it is not apparent to a person of ordinary skill in the art how reading and extracting data based on the abstract ideas in claim 16 somehow loads data with an optimal schedule. MPEP 2106.04(d)(1) states “if the specification explicitly sets forth an improvement but only in a conclusory manner (i.e., a bare assertion of an improvement without the detail necessary to be apparent to a person of ordinary skill in the art), the examiner should not determine that the claim improves technology or a technical field” and thus the claim does not improve technology or a machine learning model because it is not apparent how data is loaded with an optimal schedule.
In regards to claim 21, it appears applicant highlights padding circuitry and argues that the DNN accelerator can increase the number of input channels through padding. However, based on paragraph [0037] of applicant’s specification it appears padding input channels in a well-understood, conventional and routine; and it additionally does not reflect an improvement but results in poor compute cycles. For example paragraph [0037] states “…Compared to many currently available DNN accelerators that process a first DNN layer by increasing the number of input channels through padding and resulting in idle compute cycles, this disclosure can improve utilization of the datastore…”, thus it appears applicant admits many commercially available DNN accelerators increase input channels of a first layer using padding and therefore padding circuitry is merely a generic computing component used to perform conventional activities of padding (MPEP 2106.05(d and f)). Furthermore, the applicant expressly admits that padding results in a negative outcome of idle compute cycles, thus applicant admits the limitations do not reflect an improvement to a DNN machine learning model, but rather reflects degradation of a processing a first DNN layer.
Applicant then argues, the 35 USC 101 rejection of claims 1, 16 and 21 on pages 13 of the remarks, in the substance that:
“Therefore, improved technology for accelerating the first layer (or even one or more of the subsequent layers) is needed." The Specification further provides in paraphs [0037] and [0038]: "[t]he disclosure can improve the performance of frontend layers in DNNs by employing an optimal schedule based on the spatial dimension to load data and increasing data reuse within data computation rounds. Furthermore, the disclosure allows input data for frontend layers to be stored in the spatial dimension through multiple storage structures in the DNN accelerator, which can reduce power and perform efficient data orchestration by maximizing data reuse. Compared to many currently available DNN accelerators that process a first DNN layer by increasing the number of input channels through padding and resulting in idle compute cycles, this disclosure can improve utilization of the datastore and the storage inside the PE array given the switching to data movement in the spatial dimension as opposed to the IC dimension. Also, data load bandwidth requirement can be reduced, and thereby improve performance of the layer. Furthermore, due to efficient data reuse across data load rounds, the overall power consumption of the DNN accelerator can be reduced. The disclose also take advantage of the sparsity mechanism that can accelerate backend layers to accelerate frontend layers by using the fixed sparsity bitmap" (emphasis added).
Therefore, the claimed invention reflects an improvement to the efficiency of DNN layers, such as frontend convolutional layers. And such improvement is identified in the Specification.”
The applicant argues above that claims 1, 16 and 21 reflect various improvements tied to processing a first DNN layer as stated in paragraphs [0037-0038]. However, the examiner respectfully disagrees. The examiner refers to MPEP 2106.04(d)(1-2), which details evaluating improvements to the functioning of a computer or technology and states “Conversely, if the specification explicitly sets forth an improvement but in a conclusory manner (i.e., a bare assertion of an improvement without the detail necessary to be apparent to a person of ordinary skill in the art), the examiner should not determine the claim improves technology…The application or use of the judicial exception in this manner meaningfully limits the claim by going beyond generally linking the use of the judicial exception to a particular technological environment.”
Applicant has merely stated in a conclusory manner that increasing data reuse within data computation rounds somehow improves frontend layer DNN performance, without any detail necessary to indicate how the reuse of the data improves DNN performance. Furthermore, claim 1 state “…performing multiplication operations on a third vector in a first and second operation round”, which does not apply the judicial exception (e.g. multiplication) in a manner that meaningfully limits the claim by going beyond generally linking the use of the judicial exception to a convolutional layer in a deep neural network. Thus, the claimed invention of claim 1 does not reflect an improvement to the efficiency of a DNN layer, but rather reflects an improvement to an abstract idea itself as discussed above in section 25.
Applicant additionally stated in a conclusory manner that an optimal schedule based on spatial dimension to load data somehow improves frontend layer DNN performance without the detail necessary to be apparent to a person of ordinary skill in the art. Furthermore, claim 16 merely discloses reading of activation data based on a using a bitmap to read or extract particular activations from a sequence, and the claim does not apply the judicial exception in a manner that meaningfully limits the claim by going beyond generally linking the use of the judicial exception to a convolutional layer in a deep neural network. Thus, the claimed invention of claim 16 does not reflect an improvement to the efficiency of a DNN layer.
Lastly, the applicant expressly indicates in paragraph [0037] that padding causes an increased number of channels resulting in a negative outcome of idle compute cycles, thus applicant admits the limitations do not reflect an improvement to the efficiency of DNN layers. Thus, based on applicant’s own admission in paragraph [0037] claim 21 would not reflect an improvement and thus would not overcome the previous 101 rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to COURTNEY P SPANN whose telephone number is (571)431-0692. The examiner can normally be reached M-F, 9am-6pm, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/COURTNEY P SPANN/ Primary Examiner, Art Unit 2183
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