Prosecution Insights
Prosecution Insights
Tech Center 2100 • Art Units: 2122 2183
This examiner grants 80% of resolved cases
Courtney P Spann works in Tech Center 2100 and Art Unit 2122, managing a portfolio of 269 resolved cases. The allowance rate of 79.9% is quite high, indicating a favorable environment for patent grants. This efficiency is supported by a median days to allowance of 1063, which establishes a clear timeline for applicants. The 269 resolved cases provide a statistically significant basis for these trends.
The interview lift of 22.0% is a significant factor for practitioners to consider. Even with a strong baseline allowance rate of 79.9%, the 22.0% lift suggests that interviews are highly effective at resolving remaining issues and securing an allowance. In the context of 269 resolved cases, this lift demonstrates a consistent benefit to verbal advocacy. Applicants should view the 1063 days to allowance as a standard duration that can be optimized through the 22.0% lift. The data from Art Unit 2122 suggests that while the examiner is generally inclined toward allowance, direct engagement provides a substantial additional advantage for securing a grant.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18968692 | PROCESSOR INSTRUCTION DISPATCH CONFIGURATION | Non-Final OA | Groq, Inc. |
| 19080438 | INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECISION INPUT OPERANDS | Non-Final OA | Intel Corporation |
| 18336826 | CONFIGURABLE PROCESSING RESOURCE EVENT FILTER FOR GPU HARDWARE-BASED PERFORMANCE MONITORING | Non-Final OA | Intel Corporation |
| 18193413 | VECTOR MULTIPLY-ADD/SUBTRACT WITH INTERMEDIATE ROUNDING | Final Rejection | Intel Corporation |
| 18172943 | SPECIFYING A PROCESSOR WITH ASSURED AND OPPORTUNISTIC CORES | Non-Final OA | Intel Corporation |
| 18091628 | INSTRUCTIONS AND SUPPORT FOR CONDITIONAL COMPARISON AND TEST | Final Rejection | INTEL CORPORATION |
| 18058114 | HARDWARE ARCHITECTURE TO ACCELERATE GENERATIVE ADVERSARIAL NETWORKS WITH OPTIMIZED SIMD-MIMD PROCESSING ELEMENTS | Final Rejection | Intel Corporation |
| 17991811 | EXECUTABLE PASSING USING MAILBOX REGISTERS | Final Rejection | Intel Corporation |
| 18055315 | ACCELERATING DATA LOAD AND COMPUTATION IN FRONTEND CONVOLUTIONAL LAYER | Non-Final OA | Intel Corporation |
| 17958367 | 8-BIT FLOATING POINT COMPARISON INSTRUCTIONS | Non-Final OA | Intel Corporation |
| 17953184 | SHORT PIPELINE FOR FAST RECOVERY FROM A BRANCH MISPREDICTION | Final Rejection | Intel Corporation |
| 17559804 | SIGNATURE-BASED AUTOMATIC OFFLOAD TO HARDWARE ACCELERATORS | Final Rejection | Intel Corporation |
| 17985869 | COMPLEX NUMBER MATRIX MULTIPLICATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS | Final Rejection | Altera Corporation |
| 18874316 | ACCELERATOR OFFLOAD DEVICE, ACCELERATOR OFFLOAD METHOD AND PROGRAM | Non-Final OA | Nippon Telegraph and Telephone Corporation |
| 19108327 | EVENT SIGNALS | Non-Final OA | Siemens Industry Software Inc. |
| 19075937 | PROCESSOR MICRO-ARCHITECTURE FOR REPEATED INSTRUCTION EXECUTION | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 19027541 | Forming Constant Extensions in the Same Execute Packet in a VLIW Processor | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 19015274 | PREVENTING INSTRUCTIONS FROM BEING PERFORMED | Final Rejection | NVIDIA Corporation |
| 18963825 | PROCESSOR WITH SECURE BRANCH PREDICTION FUNCTION AND SECURE BRANCH PREDICTION METHOD | Final Rejection | NATIONAL CHENG KUNG UNIVERSITY |
| 18919520 | COMPUTATIONAL MEMORY WITH COOPERATION AMONG ROWS OF PROCESSING ELEMENTS AND MEMORY THEREOF | Non-Final OA | At-memory Computing LP |
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