DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Acknowledgement is made of the amendment received on 1/5/2026. Claims 1-15 are pending in this application. Claim 1 is amended. Claims 11-15 remain withdrawn.
Claims 1-10 are presented in this Office Action.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-6 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Aliane et al. (US 2020/0168758; hereinafter ‘Aliane’) in view of Yamamoto et al. (2021 ECS J. Solid State Sci. Technol. 10 034005; hereinafter ‘Yamamoto’).
Regarding claim 1, Aliane teaches a planar photodiode (1, Figs. 1A and 1B, [0056]), comprising:
a main layer having a first face and a second face that are opposite one another and parallel to a main plane (10 having 10a and 10b, [0057]), made of a first crystalline semiconductor material based on germanium (10 based on germanium, [0059]), comprising a detection portion (10 is a detection portion, [0057]) formed of:
an n-type doped first region flush with the first face, intended to be electrically biased (11 flush with 10a and forms an n-doped well, [0060]);
a p-type doped second region flush with the second face (12 flush with 10b); and
an intermediate region, located between the doped first region and the doped second region and surrounding the doped first region in the main plane (13 between 11 and 12, and surrounding 11);
a peripheral lateral portion, made of a p-type doped second semiconductor material, surrounding the detection portion in the main plane, and coming into contact with the doped second region, and intended to be electrically biased (p+ doped 23 surrounding 10 and contacting 12, [0065]); and
a peripheral intermediate portion located in contact with the detection portion on the first face, and extending between and at a non-zero distance from the doped first region and from the peripheral lateral portion so as to surround the doped first region in the main plane (14 and 21 flush with 10a, surrounding 11 at non-zero distance, [0068]).
Aliane does not teach the planar photodiode comprising: a peripheral intermediate portion, made of an alternation of monocrystalline thin layers of silicon-germanium and germanium.
Yamamoto teaches a planar photodiode (Ge photodiode integration context, p1), comprising: a peripheral intermediate portion, made of an alternation of monocrystalline thin layers of silicon-germanium and germanium (Ge/SiGe superlattice formed by epitaxial growth, as confirmed by XRD-RSM and TEM, Figures 2, 5(b), and 5(c)).
As taught by Yamamoto, one of ordinary skill in the art would utilize and modify the above teaching into Aliane to obtain and achieve the planar photodiode comprising: a peripheral intermediate portion, made of an alternation of monocrystalline thin layers of silicon-germanium and germanium as claimed, because both Aliane and Yamamoto are directed to improving Ge photodiode performance, including reduction of dark current, and Yamamoto provides a known material structure for reducing defects that contribute to leakage current. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Yamamoto in combination with Aliane due to above reason.
Regarding claim 4, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, wherein the peripheral intermediate portion extends into a notch , called peripheral intermediate notch, of the detection portion located on the first face (Aliane:14 and 21 extend into 22, Fig. 2D, [0081]).
Regarding claim 5, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, comprising a central portion made of an n-type doped second crystalline semiconductor material, identical to the first crystalline semiconductor material, located in contact with the detection portion on the first face, and contributing to forming the doped first region (Aliane: n-type doped 25 in contact with 10a and forms 11 via diffusion, Fig 1B, [0074]).
Regarding claim 6, Aliane in view of Yamamoto teaches the planar photodiode according to claim 5, comprising an upper insulating layer covering the detection portion on the first face and the peripheral intermediate portion, and laterally surrounding part of the central portion that projects beyond the detection portion (Aliane:30 covering 10 on 10a and 14, and laterally surrounding part of 25, Fig. 1B, [0075]).
Regarding claim 8, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, comprising an upper portion located on and in contact with the detection portion, made of an n-type doped crystalline semiconductor material (Aliane: 25 located on and in contact with 10, made of n-type doped crystalline semiconductor material, Fig. 1B, [0084]).
Regarding claim 9, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, comprising metal contacts intended to electrically bias the photodiode, including at least one central metal contact electrically biasing the doped first region and at least one lateral metal contact coming into contact with the peripheral lateral portion (Aliane: 32 intended to electrically bias 1, including the central 32 contacting 11 and the side 32 contacting 23, Fig. 1B, [0075]).
Regarding claim 10, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, wherein the detection portion is made of germanium, and the peripheral lateral portion is based on silicon (Aliane: 10 based on germanium and 23 based on silicon, [0059, 0071]).
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Aliane (US 2020/0168758) in view of Yamamoto (2021 ECS J. Solid State Sci. Technol. 10 034005), and further in view of Nikiforov et al. (Nanoscale Res Lett 7, 561, 2012; hereinafter ‘Nikiforov’).
Regarding claim 2, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, but does not teach the planar photodiode wherein the monocrystalline thin layers of silicon-germanium comprise an atomic proportion of silicon at least equal to 70%.
Nikiforov teaches a planar photodiode (mid-infrared photodetector, Background, p. 1) wherein the monocrystalline thin layers of silicon-germanium comprise an atomic proportion of silicon at least equal to 70% (crystal Ge/GexSi1-x/Ge structure with x between 0.25 and 0.3, Figure 4, Results and discussion, p. 5).
As taught by Nikiforov, one of ordinary skill in the art would utilize and modify the above teaching into Aliane in view of Yamamoto to obtain and achieve the planar photodiode wherein the monocrystalline thin layers of silicon-germanium comprise an atomic proportion of silicon at least equal to 70% as claimed, because this composition range ensures paedomorphic growth of monocrystalline silicon-germanium layers without introducing lattice defects or dislocations, thereby reducing dark current while maintain optimal band alignment for mid-infrared detection (p. 5).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Nikiforov in combination with Aliane in view of Yamamoto due to above reason.
Regarding claim 3, Aliane in view of Yamamoto teaches the planar photodiode according to claim 1, but does not teach the planar photodiode wherein the monocrystalline thin layers of silicon-germanium and germanium each have a thickness less than or equal to 4 nm.
Nikiforov teaches a planar photodiode (mid-infrared photodetector, Background, p1) wherein the monocrystalline thin layers of silicon-germanium and germanium each have a thickness less than or equal to 4 nm (0.3 nm-thick Ge and 5 nm-thick GeSi, Figure 6).
Nikiforov does not explicitly teach that the thickness of silicon-germanium is less than or equal to 4 nm.
However, Nikiforov provides a teaching that the formation of atomically smooth GeSi layers indicates that the molecular beam epitaxy growth process achieved effective monolayer-level growth control, as further supported using reflection high-energy electron diffraction monitoring (Methods, pp. 2-3).
As taught by Nikiforov, one of ordinary skill in the art would utilize and modify the above teaching into Aliane in view of Yamamoto to obtain and achieve the planar photodiode wherein the monocrystalline thin layers of silicon-germanium and germanium each have a thickness less than or equal to 4 nm as claimed, because this thickness range of Ge and GeSi layers allows for optimal strain engineering and band structure control while preventing the formation of defects and dislocations (Results and discussion, p. 5).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Nikiforov in combination with Aliane in view of Yamamoto due to above reason.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Aliane (US 2020/0168758) in view of Yamamoto (2021 ECS J. Solid State Sci. Technol. 10 034005), and further in view of Koeck et al. (US 2020/0343344; hereinafter ‘Koeck’).
Regarding claim 7, Aliane in view of Yamamoto teaches the planar photodiode according to claim 5, but does not teach the planar photodiode comprising an upper portion located on and in contact with the central portion, made of an n-type doped crystalline semiconductor material.
Koeck does teach a planar photodiode (10, FIG. 2B, [0044]) comprising an upper portion located on and in contact with the central portion, made of an n-type doped crystalline semiconductor material (22 located on and in contact with 16 and is n-type doped nanocrystalline, [0053-0054]).
As taught by Koeck, one of ordinary skill in the art would utilize and modify the above teaching into Aliane in view of Yamamoto to obtain and achieve the planar photodiode comprising an upper portion located on and in contact with the central portion, made of an n-type doped crystalline semiconductor material as claimed, because it serves to reduce contact resistance between the metal contact and the underlying semiconductor layer [0052]. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Koeck in combination with Aliane in view of Yamamoto due to above reason.
Response to Arguments
Applicant's arguments filed 1/5/2026 have been fully considered but they are not persuasive.
Regarding claim 1
As set forth in the Office Action, Aliane teaches the claimed planar photodiode structure, including the detection portion, doped regions, and the peripheral region surrounding the first doped region.
The only distinction between Aliane and claim 1 resides in the recitation of a peripheral intermediate portion comprising an alternation of monocrystalline thin layers of SiGe/Ge.
Yamamoto teaches a SiGe/Ge superlattic comprising alternating monocrystalline layers formed by epitaxial growth, and further teaches that such structures improve crystallinity and reduce defect density, which is associated with reduced dark current in Ge photodiodes.
It would have been obvious to incorporate the SiGe/Ge multilayer structure of Yamamoto into the peripheral region of Aliane, since both references are directed to improving the performance of Ge photodiodes, including reduction of dark current, and Yamamoto provides a known structure for reducing defects that contribute to leakage current.
Regarding claim 1, Applicant submits, in page 7 of Remark that “Yamamoto's teaching concerns growth on a so-called blanket substrate. and not the formation of a sub-structure in a diode structure such as in the case of the invention. No masking, doping or metallization steps are mentioned in Yamamoto.”.
The examiner respectfully disagrees.
Yamamoto is relied upon for its teaching of a SiGe/Ge multilayer semiconductor structure and its effect on improving crystallinity and reducing defects. The rejection does not rely of Yamamoto for masking, doping, or metallization steps, but rather for its teaching of the multilayer semiconductor structure. Such material structures are not limited to blanket substrates, and one of ordinary skill in the art would have recognized their applicability to device structures, including photodiodes, where similar material properties are desired.
When considered in combination with Aliane, such teaching would have suggested incorporating the SiGe/Ge multilayer structure into the claimed photodiode.
Yamamoto further teaches that improved crystallinity is required for achieving low dark current in Ge photodiodes and discusses integration of Ge photodiodes into CMOS platforms.
Applicant further submits, in page 8 of Remark that “This teaching concerns the reduction of the number of dislocations in a thick Ge layer formed after the superlattice, whereas in the claimed invention, the thick Ge layer is formed before the SL superlattice and cannot benefit from Yamamoto’s teaching.”.
The examiner respectfully disagrees.
Reduction of dislocations and improvement of crystallinity directly influence recombination mechanisms and leakage current in semiconductor devices. Yamamoto teaches that improved crystallinity is associated with reduced dark current in Ge photodiodes. When considered in combination with Aliane, such improvement in crystallinity would have suggested reducing leakage-related effects in the photodiode structure.
Applicant additionally submits, in page 8 of Remark that “Yamamoto teaches the reduction of crystalline defects related to epitaxy. whereas those in the claimed invention result from ion implantation steps for doping.”.
The examiner respectfully disagrees.
The distinction between defect origin (epitaxial versus implantation-induced) does not negate the relevance of Yamamoto’s teaching. Reduction of crystalline defects, regardless of their origin, improves crystallinity and reduces recombination centers, which directly impacts leakage current and dark current in semiconductor devices.
When considered in combination with Aliane, such reduction in defect-related recombination would have suggested improving the performance of the photodiode.
Regarding claim 3
Applicant submits, in page 8 of Remark that “Yamamoto uses SL layers thicker than 7.5nm,whereas the present claims use layers of 4nm or thinner (R3)”.
The examiner respectfully disagrees.
The rejection relies on Nikiforov, which teaches ultrathin epitaxial layers and demonstrates nanometer-scale thickness control in GeSi/Ge multilayer structures. Nikiforov further evidences the capability of controlling layer thickness at the atomic or nanometer scale. Accordingly, selection and optimization of layer thickness at the nanometer scale, including thicknesses less than or equal to 4 nm, would have been within the routine skill of the art.
When applied in combination with Aliane, such optimization would have resulted in the claimed thickness range.
Further details are included in the above rejection.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 4/14/26
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