DETAILED ACTION
This Office Action is responsive to the Applicant’s communication filed 2 December 2022. In view of this communication, claims 1-15 and 21-25 are pending in the application. Claims 16-20 were canceled by the Applicant in the reply filed 10 February 2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group 1, claims 1-15, in the reply filed on 10 February 2026 is acknowledged.
Claim Objections
Claim 21 is objected to because of the following informalities: Claim 21 recites “a second build-up layers” in the second-to-last line of the claim. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 5-7, and 10-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jung et al. (KR 20180007579 A), hereinafter referred to as Jung et al.
Regarding claim 1, Jung et al. teaches an integrated circuit package substrate comprising:
a core layer (10) (page 2, last paragraph: first insulating layer 10);
a plurality of build-up layers (L1) on the core layer, each build-up layer comprising a dielectric and metal (page 2, last paragraph: the build-up layer L1 comprises insulating layers 20 and circuit pattern layers 25 formed on each insulating layer 20); and
a cavity (H), wherein a first portion of the cavity (H) is defined in a first build-up layer (20), a second portion of the cavity is defined in a second build-up layer (20), and a third portion of the cavity (H) connects the first portion with the second portion through at least one layer other than first build- up layer (20) and the second build-up layer (20) (Fig. 1 and page 2, last paragraph: the first build-up layer L1 comprises three insulating layers 20, through which the cavity H runs).
Regarding claim 5, Jung et al. teaches the integrated circuit package substrate of claim 1, wherein the first cavity (H) is defined at least in part by metal (25) within the first build-up layer (L1) and the second cavity (H) is defined at least in part by metal (25) within the second build-up layer (L1) (Fig. 1 and page 2, last paragraph: the hole H is lined at least in part by metal layers 25).
Regarding claim 6, Jung et al. teaches the integrated circuit package substrate of claim 1, wherein the first portion of the cavity (H) is a first microchannel, the second portion of the cavity (H) is a second microchannel, and the third portion of the cavity (H) is a duct connecting the first microchannel and the second microchannel (Fig. 1 and page 2, last paragraph: the pipe H defines one continuous channel, with a portion connecting the upper and lower sections).
Regarding claim 7, Jung et al. teaches the integrated circuit package substrate of claim 6, wherein the first portion of the cavity (H) is defined by a first cross-section in the first build-up layer (L1), the second portion of the cavity (H) is defined by a second cross-section in the second build-up layer (L1), and the third portion of the cavity (H) is defined by a third cross-section between the first build-up layer (L1) and the second build-up layer (L1) (Fig. 1: each section of pipe H has a cross section).
Regarding claim 10, Jung et al. teaches the integrated circuit package substrate of claim 1, wherein the first portion, second portion, and third portion of the cavity (H) together define a microchannel (Fig. 1: the hole H defines a channel from the exterior of the package to the interior).
Regarding claim 11, Jung et al. teaches the integrated circuit package substrate of claim 10, wherein the first portion of the cavity (H) is defined by a first cross-section in the first build-up layer (L1), the second portion of the cavity (H) is defined by a second cross-section in the second build-up layer (L1), and the third portion of the cavity (H) is defined by a third cross-section between the first build-up layer (L1) and the second build-up layer (L1) (Fig. 1: each section of pipe H has a cross section).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in view of Hoofman (US 20090120669 A1), hereinafter referred to as Hoofman.
Regarding claim 13, Jung et al. teaches the integrated circuit package substrate of claim 1, but does not teach that the core layer comprises a glass material.
Hoofman does teach that the core layer comprises a glass material (Hoofman paragraph 10: insulating layers may be made of glass).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the core layer of Jung et al. from glass as taught by Hoofman because it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416."
Regarding claim 14, Jung et al. teaches the integrated circuit package substrate of claim 1, but does not teach that the first build-up layer comprises a glass material and the second build-up layer comprises a glass material.
Hoofman does teach that the first build-up layer comprises a glass material and the second build-up layer comprises a glass material (Hoofman paragraph 10: insulating layers may be made of glass).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the build-up layers of Jung et al. from glass as taught by Hoofman because it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416."
Claim(s) 21-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. in view of Stephens, IV (US 20060203866 A1), hereinafter referred to as Stephens.
Regarding claim 21, Jung et al. teaches an apparatus comprising: an integrated circuit package comprising a package substrate, the package substrate comprising:
a core layer (10) (page 2, last paragraph: first insulating layer 10);
first build-up layers (L1) on a first side of the core layer (10), the first build-up layers (L1) comprising metallization layers (25) in dielectric (20) (page 2, last paragraph: the build-up layer L1 comprises insulating layers 20 and circuit pattern layers 25 formed on each insulating layer 20);
second build-up layers (L2) on a second side of the core layer (10) opposite the first build-up layers (L1), the second build-up layers (L2) comprising metallization layers (35) in dielectric (30) (page 3, paragraph 4: upper build up layers L2 comprising insulating layers 30 and circuit pattern layers 35 formed on each insulating layer 30); and
a cavity (C, H), wherein a first portion (H) of the cavity (C, H) is defined in the first build-up layers (L1) (Fig. 1 and page 2, last paragraph: hole H runs through the first build-up layers L1).
Jung et al. does not teach a second portion of the cavity (40) is defined in the second build-up layers (14, 16), and a third portion of the cavity (40) connects the first portion with the second portion through the core layer (Stephens Fig. 1 and paragraph 30: coolant channel 40 runs from lowest layer 33 to upper layer 14/16 through substrate layer 33).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to extend the cavity of Jung et al. to the upper build-up layers as taught by Stephens because extending the cavity would provide cooling and thus improved performance to the upper build-up layers (Stephens paragraph 30).
Regarding claim 22, Jung et al. in view of Stephens teaches the apparatus of claim 21, but does not teach that the first portion of the cavity is a first microchannel, the second portion of the cavity is a second microchannel, and the third portion of the cavity is a duct connecting the first microchannel and the second microchannel.
Stephens does teach that the first portion of the cavity (40) is a first microchannel, the second portion of the cavity (40) is a second microchannel, and the third portion of the cavity (40) is a duct connecting the first microchannel and the second microchannel (Stephens Fig. 1 and paragraph 30: coolant channel 40).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the cavity of Jung et al. as a microchannel as taught by Stephens because the microchannel of Stephens provides efficient cooling via a coolant (Stephens paragraphs 30-31).
Regarding claim 23, Jung et al. in view of Stephens teaches the apparatus of claim 21, but does not teach that the first portion, the second portion, and the third portion of the cavity together define a microchannel.
Stephens does teach that the first portion, the second portion, and the third portion of the cavity together define a microchannel (Stephens Fig. 1 and paragraph 30: coolant channel 40).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the cavity of Jung et al. as a microchannel as taught by Stephens because the microchannel of Stephens provides efficient cooling via a coolant (Stephens paragraphs 30-31).
Claim(s) 24-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bakir et al. (US 20090294954 A1) in view of Jung et al.
Regarding claim 24, Bakir et al. teaches a computing system comprising: a main circuit board (105); and an integrated circuit package (125) coupled to the main circuit board (105) (see Bakir et al. paragraph 30 and Fig. 1) but does not teach that the integrated circuit package comprises: a package substrate; an integrated circuit die coupled to the package substrate; wherein the package substrate defines a cavity comprising a first portion in a first build-up layer of the package substrate, a second portion in a second build-up layer of the package substrate, and a third portion that connects the first portion with the second portion.
Jung et al. does teach that the integrated circuit package comprises: a package substrate; an integrated circuit die (50) coupled to the package substrate; wherein the package substrate defines a cavity (H) comprising a first portion in a first build-up layer (20) of the package substrate, a second portion in a second build-up layer (20) of the package substrate, and a third portion that connects the first portion with the second portion (Fig. 1 and page 2, last paragraph: the first build-up layer L1 comprises three insulating layers 20, through which the cavity H runs).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the computing system of Bakir et al. with a package substrate as taught by Jung et al. because the package substrate of Jung et al. enables improved cooling of the electronic device (see Jung et al. page 3, third-to-last paragraph).
Regarding claim 25, Bakir et al. in view of Jung et al. teaches the computing system of claim 24, wherein the third portion of the cavity is at least partially within a core layer of the package substrate (Jung et al. Fig. 1: part of the cavity is in core layer 10).
Allowable Subject Matter
Claims 2-4, 8-9, 12, and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in the claim that the third portion is defined in a plurality of build-up layers other than the first build-up layer and the second build-up layer.
Regarding claim 3, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in the claim that the first build-up layer is on a first side of the core layer, the second build-up layer is on a second side of the core layer, and the third portion of the cavity connecting the first portion and the second portion is defined at least in part in the core layer.
Regarding claim 8, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in the claim that the cavity comprises a fourth portion that connects the first portion of the cavity with the second portion of the cavity.
Regarding claim 9, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in the claim that the first microchannel defines a first sealed heat pipe structure and the second microchannel defines a second sealed heat pipe structure.
Regarding claim 12, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in the claim that the microchannel defines a sealed heat pipe structure.
Regarding claim 15, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in the claim a hydrophilic material on a wall of the cavity.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to John B Freal whose telephone number is (571)272-4056. The examiner can normally be reached Mon-Fri 7:00-3:00.
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/JOHN B FREAL/Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847