DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 7-11 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 24 November 2025.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Formation of Flip-Chip Bonding Areas Using Selective Removal of Non-Etched Adhesion Promoter (NEAP)”
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Stiborek (U.S. 2020/0273720).
Regarding Claim 1, Stiborek, Figures 4-11, disclose a method, comprising:
attaching a semiconductor die onto a die mounting surface of a substrate, the substrate having a non-etched adhesion promoter (NEAP) layer on the die mounting surface, the semiconductor die having an attachment surface including a first die area and a second die area, the first and second die areas wettable by electrically conductive solder material, the first and second die areas being mutually electrically isolated,
wherein the method includes:
selectively removing the NEAP layer from a first substrate area and a second substrate area of the die mounting surface of the substrate, the first substrate area and the second substrate area of the substrate have complementary shapes with respect to the first die area and the second die area of the semiconductor die, respectively (first and second substrate areas 110, substrate 102, die 902, selective removal process 600);
dispensing the electrically conductive solder material on the first substrate area and the second substrate area of the substrate (die attachment material 908/906, dispensing process 900); and
flipping the semiconductor die onto the die mounting surface with the first die area and the second die area aligned with the first substrate area and the second substrate area of the substrate, respectively, having the electrically conductive solder material dispensed thereon, the electrically conductive solder material electrically coupling:
the first die area to the first substrate area, and
the second die area to the second substrate area (die 902, electrically conductive solder material 908/906).
Regarding Claim 2, Stiborek, Figures 4-11, further disclose the method of claim 1, wherein selectively removing the NEAP layer includes laser ablating the NEAP layer at the first substrate area and the second substrate area of the die mounting surface of the substrate ([0037]).
Regarding Claim 3, Stiborek, Figures 4-11, further disclose the method of claim 1, wherein selectively removing the NEAP layer includes: removing the NEAP layer over the entirety of the first substrate area and the second substrate area of the die mounting surface of the substrate, or removing the NEAP layer over a portion of the first substrate area and the second substrate area of the die mounting surface of the substrate (first substrate area and second substrate area 110).
Regarding Claim 4, Stiborek, Figures 4-11, further disclose the method of claim 1, wherein selectively removing the NEAP layer includes removing the NEAP layer over a portion of the first substrate area and the second substrate area of the die mounting surface of the substrate, the removing of the NEAP layer following a striped pattern (striped pattern 110).
Claim(s) 12 and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Stiborek (U.S. 2020/0273720).
Regarding Claim 12, Stiborek, Figures 4-11, disclose a method, comprising:
exposing a first portion of a die mounting surface of a lead frame by removing a first portion of a non-etched adhesion promoter (NEAP) layer on the die mounting surface (NEAP 104, lead frame 102, first portion 110, removal process 600);
dispensing attachment material on the first portion of the die mounting surface (die attachment material 908/906, dispensing process 900);
and attaching a semiconductor die to the lead frame by positioning the semiconductor die on the attachment material (die 902, attachment material 908/906).
Regarding Claim 16, Stiborek, Figures 4-11, further disclose the method of claim 12, further comprising: exposing a second portion of the die mounting surface of the lead frame by removing a second portion of the NEAP layer on the die mounting surface; and dispensing the attachment material on the second portion of the die mounting surface (second portion 110).
Regarding Claim 17, Stiborek, Figures 4-11, further disclose the method of claim 12 wherein the NEAP layer is a continuous layer that covers the die mounting surface (NEAP 104).
Regarding Claim 18, Stiborek, Figures 4-11, further disclose the method of claim 12 wherein the removing of the first portion of the NEAP layer includes removing a plurality of rectangular portions of the NEAP layer (rectangular portions 110).
Regarding Claim 19, Stiborek, Figures 4-11, further disclose the method of claim 12 wherein the attachment material is electrically conductive, and electrically couples the lead frame to the semiconductor die ([0038]).
Regarding Claim 20, Stiborek, Figures 4-11, further disclose the method of claim 12 wherein the NEAP layer includes an oxide layer ([0036]).
Claim(s) 21 and 24-25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Stiborek (U.S. 2020/0273720).
Regarding Claim 21, Stiborek, Figures 4-11, disclose a method, comprising:
forming a non-etched adhesion promoter (NEAP) layer on a lead frame (NEAP 104, oxidation process 500);
exposing a portion of the lead frame by removing a portion of the NEAP layer (portion 110, laser ablation process 600);
forming die attachment material on the exposed portion of the lead frame (die attachment material 908/906, forming process 900); and
positioning a semiconductor die on the die attachment material (die 902, substrate 102, NEAP 104, solder material 908).
Regarding Claim 24, Stiborek, Figures 4-11, further disclose the method of claim 21, wherein the removing of the portion of the NEAP layer includes laser ablating the NEAP layer ([0037]). .
Regarding Claim 25, Stiborek, Figures 4-11, further disclose the method of claim 21 wherein the NEAP layer includes an oxide layer ([0036]). .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Stiborek (U.S. 2020/0273720) as applied to claim 1 above, and further in view of Guevara et al. (U.S. 2022/0320038).
Regarding Claim 5, Stiborek does not explicitly disclose wherein selectively removing the NEAP layer includes ablating material of the substrate underlying the NEAP layer at the first substrate area and the second substrate area of the die mounting surface of the substrate. In the same field of endeavor, Guevara et al. disclose ablating material underneath an oxide layer and out of a first substrate area and a second substrate area of a die mounting surface of a leadframe (Guevara et al., lead frame 410, first substrate area 461, second substrate area 463, Figures 4a-d, [0039]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to ablate material of the substate underlying the NEAP layer at the first substrate area and the second substrate area of the die mounting surface of the substrate in Stiborek in view of Guevara et al. in order to provide additional area of solder (Guevara et al., [0054]).
Regarding Claim 6, Stiborek in view of Guevara et al. further discloses overfilling the first substrate area and the second substrate area of the die mounting surface of the substrate with the electrically conductive solder material (Guevara et al., flux 476, substrate 458, Figures 4a-d).
Claims 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Stiborek (U.S. 2020/0273720) as applied to claim 12 above, and further in view of Guevara et al. (U.S. 2022/0320038).
Regarding Claim 13, Stiborek does not explicitly discloses wherein the removing of the first portion of the NEAP layer includes forming a recess in the first portion of the die mounting surface. In the same field of endeavor, Guevara et al. discloses wherein removing an oxide layer includes forming a recess in a first portion of a die mounting surface (Guevara et al., die mounting surface 410, first portion 461, Figures 4a-d, [0039]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form a recess in the first portion of the die mounting surface in Stiborek in view of Guevara et al. in order to provide additional area of solder (Guevara et al., [0054]).
Regarding Claim 14, Stiborek in view of Guevara et al. further discloses the method of claim 13, wherein the dispensing of the attachment material includes filling the recess with the attachment material (Guevara et al., attachment material 469, Figure 4cc).
Regarding Claim 15, Stiborek in view of Guevara et al. further discloses wherein the dispensing of the attachment material includes overfilling the recess with the attachment material such that attachment material extends past the die mounting surface (Guevara et al., attachment material 469, Figure 4cc).
Claims 22 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Stiborek (U.S. 2020/0273720) as applied to claim 21 above, and further in view of Guevara et al. (U.S. 2022/0320038).
Regarding Claim 22, Stiborek does not explicitly disclose wherein the exposing of the portion of the lead frame includes forming a recess in the lead frame by removing a portion of the lead frame. In the same field of endeavor, Guevara et al. discloses exposing a portion of a lead frame, including forming a recess in the lead frame by removing a portion of the lead frame (Guevara et al., die mounting surface 410, first portion 461, Figures 4a-d, [0039]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to expose a portion of a lead frame, including forming a recess in the lead frame by removing a portion of the lead frame, in Stiborek in view of Guevara et al. in order to provide additional area of solder (Guevara et al., [0054]).
Regarding Claim 23, Stiborek in view of Guevara et al. further discloses wherein the forming of the die attachment material includes overfilling the recess such that a portion of the die attachment material is formed on the NEAP layer (Guevara et al., top surface of lead frame 460, attachment material 469, Figure 4cc).
Conclusion
Any inquiry concerning this communication or earlier communications from the Examiner should be directed to Abbigale Boyle whose telephone number is 571-270-7919. The Examiner can normally be reached from 11 A.M to 7 P.M., Monday through Friday.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, Zandra Smith, can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Abbigale Boyle
Examiner, Art Unit 2899
/ABBIGALE A BOYLE/Examiner, Art Unit 2899
/DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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