Prosecution Insights
Last updated: August 17, 2026
Application No. 18/064,170

MULTIPLE PROCESSES SHARING GPU MEMORY OBJECTS

Final Rejection §102§103
Filed
Dec 09, 2022
Examiner
KE, PENG
Art Unit
2194
Tech Center
2100 — Computer Architecture & Software
Assignee
Amd
OA Round
3 (Final)
53%
Grant Probability
Moderate
4-5
OA Rounds
1y 1m
Est. Remaining
75%
With Interview

Examiner Intelligence

Grants 53% of resolved cases
53%
Career Allowance Rate
120 granted / 226 resolved
-1.9% vs TC avg
Strong +22% interview lift
Without
With
+22.3%
Interview Lift
resolved cases with interview
Typical timeline
4y 9m
Avg Prosecution
18 currently pending
Career history
247
Total Applications
across all art units

Statute-Specific Performance

§101
12.2%
-27.8% vs TC avg
§103
55.0%
+15.0% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
7.5%
-32.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 226 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detail Information On 03/30/2026, the amendment filed on 3/30/2026, claims 1-20 are pending, claims 1-3, 6, 8, 9, and 15 have been amended. This is a Final Action. Response to Arguments Applicant argued that Liu does not teaches “obtain from stored data accessible to the plurality of instances” of “one or more identifiers,” specifically, Liu does not teach retrieving it from stored data accessible to the plurality of instance. Examiner disagrees. Liu teaches multiple instances can retrieve immutable or mutable parameter. Immutable/mutable parameters are backed up by the same GPU physical pages created inside the GPU and the mutable parameters are backed up by different GPU memory pages for different inference application instances. See Liu p0071. It is noted that immutable and immutable parameters are shareable data objects among the applications instances. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 8 and 15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Liu US Publication 2022/0318565. 18/064,170 Liu US Publication 2022/0318565 Claim 1 An apparatus comprising: circuitry configured to: Liu Fig. 12, Fig. 14; p0071-p0076; p0078-p0083; create a plurality of instances of an application to be executed by a processor; Liu Fig. 12, Fig. 14; p0071-p0076; p0078-p0083; In response to a function call of the application being made by a first instance of plurality of instances, obtain from stored data accessible to the plurality of instance one or more of shareable data object, and Liu p0038-p0077; Liu teaches immutable parameters are backed up by the same GPU physical pages created inside the GPU and the mutable parameters are backed up by different GPU memory pages for different inference application instances. However, either immutable or mutable parameters are inside the GPU, and computations from all inference application instances are executed in the GPU as well. Thus, during computation, there is no IO between the CPU memory and GPU memory. It is noted that immutable and immutable parameters are shareable data objects among the applications instances. Provide the one or more identifiers for use in executing the function call. Liu Fig. 12, Fig. 14; p0038-p0070; p0071-p0076; p0078-p0083; As per claims 8 and 15, they are rejected under the same rationale as claim 1. See rejection above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 8, 9, 10, 15, 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Tess US 2023/0027817 in view Liu US Publication 2022/0318565. 18/064,170 Tesse US 2023/0027817 in view of Liu US Publication 2022/0318565 Claim 1 An apparatus comprising: circuitry configured to: create a plurality of instances of an application; Tesse p0157-p0168; Liu teaches manages a plurality of instance of a single application with in a computer environment; Liu Fig. 12, Fig. 14; p0038-p0070; p0071-p0076; p0078-p0083; It would have been obvious at the time of the invention for a person ordinary skill in the art (POSITA) to include Liu’s teaching with Tesse’s method in order to provider user with ability to deploy multiple instance of the same inference application to satisfy real-time requirement of inference application. In response to a function call of the application being made by a first instance of the plurality of instances, obtain from stored data accessible to the plurality of instances, one or more identifiers of shareable data objects; and Tesse p0171-p0187; each method is a function call. It is noted that the hash function is apply to the mapping module. See Tesse p0202-0210; Liu p0038-p0077; Liu teaches immutable parameters are backed up by the same GPU physical pages created inside the GPU and the mutable parameters are backed up by different GPU memory pages for different inference application instances. Provide the one or more identifiers for use in executing he function call. Tesse p0200-0210; Claim 2 The apparatus as recited in claim 1, wherein the circuitry is configured to transmit a lookup request to the data and receive a lookup response identifying the one or more shareable data objects. See Liu teaches ROM p0079-p0083; See Tesse p0202-p0210; Tesse teaches threshold size. See Tesse p0075; Claim 3 The apparatus as recited in claim 1, wherein the circuitry is further configured to free data storage allocated for the first instance to be used for storing a first data object, in response to determining the first data object is already shared by one or more instances of the plurality of instances of the application being executed by a processor. See Liu Fig. 10, p0065-p0079 See Tesse p0200 See Tesse p0205-p0207; As per claims 8 and 9, they are rejected under the same rationale as claims 1 and 2. See rejection above. As per claim 15, it is rejected under the same rationale as claim 1. See rejection above. 18/064,170 Tesse US 2023/0027817 in view of Liu US Publication 2022/0318565 Claim 16 The computing system as recited in claim 15, wherein the first processor is further configured to search for shareable data objects to be used by the second processor when executing the first instance of the function call, in further response to determining one or more of: See Liu p0079-p0083; See Tesse p0202-p210; threshold sized. See Tesse p0075; A data object used by the function call is a non-writeable data object; and A size of the data object used by the function call is greater than a size threshold. See Liu p0079-p0083; See Tesse p0202-p210; threshold sized. See Tesse p0075; 18/064,170 Tess US 2023/0027817 in view Liu US Publication 2022/0318565 Claim 10 The method as recited in claim 8, further comprising freeing, by the first processor, data storage allocated for the first instance to be used for storing a first data object, in response to determining the first data object is already shared by one or more instances of the plurality of instances of the application being executed by the second processor. Liu teaches determine particular object is already shared by one or more instance of multiple instances being executed by the second processor. Liu Fig. 12, Fig. 14; p0038-p0070; p0071-p0076; p0078-p0083; As per claim 17, it is rejected under the same rationale as claim 10. See rejection above. Claims 4 are rejected under 35 U.S.C. 103 as being unpatentable over Tess US 2023/0027817 in view Liu US Publication 2022/0318565 and White US 5,603,031 18/064,170 Tess US 2023/0027817 in view Liu US Publication 2022/0318565 and White US 5,603,031 Claim 4 The apparatus as recited in claim 3, wherein the circuitry is further configured to: translate a first identifier of a first type of the first data object to a second identifier of a second type; and search, using the second identifier, a table storing one or more mappings between identifiers of the second type and pointers identifying memory locations that store data objects in address ranges of the plurality of instances of the application. Tesse teaches PTP method of identifies address that can used to route the message. Tesse p0175 White teaches translate first identifier to second identifier; c78:38-50 and search based on different identifier; c88:45-65; It would have been obvious at the time of the invention for a person ordinary skill in the art (POSITA) to include White’s teaching with Tesse’s method in order to provider user with related search result. Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Tess US 2023/0027817 in view Liu US Publication 2022/0318565, White US 5,603,031 and Chinthekindi US Patent 10,628,298. 18/064,170 Tess US 2023/0027817 in view Liu US Publication 2022/0318565, White US 5,603,031 and Chinthekindi US Patent 10,628,298 Claim 5 The apparatus as recited in claim 4, wherein the circuitry is further configured to generate the second identifier by performing a hash function using at least the first identifier. Chinthekindi teaches generate second structure that contain identifier that has generating hashes of the unique identifiers of the data objects. See Chinthekindi c16:5-20; It would have been obvious at the time of the invention for a person ordinary skill in the art (POSITA) to include Chinthekindi’s teaching with Tesse’s method in order to provider user with related search result. Claim 6 The apparatus as recited in claim 4, wherein the circuitry is further configured to maintain data storage allocated for the first instance to be used for storing a second data object, in response to determining the second data object is not already shared by one or more instances of the plurality of instances of the application being executed by the processor. Chinthekindi teaches share data on data-center and as a single point of access. See Chinthekindi c10:20-32; It would have been obvious at the time of the invention for a person ordinary skill in the art (POSITA) to include Chinthekindi’s teaching with Tesse’s method in order to provide user with cloud service of their database. Claim 7 The apparatus as recited in claim 6, wherein the circuitry is further configured to: store a copy of the second data object in a particular memory location of data storage allocated for the first instance; and store, in the table, a mapping between an identifier of the second type of the second data object and the particular memory location. Tesse p0175 White c78:38-50; c88:45-65; Chinthekindi c10:20-32; Claims 11-14 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Tess US 2023/0027817 in view Liu US Publication 2022/0318565 and White US 5,603,031. 18/064,170 Tess US 2023/0027817 in view of Liu US Publication 2022/0318565 and White US 5,603,031 Claim 11 The method as recited in claim 10, further comprising: translating, by the first processor, a first identifier of a first type of the first data object to a second identifier of a second type; and searching, by the first processor using the second identifier, a table storing one or more mappings between identifiers of the second type and pointers identifying memory locations that store data objects in address ranges of the plurality of instances of the application. Tesse teaches PTP method of identifies address that can used to route the message. Tesse p0175 White teaches translate first identifier to second identifier; c78:38-50 and search based on different identifier; c88:45-65; It would have been obvious at the time of the invention for a person ordinary skill in the art (POSITA) to include White’s teaching with Tesse’s method in order to provider user with related search result. Claim 12 The method as recited in claim 11, further comprising generating, by the first processor, the second identifier by performing a hash function using at least the first identifier. White teaches translate first identifier to second identifier; c78:38-50 and search based on different identifier; c88:45-65; Claim 13 The method as recited in claim 11, further comprising maintaining, by the first processor, data storage allocated for the first instance to be used for storing a second data object, in response to determining the second data object is not already shared by one or more instances of the plurality of instances of the application being executed by the second processor. Liu Fig. 12, Fig. 14; p0038-p0070; p0071-p0076; p0078-p0083; It would have been obvious at the time of the invention for a person ordinary skill in the art (POSITA) to include Liu’s teaching with Tesse’s method in order to reduce the amount of memory allocated by multiple instances. Claim 14 The method as recited in claim 13, further comprising: storing, by the first processor, a copy of the second data object in a particular memory location of data storage allocated for the first instance; and storing, by the first processor in the table, a mapping between an identifier of the second type of the second data object and the particular memory location. Tesse p0175 White c78:38-50; c88:45-65; Liu Fig. 12, Fig. 14; p0038-p0070; p0071-p0076; p0078-p0083;; As per claims 18-20, they are rejected under the same rationale as claims 11, and 13-14. See rejections above. Related Prior Art Here is a list of references relates to processor and memory management: Smolen US 2007/0260621: System and method for an Immutable identification scheme in a large-scale Computer System. Shapiro US 8,601,206: Method And System For Object-based Transactions In A Storage System. Brown US 10,614,131: Methods And Apparatus Of An Immutable Threat Intelligence System. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENG KE whose telephone number is (571)272-4062. The examiner can normally be reached M-F 6:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kevin Young can be reached at (571) 270-3180. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. PENG KE Primary Examiner Art Unit 2194 /PENG KE/Primary Examiner, Art Unit 2194
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Prosecution Timeline

Dec 09, 2022
Application Filed
Aug 19, 2025
Non-Final Rejection mailed — §102, §103
Nov 19, 2025
Response Filed
Dec 15, 2025
Non-Final Rejection mailed — §102, §103
Mar 30, 2026
Response Filed
May 27, 2026
Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

4-5
Expected OA Rounds
53%
Grant Probability
75%
With Interview (+22.3%)
4y 9m (~1y 1m remaining)
Median Time to Grant
High
PTA Risk
Based on 226 resolved cases by this examiner. Grant probability derived from career allowance rate.

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