DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
As of April 7, 2026, no information disclosure statement has been made of record.
Specification Objections
Examiner withdraws the specification objection based upon Applicant’s submission of new figures.
Drawing Objections
Examiner withdraws the previous drawing objection based upon Applicant’s submission of new figures.
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Applicant has no drawings showing a third transistor or a fourth transistor. Therefore, the subject matter of claim 21-25 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112(b)
Examiner withdraws the previous 35 USC § 112(b) rejection based upon Applicant’s amendment to the claims.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6-7, 26 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 6,
Claim 6 appears to be double inclusion.
In claim 1 Applicant claims a third structure surrounding the second structure, where the third structure is a different dielectric material than the first dielectric material. This appears to be Applicant claiming 165 as the second structure, and 167 as the third structure.
In claim 6 Applicant then claims…
the insulative structure comprises a first electrical insulator and a second electrical insulator, the first electrical insulator surrounds the second electrical insulator at least partially, and a portion of the second structure is over a portion of the first electrical insulator.
The insulative structure appears to also be claiming 165 as the second electrical insulator and 170 as the first electrical insulator. As Examiner understands it, as can be seen from the above, 165 is being claimed twice with two different names. Therefore, Applicant appears to be doubling including element 165. But, Examiner is not sure. To further clarify this issue Examiner looked to Applicant’s argument, dated July 27, 2026. Applicant’s arguments do not state where Applicant has support for the combination of claims 1 and 6, and therefore, Examiner is unsure if the above interpretation is correct.
As stated in the office action dated April 27, 2026, Examiner cannot speculate as to the meaning of the claim language simply to create a rejection. Therefore, Examiner cannot examine claims 6-7, as this would run counter to MPEP 2143.03.
Regarding claim 26,
The terms “loose pitch” and “tight pitch” in claim 26 are a relative term which renders the claim indefinite. The terms are not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, and 21-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh et al. (US 2018/0174904 A1) (“Hsieh”), in view of Song et al. (US 2015/0076704 A1) (“Song”), with support form Kadosh (US 5,866,934) (“Kadosh”).
Examiner note: The references will be combined as follows…
Hsieh teaches in figure 25 that source, drain, and gate contacts contacts/structures/electrodes can have a conductive core surrounded by an insulating material which may further be surrounded by an insulating material.
Song teaches in figure 13, that one can use different mandrel sizes (i.e. gate widths). It would have been obvious to one of ordinary skill in the art to combine Song with Nagano as Nagano is silent with respect to forming the gate contacts on the gate. Thus, it would have been obvious to one of ordinary skill it the art to combine the aforementioned references in order to form gate contacts on the different sized gates.
Kadosh teaches that making the gates of different widths as this will change the effective channel length of the device. This change of channel length allows one to create transistors in a device where the shorter channel length transistors can be faster, but suffer from greater leakage current, while the longer channel length transistors are slower, but has reduced channel leakage. One can optimize the size of the transistor based upon the circuit they are designing. For example if the circuit is a current mirror it may not need to switch as fast as a transistor being used as a register. Therefore, the choice of sizes of transistors are a result effective variable based upon the needs of one of ordinary skill in the art based upon their use case.
Examiner will now show how the prior art references read on the claimed structure.
Regarding claim 1, the prior art teaches:
A first layer comprising (detailed below; hereinafter “A”):
A first gate contact (Hsieh 30; hereinafter “B1”) of a first transistor (transistor shown in figure 25; hereinafter “C1”), and
A second gate contact of a second transistor (this is a duplication of the first transistor. The second gate contact will be “B2”, and the second transistor will be “C2”),
Wherein the second gate contact (C2) is in parallel with the first gate contact (C1) in a first direction (vertical), and
a dimension of the second gate contact (C2) in a second direction (Hsieh horizontal) perpendicular to the first direction (Hsieh vertical) is greater than a dimension of the first gate contact (C1) in a second direction (Hsieh horizontal) (as stated above, Song and Kadosh teach that the size of one transistor to another is a result effective variable. Therefore, one could make the transistor of Hsieh in one gate size, and a duplicate of the transistor of Hsieh in another size),
A second layer over the first layer, the second layer comprising (detailed below; hereinafter “D”):
A first structure (“E1”) over the first gate contact (B1), the first structure (E1) comprising (detailed below)
A first dielectric material (E1 is Hsieh 92);
A second structure (“E2”) over the second gate structure (B2), the second structure (E2) comprising (detailed below)
The first dielectric material (E2 is Hsieh 92).
A third structure (“E3”) at least partially surrounding the second structure (E2), the third structure comprising (detailed below)
a second dielectric material (E3 is at least one of Hsieh 62, 64, 76, or 78).
Regarding claims 2-3, the prior art teaches:
Based upon the teachings of Hsieh it would have been obvious that the inner 92 could be SiO2 or SiN, and the outer 92 could be SiN, or SiO2.
Regarding claim 4,
The limitation of claim 4 does not add any new structural features to claim 1. Rather, it relabels the second structure to a guard ring. Anyone of 62, 64, 76, or 78 can be considered a guard ring. As they provide electrical insulation to the first and second gate contacts.
Regarding claims 5, the prior art teaches:
the first layer (A) further comprises an insulative structure (Hsieh 40) between the first gate contact (B1) and the second gate contact (B2), and
a portion of the third structure (E3) is over the insulative structure (Hsieh 40).
Regarding claims 6, the prior art teaches:
the insulative structure comprises
a first electrical insulator and a second electrical insulator,
the first electrical insulator surrounds the second electrical insulator at least partially, and
a portion of the second structure is over a portion of the first electrical insulator.
Regarding claims 21-25,
Claims 21-25 are considered a duplication of parts of claim 1-5 under MPEP 2144.04(VI)(A).
Regarding claim 26,
wherein the first transistor is in a tight pitch region of the IC device, and wherein the second transistor is in a loose pitch region of the IC device (This is considered merely a labeling of the region. Where the first transistor is made can be labeled a tight pitch region, and where the second transistor is made can be considered a loose pitch region).
Regarding claim 27,
Claim 27 is a product-by-process limitation that doe not limit the structure of the device of claim 1. MPEP 2113(I).
Response to Arguments
Applicant’s amendments with respect to the rejection of the claims have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection are made in view of the new art, and new rational used in the rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/VINCENT WALL/ Primary Examiner, Art Unit 2898
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