Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 17, 2026 has been entered.
Response to Amendment
Applicant’s Amendment filed June 26, 2026 has been fully considered and entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-9, 16 and 17 are rejected under 35 U.S.C. 103(a) as being unpatentable over Yu et al. (CN 111338039 A from Applicant’s Information Disclosure Statement) in view of Zhang et al. (CN 203660273 U from Applicant’s Information Disclosure Statement), further in view of Huang et al. (US 2021/0298168 A1).
Regarding claim 1, Yu discloses an optical module (Figs. 5-18), comprising: a circuit board (203) including a through hole (2031) disposed in a surface thereof; a substrate (700) disposed in the through hole; a laser assembly (501) disposed on the substrate; and a silicon photonic chip (600) disposed on the substrate and optically connected to the laser assembly; wherein the substrate includes: a body disposed in the through hole, the laser assembly and the silicon photonic chip being disposed on the body; a first support step (707) disposed at an end of the body and configured to support the circuit board; and a second support step (see Fig. 15; base of 700 has a second protruding step at the opposite end from 707) disposed at another end of the body and configured to support the circuit board.
Still regarding claim 1, Yu teaches the claimed invention except for the substrate made of a conductive material. Zhang discloses a substrate (2 in Figs. 1-4) made of a conductive material (2 has sides 5 and 51 made of a conductive material) and a photonic chip (1) electrically connected to a circuit board through the substrate so as to ground the photonic chip (abstract). Since both of the inventions relate to optical devices, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to use a substrate made of a conductive material as disclosed by Zhang in the device of Yu for the purpose of providing a robust direct grounding connection. In the proposed combination, one having ordinary skill in the art would find it obvious for the first and second support steps to be plated with the conductive material since they are on the sides of the substrate, and also to electrically connect the support steps to corresponding first and second metal layers on the circuit board.
Still regarding claim 1, the proposed combination of Yu and Zhang teaches the claimed invention except for a ground layer disposed inside the circuit board. Huang discloses a circuit board (101 in Fig. 3) including a through hole (124) disposed in a surface thereof and a substrate (109) disposed in the through hole; wherein the circuit board includes a ground layer (bottom layer of 107) disposed inside the circuit board, and wherein a first metal layer and a second metal layer (portions of top layer of 107 which are in contact with 109) are connected to the ground layer of the circuit board through via holes (302). Since all of the inventions relate to optical devices, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to form a ground layer disposed inside the circuit board as disclosed by Huang in the device of the proposed combination of Yu and Zhang for the purpose of providing a grounding connection and providing electromagnetic shielding.
Regarding claim 2, the proposed combination of Yu, Zhang and Huang teaches the claimed invention except for specifically stating the metal layers electrically connected to the support steps through conductive silver paste. However, conductive silver paste is well-known and commonly used in the art and as such, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use conductive silver paste to electrically connect the metal layers to the support steps for the purpose of enhancing the electrical connection.
Regarding claim 3, Yu discloses the first support step and the second support step are protruding structures in Fig. 15.
Regarding claim 4, the proposed combination of Yu, Zhang and Huang teaches the claimed invention except for specifically stating the shape of the support steps is the same as the shape of the metal layers. However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form the shape of the support steps to be the same as the shape of the metal layers for the purpose of forming a good connection, resulting in a compact, robust device.
Regarding claim 5, Yu discloses the body includes a first side surface and a second side surface disposed opposite each other, and a third side surface and a fourth side surface disposed opposite each other; and the first support step is disposed around the first side surface and parts of the third side surface and the fourth side surface, and the second support step is disposed around the second side surface and parts of the third side surface and the fourth side surface in Fig. 15.
Regarding claim 6, Yu further discloses the through hole includes a first side and a second side disposed opposite each other, and a third side and a fourth side disposed opposite each other in Fig. 14. The proposed combination of Yu, Zhang and Huang teaches the claimed invention except for specifically stating the shape of the metal layer. However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form the shape of the metal layers to be the same as the shape of the support steps, resulting in the first metal layer disposed around the first side, and parts of the third side and the fourth side, and the second metal layer is disposed around the second side and parts of the third side and the fourth side, for the purpose of forming a good connection, resulting in a compact, robust device.
Regarding claim 7, Yu discloses a distance between a surface of the body proximate to the silicon photonic chip and a surface of the first support step proximate to the silicon photonic chip is equal to a thickness of the circuit board; and a distance between the surface of the body proximate to the silicon photonic chip and a surface of the second support step proximate to the silicon photonic chip is equal to the thickness of the circuit board in Fig. 15.
Regarding claim 8, Yu discloses the body includes: a first clamping portion (704), the silicon photonic chip being disposed on the first clamping portion; and a second clamping portion (702), the laser assembly being disposed on the second clamping portion in Fig. 15.
Regarding claim 9, Yu discloses the laser assembly includes: a laser upper cover (206) covering the second clamping portion; and a laser chip (501) disposed on the second clamping portion and located in a cavity formed by the laser upper cover and the second clamping portion in Fig. 15.
Regarding claim 16, Yu discloses an optical fiber interface; a first internal optical fiber ribbon (401), an end of the first internal optical fiber ribbon being connected to the silicon photonic chip, another end of the first internal optical fiber ribbon being connected to the optical fiber interface, and the first internal optical fiber ribbon being configured to transmit an optical signal to an outside of the optical module; and a second internal optical fiber ribbon, an end of the second internal optical fiber ribbon being connected to the silicon photonic chip, another end of the second internal optical fiber ribbon being connected to the optical fiber interface, and the second internal optical fiber ribbon being configured to receive an optical signal from the outside of the optical module (see page 6).
Regarding claim 17, Yu discloses a first optical fiber ribbon connector disposed on the substrate and configured to clamp the end of the first internal optical fiber ribbon connected to the silicon photonic chip; and a second optical fiber ribbon connector disposed on the substrate and configured to clamp the end of the second internal optical fiber ribbon connected to the silicon photonic chip in Fig. 6.
Response to Arguments
Applicant's arguments, filed June 26, 2026, with respect to claims have been considered but are moot in view of the new grounds of rejection. However, in order to expedite the prosecution of the Application, the relevant portions of Applicant’s remarks will be addressed.
On pages 9-10, Applicant states the technical effect achieved is to “avoid the parasitic inductance caused by a grounding connection of the silicon photonic chip through the gold wire.” However, “avoid[ing] the parasitic inductance” is not claimed and thus cannot affect the determination of patentability. The combination of Yu, Zhang and Huang above teaches all of the claimed structural elements and thus constitutes a prima facie rejection.
On page 13, Applicant asserts Huang lacks certain elements (i)-(iii). However, the Examiner respectfully disagrees and maintains all elements (i)-(iii) are indeed present in Huang. In regards to (i), the opening 124 is a “through hole” because it is a hole through the top layer 102 of the circuit board 101 as shown in Fig. 3. In regards to (ii), Applicant asserts 109 is a “surface-mounted capacitor” rather than “a substrate” as claimed. However, the two are not mutually exclusive. A “substrate” is simply “an underlying support” as defined by Merriam-Webster. As such “substrate” serves to define the structure, but not does limit the function. In other words, a “surface-mounted capacitor” can also be a “substrate” since it has an underlying support. In regards to (iii), Applicant states the cable grounding planes 107 are not disposed inside the circuit board. However, element 101 is the circuit board as described in paragraph 0048. As seen in Fig. 3, the cable grounding planes are within 101.
On page 14, Applicant wonders why one of ordinary skill in the art would form side surfaces with conductive layers as disclosed by Zhang in the device of Yu, given that Yu achieves electrical connection via wire bonding. However, that motivation is provided by Zhang. Specifically, the conductive plating layers achieve “the purpose of directly grounding the assembly” (see “Summary of the Invention” section). Thus, one having ordinary skill in the art would be motivated to use a substrate with conductive plating layers to arrive at a robust direct grounding connection to the circuit board.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRIS H CHU whose telephone number is (571)272-8655. The examiner can normally be reached on Mon-Fri 9AM-5PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached on 571-272-239797. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Any inquiry of a general or clerical nature should be directed to the Technology Center 2800 receptionist at telephone number (571) 272-1562.
Chris H. Chu
/CHRIS H CHU/Primary Examiner, Art Unit 2874 August 3, 2026
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