Prosecution Insights
Last updated: October 26, 2026
Application No. 18/065,509

SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME

Final Rejection §103§112
Filed
Dec 13, 2022
Priority
Jul 19, 2022 — JP 2022-115076
Examiner
BULLARD-CONNOR, GENEVIEVE GRACE
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
4 (Final)
42%
Grant Probability
Moderate
5-6
OA Rounds
0m
Est. Remaining
79%
With Interview

Examiner Intelligence

Grants 42% of resolved cases
42%
Career Allowance Rate
11 granted / 26 resolved
-25.7% vs TC avg
Strong +37% interview lift
Without
With
+37.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
37 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§103
50.0%
+10.0% vs TC avg
§102
30.5%
-9.5% vs TC avg
§112
19.5%
-20.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 26 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 16 requires the heat sink to be “horizontally asymmetrical in cross-sectional view”. It is unclear what Applicant intends “horizontally asymmetrical” to mean. Interpreting this phrase could require either that the heat sink is asymmetrical about an axis that extends horizontally in the cross-sectional view, or that the heat sink is asymmetrical when mirrored left-to-right or horizontally about a vertically extending axis in cross-sectional view (the Examiner notes the Applicant’s Figure 4 has support for both interpretations). Thus, determining whether one is infringing the limitation is subjective, rather than objective, and thus the claim is indefinite. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2 and 4-8 are rejected under 35 U.S.C. 103 as being unpatentable over Kawashima et al. (“Kawashima” WO 2022/107697), Nakajima et al. (“Nakajima” US 2004/0089928), Omura (US 2017/0301602), and Takahashi et al. (“Takahashi” US 2009/0309213). Regarding claim 1, Kawashima discloses a semiconductor module (Figures 1-3) comprising: a frame part (13); a semiconductor device (15) mounted on an upper surface of the frame part (13); a heat sink (30) joined to a lower surface of the frame part (13, through the insulating sheet 25, see Figure 3); a sealing member (40) sealing the frame part (13), the semiconductor device (15), and the heat sink (30) to form a module body (see Figure 3). Kawashima does not disclose an insulation sheet provided on a lower surface of the heat sink; and wherein a thickness of the heat sink measured from the lower surface of the heat sink to an upper surface of the heat sink is equal to or larger than 50% of a thickness of the module body measured from a lowest surface of the module body to an uppermost surface of the module body, and a lowest surface of the heat sink is above a lowest surface of the sealing member. Nakajima discloses an insulation sheet (insulating sheet, Figure 3) provided on a lower surface of the heat sink (8, see Figure 3), and a lowest surface of the heat sink (8, surface 8B) is above a lowest surface of the sealing member (5, see Figure 3). It would have been obvious to a person having ordinary skill in the art to incorporate the teachings of Nakajima into the teachings of Kawashima above to include the insulation sheet for the purpose of achieving low thermal resistance of the package (Nakajima, para. [0700]) and the positioning of the heat sink relative to the sealing member to accommodate the insulation sheet which increases withstand voltage (Nakajima, para. [0101]). Omura discloses a module body (semiconductor package 10, insulation sheet 41, and heat spreader 31) having a thickness (T1 + T2, plus the thickness of the insulation sheet 41, see Figure 1), and a heat sink (heat spreader 31) having a thickness (T2) which does not include the thickness of the insulation sheet (41, see Figure 1), where the thickness of the module body (T1 + T2 + insulation sheet) is at least 2mm (see para. [0037]-[0039], T1 is less than 2mm, T2 is greater than 2mm), and the thickness of the heat sink (T2) is greater than 2mm, thus Omura teaches an embodiment where the thickness of the heat sink (31, thickness T2) is at least 50% of the thickness of the module body (10/31, T1 + T2 + insulation sheet 41). It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Omura into the teachings of Kawashima to make the thickness of the heat sink, excluding the thickness of the insulation sheet, at least 50% of the total thickness of the module body for the purpose of optimizing the heat dissipation efficiency. One having ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of the heat sink to be a result effective variable affecting heat dissipation efficiency and on the other hand, bulkiness and overall weight of the device. This is evidenced by the teachings of Takahashi, which discloses that increasing the thickness of the heat sink improves the heat dissipation properties of the semiconductor device but may become too bulky or heavy, affecting overall performance (see Takahashi, para. [0279]). Thus, it would have been obvious to modify the device of Kawashima to have the thickness of the heat sink within the claimed range in order to improve heat dissipation of the device while keeping the device within appropriate weight and size limits, and since optimum or workable ranges of such variables are discoverable through routine experimentation, see MPEP 2144.05(II)(B) and 2143. Additionally, the range disclosed by Omura overlaps the claimed range, and in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art,” a prima facie case of obviousness exists (In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976)). The Examiner would also like the note that despite Omura not explicitly disclosing the exact thickness of the insulation sheet, it would have been obvious to a person having ordinary skill in the art that the thickness of the insulation sheet does not contribute much to the overall thickness of the module body. This is evidenced by the insulation sheet of Nakajima, which is disclosed as being 200 microns, with a maximum of 600 microns (Nakajima, para. [0065]-[0066], the resin sheet 6 is 100-500 microns, the copper foil 7 is 100 microns). In fact, Nakajima discloses that ideally the insulation layer is about 300 microns, while the heat sink is ideally 3-5 millimeters (see para. [0075] which discloses the foil 7 as being 100 microns, and para. [0076] discloses the resin layer 6 as being 200 microns, and para. [0135] regarding the ideal thickness of the heat sink). Thus, it is the Examiner’s position that the claimed relative thicknesses of the heat sink and the module body would have been obvious to a person having ordinary skill in the art considering the prior art has disclosed thicknesses that overlap with the claimed range and that it is obvious to optimize the thicknesses of the heat sink relative to the module body through routine experimentation. Regarding claim 2, Omura discloses the module body (semiconductor device 10, insulation sheet 41, and heat spreader 31) has a thickness (T1 + T2 + thickness of insulation sheet 41, see Figure 1), and the heat sink (heat spreader 31) has a thickness (T2), where the thickness of the module body (T1 + T2 + thickness of insulation sheet 41) is at least 2mm (see para. [0037]-[0039], T1 is less than 2mm, T2 is greater than 2mm), and the thickness of the heat sink T2 is greater than 2mm, thus Omura discloses an embodiment in which the thickness of the heat sink (31, T2) is at least 75% of the thickness of the module body (10/31, T1 + T2 + thickness of insulation sheet 41). It would have been obvious to one having ordinary skill in the art, however, to increase the thickness of the heat sink to be at least 75% of the total thickness of the module body. The range disclosed by Omura overlaps the claimed range, and in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art,” a prima facie case of obviousness exists (In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976)). Additionally, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of heat sinks to be a result effective variable affecting heat dissipation efficiency. This is evidenced by the teachings of Takahashi, which discloses that increasing the thickness of the heat sink improves the heat dissipation properties of the semiconductor device but may become too bulky or heavy, affecting overall performance (see Takahashi, para. [0279]). Thus, it would have been obvious to modify the device of Kawashima to have the thickness of the heat sink within the claimed range in order to improve heat dissipation of the device while keeping the device within appropriate weight and size limits, and since optimum or workable ranges of such variables are discoverable through routine experimentation, see MPEP 2144.05(II)(B) and 2143. Regarding claim 4, Kawashima further discloses a terminal (12) including one end connected to the semiconductor device (15, left end of the terminal 12 in Figure 3 is electrically connected to the semiconductor device 15 through the bond wire 20) and the other end protruding from a side surface of the sealing member (40, the right end of the terminal 12 protrudes from the right side of the sealing member 40 in Figure 3), wherein the terminal (12) and the frame part (13) are at the same height (see Figure 3 which shows the lower surfaces and upper ends of the terminal 12 and the frame part 13 provided on the same horizontal planes). Regarding claim 5, Kawashima discloses wherein the heat sink (30) has a trapezoid section (see Figure 3) in which a bottom side closer to the insulation sheet (as incorporated by Nakajima, onto the lower surface of the heat sink, thus the bottom side closer to the insulation sheet of the combination of Kawashima and Nakajima is the lower side surface of the heat sink 30) is longer than a top side closer to the frame part (13, see Figure 3, the trapezoidal cross-sectional shape is shown with the longer side of the trapezoid being the lower side of the heat sink 30). Regarding claim 6, Kawashima discloses wherein thermal conductivity of the heat sink (30, made of aluminum, see page 7, paragraph 1 of attached WO document) is lower than thermal conductivity of the frame part (the frame part 13 is part of the lead frame 10, which is made of copper, and the thermal conductivity of copper is greater than the thermal conductivity of aluminum). Regarding claim 7, Nakajima discloses wherein the insulation sheet (insulating sheet, Figure 3) is made of a composite of resin and a filler (see para. [0065], [0070]). Regarding claim 8, Kawashima discloses wherein the semiconductor device (15) is formed of a wide-bandgap semiconductor (see page 1, paragraph 3 of attached WO document). Regarding claim 14, Kawashima discloses wherein the heat sink (30) is positioned entirely within the module body (the module body includes the sealing material 40, frame part 13, the semiconductor device 15, and the heat sink 30, and it is the Examiner’s position that the heat sink 30 is positioned entirely within the module body because it is a part of the module body itself). Regarding claim 15, Nakajima discloses wherein a lower surface of the insulation sheet (insulating sheet, see Figure 3) is exposed on the lowest surface of the module body without the sealing member (5, see Figure 3). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kawashima, Nakajima, Omura, and Takahashi as applied to claim 1 above, and further in view of Ando (JP 10163383A). Regarding claim 3, Kawashima, Nakajima, Omura, and Takahashi do not disclose a sealing member having a first and second sealing member, with a junction interface between the first and second sealing members. Ando discloses, however, in Figures 7(a)-7(c), a sealing member (7) including a first sealing member (7A) provided on a lower surface side of the frame part (2, 4), and a second sealing member (7B) provided on an upper surface side of the frame part (shown in Figure 7(c)), and a junction interface exists between the first sealing member and the second sealing member (the junction interface is visually recognized, as disclosed by Applicant, in Figure 7(c) of Ando, due to the resins being formed at different stages of manufacture). It would have been obvious to one having ordinary skill in the art before the effective filing date of the present invention to incorporate the teachings of Ando into the teachings of Kawashima, Nakajima, Omura, and Takahashi to include the two-part sealing member and the junction interface between the two parts of the sealing member for the purpose of preventing the semiconductor element of the device from moving during manufacture (Ando, para. [0016]). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Kawashima, Nakajima, Omura, and Takahashi as applied to claim 1 above, and further in view of Narayanasamy et al. (“Narayanasamy” US 2018/0297301). Regarding claim 16, Kawashima, Nakajima, Omura, and Takahashi do not teach wherein the heat sink is horizontally asymmetrical in cross-sectional view. Narayanasamy teaches a heat sink (111) horizontally asymmetrical in cross-sectional view (see Figure 13G, where the horizontal asymmetry, where the heat sink is mirrored left-to-right about a vertical axis, is a result of the irregular roughness of the upper surface of the heat sink 111). It would have been obvious to one having ordinary skill in the art before the effective filing date of the present invention to incorporate the teachings of Narayanasamy into the teachings of Kawashima, Nakajima, Omura, and Takahashi to include the horizontal asymmetry of the heat sink due to the surface roughness for the purpose of improving adhesion to an insulating matrix material, (Narayanasamy, para. [0066]), where the insulating matrix material (360) of Narayanasamy is analogous to the insulation sheet incorporated by Nakajima. Response to Arguments Applicant’s arguments, see Remarks, filed 28 August 2026, with respect to the 112(a) rejection of claim 1 have been fully considered and are persuasive. The 112(a) rejection of claim 1 has been withdrawn. Applicant’s arguments regarding the prior art rejection of claim 1 are not found persuasive. It is the Examiner’s position that it is within the skill set of one having ordinary skill in the art to recognize the ideal range of thickness of the heat sink where the heat dissipation is optimal while the weight or bulkiness of the heat sink does not affect the overall reliability or performance of the device, since these are known variables in the art affected by the heat sink’s thickness, as evidenced by Takahashi above (see claim 1). Additionally, while Takahashi does acknowledge the potential detaching of the heavy heat sink from the device, the combination of prior art teachings above with regards to claim 1 teaches a device where the heat sink is entirely enclosed within the device by the sealing material and the insulation sheet (as incorporated by Nakajima), thus is secured and not at risk of falling off of the device. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Genevieve G Bullard-Connor whose telephone number is (571)270-0609. The examiner can normally be reached Mon-Fri, 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Genevieve G Bullard-Connor/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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Prosecution Timeline

Show 10 earlier events
Mar 03, 2026
Request for Continued Examination
Mar 11, 2026
Response after Non-Final Action
May 29, 2026
Non-Final Rejection mailed — §103, §112
Aug 06, 2026
Interview Requested
Aug 12, 2026
Applicant Interview (Telephonic)
Aug 12, 2026
Examiner Interview Summary
Aug 28, 2026
Response Filed
Sep 30, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
42%
Grant Probability
79%
With Interview (+37.0%)
3y 11m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 26 resolved cases by this examiner. Grant probability derived from career allowance rate.

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