Listed by the USPTO as BULLARD-CONNOR, GENEVIEVE GRACE
Tech Center 2800 • Art Units: 2899
This examiner grants 42% of resolved cases
BULLARD-CONNOR, GENEVIEVE GRACE is assigned to technology center 2800 and art unit 2899. The profile contains 26 resolved cases, an allowance rate of 42.3%, and a median of 1425 days to allowance. Interviews are associated with a 37.0% lift. The limited case volume calls for caution in drawing broad conclusions, but the interview figure supports considering direct examiner engagement when addressing difficult claim issues.
The listed companies are Taiwan Semiconductor Manufacturing Company, Ltd., Intel Corporation, and Mitsubishi Electric Corporation. The listed firms are Akona IP PC - Intel, Haynes and Boone, LLP (24061), and JCIPRNET. Counsel should account for the reported allowance interval and use focused amendments, technical explanations, and interview preparation to manage prosecution risk in this art unit.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 17820151 | SEMICONDUCTOR MOUNTING STRUCTURE | Final Rejection | FUJIFILM Corporation |
| 18648097 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18447315 | SEMICONDUCTOR DEVICES WITH PYRAMIDAL SHIELDING AND METHOD FOR MAKING THE SAME | Final Rejection | STATS ChipPAC Pte. Ltd. |
| 17698430 | MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS | Final Rejection | Intel Corporation |
| 17552581 | MICROELECTRONIC ASSEMBLIES WITH GLASS SUBSTRATES AND THIN FILM CAPACITORS | Non-Final OA | Intel Corporation |
| 17550236 | MICROELECTRONIC ASSEMBLIES WITH GLASS SUBSTRATES AND PLANAR INDUCTORS | Non-Final OA | Intel Corporation |
| 17481257 | MOAT PROTECTION TO PREVENT CRACK PROPAGATION IN GLASS CORE SUBSTRATES OR GLASS INTERPOSERS | Non-Final OA | Intel Corporation |
| 18043605 | SEMICONDUCTOR MODULE, METHOD FOR MANUFACTURING THE SAME, AND POWER CONVERSION DEVICE | Non-Final OA | Mitsubishi Electric Corporation |
| 18065509 | SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME | Final Rejection | Mitsubishi Electric Corporation |
| 18289002 | DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE | Non-Final OA | SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
| 18659367 | MEMORY DEVICES WITH INTEGRATED FDSOI TRANSISTOR | Non-Final OA | Micron Technology, Inc. |
| 18171746 | CHIP PACKAGING MODULE AND ELECTRONIC DEVICE | Final Rejection | VIVO MOBILE COMMUNICATION CO., LTD. |
| 18026924 | Power Module and Method for Producing a Power Module | Final Rejection | Hitachi Energy Ltd |
| 18329387 | METHODS FOR MOUNTING AN ELECTRONIC PACKAGE TO A CIRCUIT BOARD | Non-Final OA | Skyworks Solutions, Inc. |
| 18223838 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE | Final Rejection | STMicroelectronics S.r.l. |
| 18635310 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18421399 | PHOTOLITHOGRAPHY METHOD AND STRUCTURES THEREOF | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18404467 | REDUCTION OF SIZE OF EDGE CELL REGION IN MEMORY DEVICES | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 17873060 | 3D SEMICONDUCTOR PACKAGE | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 17833208 | Semiconductor Device and Method Forming Same | Final Rejection | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18321129 | PACKAGE STRUCTURE INCLUDING A PACKAGE LID HAVING A PATTERNED BOTTOM SURFACE AND METHODS OF FORMING THE SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Company Limited |
| 18110009 | THERMAL INTERFACE MATERIAL LAYER PROTECTION STRUCTURES AND METHODS OF FORMING THE SAME | Final Rejection | Taiwan Semiconductor Manufacturing Company Limited |
| 18509410 | HYBRID BONDED INVERTED MEMORY-LOGIC STACK | Non-Final OA | Advanced Micro Devices, Inc. |
| 17814566 | HETEROGENEOUS EMBEDDED POWER DEVICE PACKAGE USING DAM AND FILL | Final Rejection | SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy42.3% of resolved applications examined by Genevieve Grace Bullard-Connor were allowed (26 resolved cases), compared with 81.9% across Art Unit 2899 over the last five years.
This examiner's interview lift is +37.0 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Genevieve Grace Bullard-Connor took 1,425 days on average from filing to allowance.
Genevieve Grace Bullard-Connor examines applications in Art Unit 2899 in Tech Center 2800 (Semiconductors, Circuits & Optics).
