DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 4 2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 14 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 14 requires the limitation “wherein the heat sink is positioned entirely within the module body”, where the module body includes the sealing material, the frame part, the semiconductor device, and the heat sink itself. However, the instant specification and/or drawings do not provide sufficient support for the heat sink being entirely within the module body or the sealing material that forms the module body. Applicant has not disclosed this in the specification, and the drawings only show cross-sectional views of the semiconductor module where it is not evident that the sealing material also entirely covers or seals the heat sink on sides that are in/out of the page or not shown in the cross-sectional view. Therefore, new matter has been introduced to the claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 and 4-8 are rejected under 35 U.S.C. 103 as being unpatentable over Kawashima et al. (“Kawashima” WO 2022/107697), Nakajima et al. (“Nakajima” US 2004/0089928), Omura (US 2017/0301602), and Takahashi et al. (“Takahashi” US 2009/0309213).
Regarding claim 1, Kawashima discloses a semiconductor module (Figures 1-3) comprising:
a frame part (13);
a semiconductor device (15) mounted on an upper surface of the frame part (13);
a heat sink (30) joined to a lower surface of the frame part (13, through the insulating sheet 25, see Figure 3);
a sealing member (40) sealing the frame part (13), the semiconductor device (15), and the heat sink (30) to form a module body (see Figure 3).
Kawashima does not disclose an insulation sheet provided on a lower surface of the heat sink; and wherein a thickness of the heat sink measured from the lower surface of the heat sink to an upper surface of the heat sink is equal to or larger than 50% of a thickness of the module body measured from a lowest surface of the module body to an uppermost surface of the module body.
Nakajima discloses an insulation sheet (insulating sheet, Figure 1) provided on a lower surface of the heat sink (8, see Figure 1).
It would have been obvious to a person having ordinary skill in the art to incorporate the teachings of Nakajima into the teachings of Kawashima above to include the insulation sheet for the purpose of achieving low thermal resistance of the package (Nakajima, para. [0700]).
Omura discloses a module body (semiconductor device 10, insulation sheet 31, and heat spreader 31) having a thickness (T1 + T2, plus the thickness of the insulation sheet 41, see Figure 1), and a heat sink (heat spreader 31) having a thickness (T2) which does not include the thickness of the insulation sheet (41, see Figure 1), where the thickness of the module body T1 + T2 + insulation sheet is at least 2mm (see para. [0037]-[0039]), and the thickness of the heat sink T2 is at least 2mm, thus the thickness of the heat sink (31, T2) is at least 50% of the thickness of the module body (10/31, T1 + T2 + insulation sheet 41).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Omura into the teachings of Kawashima to make the thickness of the heat sink, excluding the thickness of the insulation sheet, to at least 50% of the total thickness of the module body for the purpose of optimizing the heat dissipation efficiency. One having ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of heat sinks to be a result effective variable affecting heat dissipation efficiency. This is evidenced by the teachings of Takahashi, which discloses that increasing the thickness of the heat sink improves the heat dissipation properties of the semiconductor device (see Takahashi, para. [0279]). Thus, it would have been obvious to modify the device of Kawashima to have the thickness of the heat sink within the claimed range in order to improve heat dissipation of the device, and since optimum or workable ranges of such variables are discoverable through routine experimentation, see MPEP 2144.05(II)(B) and 2143. Additionally, the range disclosed by Omura overlaps the claimed range, and in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art,” a prima facie case of obviousness exists (In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976)). The Examiner would also like the note that despite Omura does not explicitly disclose the exact thickness of the insulation sheet, it would have been obvious to a person having ordinary skill in the art that the thickness of the insulation sheet does not contribute much to the overall thickness of the module body. This is evidenced by the insulation sheet of Nakajima, which is disclosed as being 200 microns, with a maximum of 600 microns (Nakajima, para. [0065]-[0066], the resin sheet 6 is 100-500 microns, the copper foil 7 is 100 microns). In fact, Nakajima discloses that ideally the insulation layer is about 300 microns, while the heat sink is ideally 3-5 millimeters (see para. [0075] which discloses the foil 7 as being 100 microns, and para. [0076] discloses the resin layer 6 as being 200 microns, and para. [0135] regarding the ideal thickness of the heat sink). Thus, it is the Examiner’s position that the claimed invention would have been obvious to a person having ordinary skill in the are considering the prior art has disclosed thicknesses that overlap with the claimed range and that it is obvious to optimize the thicknesses of the heat sink relative to the module body.
Regarding claim 2, Omura discloses the module body (semiconductor device 10, insulation sheet 41, and heat spreader 31) has a thickness (T1 + T2 + thickness of insulation sheet 41, see Figure 1), and the heat sink (heat spreader 31) has a thickness (T2), where the thickness of the module body T1 + T2 + thickness of insulation sheet 41 is at least 2mm (see para. [0037]-[0039]), and the thickness of the heat sink T2 is at least 2mm, thus Omura discloses an embodiment in which the thickness of the heat sink (31, T2) is at least 75% of the thickness of the module body (10/31, T1 + T2 + thickness of insulation sheet 41).
It would have been obvious to one having ordinary skill in the art, however, to increase the thickness of the heat sink to be at least 75% of the total thickness of the module body. The range disclosed by Omura overlaps the claimed range, and in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art,” a prima facie case of obviousness exists (In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976)). Additionally, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of heat sinks to be a result effective variable affecting heat dissipation efficiency. This is evidenced by the teachings of Takahashi, which discloses that increasing the thickness of the heat sink improves the heat dissipation properties of the semiconductor device (see Takahashi, para. [0279]). Thus, it would have been obvious to modify the device of Kawashima, Omura, and Nakajima to have the thickness of the heat sink within the claimed range in order to improve heat dissipation of the device, and since optimum or workable ranges of such variables are discoverable through routine experimentation, see MPEP 2144.05(II)(B) and 2143.
Regarding claim 4, Kawashima further discloses a terminal (12) including one end connected to the semiconductor device (15, left end of the terminal 12 in Figure 3 is electrically connected to the semiconductor device 15 through the bond wire 20) and the other end protruding from a side surface of the sealing member (40, the right end of the terminal 12 protrudes from the right side of the sealing member 40 in Figure 3),
wherein the terminal (12) and the frame part (13) are at the same height (see Figure 3 which shows the lower surfaces and upper ends of the terminal 12 and the frame part 13 provided on the same horizontal planes).
Regarding claim 5, Kawashima discloses wherein the heat sink (30) has a trapezoid section (see Figure 3) in which a bottom side closer to the insulation sheet (as incorporated by Nakajima, onto the lower surface of the heat sink, thus the bottom side closer to the insulation sheet of the combination of Kawashima and Nakajima is the lower side surface of the heat sink 30) is longer than a top side closer to the frame part (13, see Figure 3, the trapezoidal cross-sectional shape is shown with the longer side of the trapezoid being the lower side of the heat sink 30).
Regarding claim 6, Kawashima discloses wherein thermal conductivity of the heat sink (30, made of aluminum, see page 7, paragraph 1 of attached WO document) is lower than thermal conductivity of the frame part (the frame part 13 is part of the lead frame 10, which is made of copper, and the thermal conductivity of copper is greater than the thermal conductivity of aluminum).
Regarding claim 7, Nakajima discloses wherein the insulation sheet (insulating sheet, Figure 1) is made of a composite of resin and a filler (see para. [0065], [0070]).
Regarding claim 8, Kawashima discloses wherein the semiconductor device (15) is formed of a wide-bandgap semiconductor (see page 1, paragraph 3 of attached WO document).
Regarding claim 14, Kawashima discloses wherein the heat sink (30) is positioned entirely within the module body (the module body includes the sealing material 40, frame part 13, the semiconductor device 15, and the heat sink 30, and it is the Examiner’s position that the heat sink 30 is positioned entirely within the module body because it is a part of the module body itself).
Regarding claim 15, Nakajima discloses wherein a lower surface of the insulation sheet (insulating sheet, see Figure 1) is exposed on the lowest surface of the module body (the outer surfaces of the insulating sheet is exposed from the heat sink 8 portion of the module body) without the sealing member (5, a portion of the insulation sheet of Nakajima is exposed on the lowest surface of the heat sink while that portion is also not in direct physical contact with the sealing member 5, see Figure 1 of Nakajima).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kawashima, Nakajima, Omura, and Takahashi as applied to claim 1 above, and further in view of Ando (JP 10163383A).
Regarding claim 3, Kawashima, Nakajima, Omura, and Takahashi do not disclose a sealing member having a first and second sealing member, with a junction interface between the first and second sealing members.
Ando discloses, however, in Figures 7(a)-7(c), a sealing member (7) including a first sealing member (7A) provided on a lower surface side of the frame part (2, 4), and a second sealing member (7B) provided on an upper surface side of the frame part (shown in Figure 7(c)), and
a junction interface exists between the first sealing member and the second sealing member (the junction interface is visually recognized, as disclosed by Applicant, in Figure 7(c) of Ando, due to the resins being formed at different stages of manufacture).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the present invention to incorporate the teachings of Ando into the teachings of Kawashima, Nakajima, Omura, and Takahashi to include the two-part sealing member and the junction interface between the two parts of the sealing member for the purpose of preventing the semiconductor element of the device from moving during manufacture (Ando, para. [0016]).
Response to Arguments
Applicant’s arguments with respect to the prior art rejections have been considered but are moot because the new ground of rejection does not rely on any embodiment of the reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Genevieve G Bullard-Connor whose telephone number is (571)270-0609. The examiner can normally be reached Mon-Fri, 9am-5pm.
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/Genevieve G Bullard-Connor/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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