CTFR 18/066,511 CTFR 84148 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Terminal Disclaimer 14-23 AIA The terminal disclaimer filed on 02/02/2026 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of 11557673 has been reviewed and is accepted. The terminal disclaimer has been recorded. Response to Arguments 07-37 AIA Applicant's arguments filed 02/02/2026 have been fully considered but they are not persuasive or moot in view of the new grounds of rejection as necessitated by Applicant’s amendments as detailed below. Applicant argues on page 6 that the claim amendments overcome the Dewey and Malhi references which is only partially persuasive based upon the updated rejections incorporating the amended claim language as detailed below . Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 13,16,19 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by U.S. Patent Application Publication Number 2019/0058053 A1 to Dewey et al., “Dewey” . Regarding claim 13, Dewey discloses a semiconductor device (e.g. FIG. 1A), comprising: a switch element (100, ¶ [0019]) having a surface (upper) and first (102 on left) and second (102 on right) regions and including a first semiconductor material having a band-gap (low band gap ¶ [0017]), the first region of the switch element including a source (102 on left) being coupled (as per definition of “coupled” in Applicant’s specification page 26 paragraph [0085] which allows for intervening elements) to a source contact (118 on left, ¶ [0019],[0020]); a voltage-support structure (114 on right side , ¶ [0020]) including a second semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material (¶ [0021]-[0025]); a contiguous floating electrode (116 on right side , ¶ [0020], contiguous within region to the right side of gate stack 106) over a portion of both the voltage-support structure (114 on right side) and the second region of the switch element; and a drain contact (118 on right side of 108, ¶ [0019]) over the voltage-support structure (114 on right side). Regarding claim 16, Dewey discloses the semiconductor device of claim 13, and Dewey further discloses wherein the switch element is a field-effect transistor (¶ [0017],[0018],[0043]). Regarding claim 19, Dewey discloses the semiconductor device of claim 13, and Dewey further discloses wherein the first semiconductor material includes at least one of silicon, germanium (¶ [0021]) . 07-15 AIA Claim s 1,4-8,10,13,16-19 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by U.S. Patent Number 5,589,695 to Malhi, “Malhi” . Regarding claim 1, Malhi discloses a semiconductor device (e.g. FIG. 2, column 4 lines 5-21), comprising: a switch element (14’) having a surface (upper) and first (22 at “S”) and second (24 at “C”) regions and including a first semiconductor material (silicon substrate 12, column 4 line 12) having a band-gap, the first region of the switch element being coupled to a source contact (“S”); a voltage-support structure (18) including a second semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material (high figure-of-merit e.g. GaAs or SiC, column 3 lines 60-63); a floating electrode (“C” 34) (laterally and/or electrically) between the first semiconductor material (portion of 12 in region 14’ on left) and the voltage-support structure (18 on right); and a drain contact (“D” 42) over the voltage-support structure. Regarding claim 4, Malhi discloses the semiconductor device of claim 1, and Malhi further discloses wherein the switch element is a field-effect transistor (column 3 lines 27-41). Regarding claim 5, Malhi discloses the semiconductor device of claim 4, and Malhi further discloses wherein: the switch element includes a field-effect transistor; and the field-effect transistor is a p-type field-effect transistor (substrate 12 is p-type as pictured). Regarding claim 6, Malhi discloses the semiconductor device of claim 5, and Malhi further discloses wherein the switch element is a laterally-diffused metal oxide semiconductor field-effect transistor (column 3 lines 27-41). Regarding claim 7, Malhi discloses the semiconductor device of claim 5, and Malhi further discloses wherein the switch element includes a gate (“G” 28, column 3 lines 66-67). Regarding claim 8, Malhi discloses the semiconductor device of claim 1, and Malhi further discloses wherein the second semiconductor material includes silicon carbide (SiC, column 3 lines 60-63). Regarding claim 10, Malhi discloses the semiconductor device of claim 1, and Malhi further discloses wherein the first semiconductor material includes silicon (silicon substrate 12, column 4 line 12). Regarding claim 13, Malhi discloses a semiconductor device (e.g. FIG. 2, column 4 lines 5-21), comprising: a switch element (14’) having a surface (upper) and first (e.g. 20/22 at “S”) and second (24 at “C”) regions and including a first semiconductor material having a band-gap (silicon substrate 12, column 4 line 12), the first region of the switch element including a source (e.g. 22) being coupled to a source contact (“S”); a voltage-support structure (18) including a second semiconductor material having a band-gap that is larger than the band-gap of the first semiconductor material (high figure-of-merit e.g. GaAs or SiC, column 3 lines 60-63); a contiguous floating electrode (“C” 34) over a portion of both the voltage-support structure and the second region (24) of the switch element; and a drain contact (“D” 42) over the voltage-support structure. Regarding claim 16, Malhi discloses the semiconductor device of claim 13, and Malhi further discloses wherein the switch element is a field-effect transistor (column 3 lines 27-41). Regarding claim 17, Malhi discloses the semiconductor device of claim 16, and Malhi further discloses wherein the switch element is a laterally-diffused metal oxide semiconductor field-effect transistor (column 3 lines 27-41). Regarding claim 18, Malhi discloses the semiconductor device of claim 13, and Malhi further discloses wherein the second semiconductor material includes silicon carbide (column 3 lines 60-63). Regarding claim 19, Malhi discloses the semiconductor device of claim 13, and Malhi further discloses wherein the first semiconductor material includes silicon (silicon substrate 12, column 4 line 12) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 3 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Number 5,734,180 to Malhi, “Malhi” . Regarding claims 3 and 15, although Malhi discloses the semiconductor device of claims 1 and 13, Malhi fails to clearly teach in sufficient detail for anticipation wherein: the floating electrode (“C” 34) is in ohmic contact with the second region (N+ region 24) of the switch element; and the floating electrode (“C” 34) is in ohmic contact with voltage-support structure (N+ region 38). However, Malhi teaches wherein the floating electrode makes a common connection between the N+ regions 24 and the N+ region 38 of the floating electrode (column 4 lines 1-2). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the semiconductor device of Malhi with the floating electrode making ohmic connections as suggested by Malhi in order to form an effective electrical connection . 07-21-aia AIA Claim s 2,11,12,14,20,21 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Number 5,734,180 to Malhi, “Malhi”, in view of U.S. Patent Application Publication Number 2020/0058788 A1 to Rahman et al., “Rahman” . Regarding claims 2 and 14, although Malhi discloses the semiconductor device of claims 1 and 13, Malhi fails to clearly teach wherein the floating electrode (“C” 34) includes at least one of metal or silicide. Rahman teaches wherein an electrode is formed of metal and silicide (68, ¶ [0028]). It would have been obvious to one having ordinary skill in the art to have formed the device of Malhi with the floating electrode formed of metal or metal and silicide as taught by Rahman in order to select a material which forms good ohmic contact ( Rahman ¶ [0028]) and since metals are well-known to provide low resistance and since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp ., 325 U.S. 327, 65 USPQ 297 (1945), In re Leshin , 277 F.2d 197, 125 USPQ 416 (CCPA 1960), and MPEP 2144.07 Art Recognized Suitability for an Intended Purpose. Regarding claims 11 and 20, although Malhi discloses the semiconductor device of claims 1 and 13, Malhi fails to further teach a field-control element extending towards the drain contact. Rahman teaches (e.g. FIG. 3) forming a field-control element (gate shield 48, ¶ [0025]) extending towards a drain (“D”). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Malhi by adding a field-control element as taught by Rahman in order to improve the shape of the electric field in the LDD region thus increasing the voltage blocking capability in the off-state and/or lower the gate-to-drain capacitance of the LDFET structure. In addition, the gate shield (field-control element) allows for a higher doping of the LDD by completely or partially removing localized high electric field due to voltage signals applied to the drain contact of the device. As a result, the on-state resistance of the power device can decrease while preserving the device's high breakdown. ( Rahman ¶ [0004]). Regarding claim 12, Malhi in view of Rahman yields the device of claim 11, and Rahman further teaches wherein the field-control element (48) is a field plate electrically coupled to the source contact (“S” 54). Regarding claim 21, Malhi discloses a transistor (e.g. FIG. 2, column 4 lines 5-21), comprising: a semiconductor layer (silicon substrate 12, column 4 line 12) having a first conductivity type (p type) and a first band gap; a source region (e.g. 20/22 at “S”) and a drain region (24 at “C”) spaced apart over the semiconductor layer, source and drain regions having an opposite second conductivity type (n+ type); a gate electrode (“G” 28, column 3 lines 66-67) between the source region and the drain region; a source contact (“S” 26) conductively connected to the source region (22); a drain contact (“D”) over (i.e. at a higher level than) the drain region (24); a semiconductor material (18) between the drain contact (“D”) and the drain region (24), the semiconductor material having a greater second band gap (high figure-of-merit e.g. GaAs or SiC, column 3 lines 60-63); and a conductor (“C” 34) (laterally and/or electrically) between the semiconductor material (18) and the drain region (24). Malhi fails to clearly teach wherein the conductor (“C” 34) includes metal. Rahman teaches wherein an electrode is formed of metal (68, ¶ [0028]). It would have been obvious to one having ordinary skill in the art to have formed the device of Malhi with the conductor formed of metal as taught by Rahman in order to select a material which forms good ohmic contact ( Rahman ¶ [0028]) and since metals are well-known to provide low resistance and since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp ., 325 U.S. 327, 65 USPQ 297 (1945), In re Leshin , 277 F.2d 197, 125 USPQ 416 (CCPA 1960), and MPEP 2144.07 Art Recognized Suitability for an Intended Purpose . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim 9 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : U.S. Patent Number 8,541,838 B2 to Jiang teaches (e.g. Fig. 4) an LDMOS with a drain-connected diode (44, Abstract); U.S. Patent Number 9,825,141 B2 to Liu et al . teaches (e.g. Figure 1) an LDMOS with a drain-connected voltage attenuation structure (136). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC A WARD whose telephone number is (571)270-3406. The examiner can normally be reached M-F 10-6 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Eric A. Ward/ Primary Examiner, Art Unit 2891 Application/Control Number: 18/066,511 Page 2 Art Unit: 2891 Application/Control Number: 18/066,511 Page 3 Art Unit: 2891 Application/Control Number: 18/066,511 Page 4 Art Unit: 2891 Application/Control Number: 18/066,511 Page 5 Art Unit: 2891 Application/Control Number: 18/066,511 Page 6 Art Unit: 2891 Application/Control Number: 18/066,511 Page 7 Art Unit: 2891 Application/Control Number: 18/066,511 Page 8 Art Unit: 2891 Application/Control Number: 18/066,511 Page 9 Art Unit: 2891 Application/Control Number: 18/066,511 Page 10 Art Unit: 2891 Application/Control Number: 18/066,511 Page 11 Art Unit: 2891
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