DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3-4, 8 and 10-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Boothby (US 2021/0091062).
Regarding claim 1, Boothby discloses, as shown in Figures 3A, 9 and [0007], 0090]-[0091], a qubit device (301,900) comprising a first superconducting loop (911) comprising one Josephson junction, and a second superconducting loop (921) having an inductance. Boothby does not disclose the inductance of the second superconducting loop higher than an inductance of the first superconducting loop. However, Boothby discloses the inductance can be selected, adjusted or tuned. Note [0007]-[0008] of Boothby. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the superconductive loop of Boothby having different inductance, such as taught by [0008] of Boothby, in order to cause the qubit to be operable as bistable device.
Regarding claim 3, Boothby discloses the inductance can be selected, adjusted or tuned, therefore, the second superconducting loop can have the inductance higher than the inductance of the first superconducting loop by a predefined offset value [0008].
Regarding claim 4, Boothby discloses the inductor is a part of the Josephson junction so the offset value being a function of an inductance of the Josephson junction [0008].
Regarding claims 8 and 18, Boothby discloses the Josephson junction being any one of:
a lithographically patterned superconducting-semiconducting planar Josephson junction;
a superconducting-semiconducting vapor-liquid solid nanowire Josephson junction;
a selective area grown semiconductor structure with evaporated superconductor;
a Graphene Josephson junction;
a multi-terminal Josephson junction (301 has a plurality of contacts/terminals 302, Figures 3A-4);
a Josephson junction based on ferromagnetic materials; and
an atomic break junction.
Regarding claims 10-11 and 16-17, Boothby does not disclose the second superconducting loop being configured according to predefined constriction dimensions or length. However, Boothby discloses the inductance can be selected, adjusted or tuned so that the dimensions and/or length should be changed accordingly. Note [0007]-[0008] of Boothby. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to configure the second superconducting loop Boothby having predefined constriction dimensions and/or length to perform the desired function.
Regarding claim 12, Boothby discloses high inductance superconductors are integrated into the second superconducting loop (into the processor chip 301 [0053]).
Regarding claims 13 and 19, Boothby does not disclose the qubit device being an Andreev-type qubit device. Boothby discloses the processor chip 301 can incorporate different kinds of qubits into the processor chips. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to incorporate the qubit device of Boothby being an Andreev-type qubit device in order to perform the desired function.
Regarding claim 14, Boothby discloses, as shown in Figures 3A, 9 and [0007], 0090]-[0091], a method comprising:
forming the qubit device (301,900), wherein the qubit device comprises:
a first superconducting loop (911) comprising one Josephson junction, and a second superconducting loop (921) having an inductance.
Boothby does not disclose the inductance of the second superconducting loop higher than an inductance of the first superconducting loop. However, Boothby discloses the inductance can be selected, adjusted or tuned. Note [0007]-[0008] of Boothby. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the superconductive loop of Boothby having different inductance, such as taught by [0008] of Boothby, in order to cause the qubit to be operable as bistable device.
Regarding claim 15, Boothby discloses the inductance can be selected, adjusted or tuned, therefore, the second superconducting loop can have the inductance higher than the inductance of the first superconducting loop by a predefined offset value [0008].
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Boothby (US 2021/0091062) in view of Epstein (PN 11,664,804).
Boothby discloses the claimed invention including the qubit device as explained in the above rejection. Boothby does not disclose the inductance is a kinetic inductance, or the sum of the kinetic inductance and a geometric inductance. However, Epstein discloses an inductance is a kinetic inductance, or the sum of the kinetic inductance and a geometric inductance. Note Col. of Epstein. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the inductance of Boothby being a kinetic inductance, or the sum of the kinetic inductance and a geometric inductance, such as taught by Epstein in order to have the desired inductance.
Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Boothby (US 2021/0091062) in view of Zagoskin et al. (US 2003/0071258).
Regartding claim 5, Boothby discloses the claimed invention including the qubit device as explained in the above rejection. Boothby does not disclose the second superconducting loop having an area higher than an area of the first superconducting loop. However, Zagoskin et al. discloses an inductance with larger area (20) should have higher inductance than the inductance with smaller area (10). Note Figures 1-2 and [0069] of Zagoskin et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the second superconducting loop of Boothby having larger area than an area of the first superconducting loop, such as taught Zagoskin et al. in order to perform the desired function.
Regarding claim 6, Boothby discloses the claimed invention including the qubit device as explained in the above rejection. Boothby does not disclose the first superconducting loop having a first area and a first inductance, the second superconducting loop having a second area and a second inductance, wherein the ratio of the first area and second area is equal to the ratio of the first inductance and second inductance. However, Zagoskin et al. discloses an inductance with larger area (20) should have higher inductance than the inductance with smaller area (10) so the ratio of the first area and second area is equal to the ratio of the first inductance and second inductance. Note Figures 1-2 and [0069] of Zagoskin et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the second superconducting loop of Boothby having larger area than an area of the first superconducting loop, such as taught Zagoskin et al. in order to perform the desired function.
Claim(s) 7, 9 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Boothby (US 2021/0091062) in view of Oliver et al. (US 2018/0013052).
Regarding claims 7 and 20, Boothby discloses the claimed invention including the qubit device as explained in the above rejection. Boothby does not disclose the first superconducting loop being configured to inductively couple to a readout resonator and/or to inductively couple to control lines. However, Oliver et al. disclose a qubit having a first superconducting loop being configured to inductively couple (by 310a/310b, 374/376, 386/388, etc.) to a readout resonator and/or to inductively couple to control lines. Note Figures 14-29 of Oliver et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to inductively couple the superconducting loop of Boothby to a readout resonator and/or to inductively couple to control lines, such as taught by Oliver et al. in order to perform the desired function.
Regarding claim 9, Boothby discloses the claimed invention including the qubit device as explained in the above rejection. Boothby does not disclose an inductor of the second superconducting loop comprising a tuneable array of superconducting-semiconducting planar Josephson junctions in a two-dimensional electron gas. However, Oliver et al. discloses an inductor is part of tunable Joshphson junction. Note [0299] of Oliver et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to for the inductor of Boothby being part of tunable Joshphson junction, such as taught by Oliver et al. in order to perform the desired function
Conclusion
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/HUNG K VU/ Primary Examiner, Art Unit 2897