Prosecution Insights
Last updated: May 29, 2026
Application No. 18/068,003

CHIP DEVICE

Final Rejection §103
Filed
Dec 19, 2022
Priority
Dec 20, 2021 — TW 110215140
Examiner
ARDEO, EMILIO
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sunonwealth Electric Machine Industry Co. Ltd.
OA Round
2 (Final)
33%
Grant Probability
At Risk
3-4
OA Rounds
0m
Est. Remaining
58%
With Interview

Examiner Intelligence

Grants only 33% of cases
33%
Career Allowance Rate
2 granted / 6 resolved
-34.7% vs TC avg
Strong +25% interview lift
Without
With
+25.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
13 currently pending
Career history
32
Total Applications
across all art units

Statute-Specific Performance

§103
88.5%
+48.5% vs TC avg
§102
6.6%
-33.4% vs TC avg
§112
4.9%
-35.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 6 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, see pg. 9 of Remarks, filed 11/10/2025, with respect to the rejection(s) of claims 1 and 16 under 35 U.S.C. §102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new grounds of rejection is made in view of Pu et al. (US 7671466 B2). Applicant amends claims 1 and 16 to include the limitation “the heat conducting medium is free from directly contacting the at least one chip.” The applicant argues that Khanna fails to disclose or suggest the heat conducting medium is free from directly contacting the at least one chip, submitting Fig. 2 of Khanna which depicts a heat conducting medium 274 in direct contact with chip 254a or 254n. The applicant further argues that the independent claims of claims 1 and 16 must be allowable since the disclosures of O’Neal, Besshi, and Bailey fails to disclose that the heat conducting medium is free from directly contacting the at least one chip. The examiner considers the argument persuasive. However, upon further examination and consideration, the examiner introduces new evidence that suggests having a heat conducting medium that is free from directly contacting the chip is a well-known variation in the art as taught by Pu et al. (US 7671466 B2). Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 10, 14, 16, 17, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Khanna et al. (US 20070086168 A1), hereinafter referred to as Khanna, in further view of Pu et al. (US 7671466 B2), hereinafter Pu. Regarding the independent claim 1: A chip device, comprising: a substrate having a first surface and a second surface opposite to the first surface (Khanna, Fig. 2, electronic component assembly 215 with substrate 250); at least one chip disposed over the first surface of the substrate and having a heat transfer surface (Khanna, Fig. 2, chip 254); a sealing component covering the at least one chip and having a heat transfer area thermal contacting the heat transfer surface of the at least one chip (Khanna, encapsulating mechanism 230, where the heat transfer area is interpreted by the examiner as inherent to any elements capable of transferring heat via thermal contact); a heat-conducting medium disposed over the heat transfer area of the sealing component (Khanna, Fig. 1 thermally conductive medium 274. [0021] “The thermally conductive medium 274 is provided in an amount that is 260 adequate to fill any gaps between top surfaces of the chip(s) and the heat sink under loading conditions to be described”); a barrier disposed around and blocking the heat-conducting medium (Khanna [0021]-[0022] “an enclosed reservoir 272 to house a suitable thermally conductive medium 274”, where the examiner interprets the reservoir being enclosed by sealing element 276, which is a barrier); and a heat dissipation device disposed over the heat transfer area of the sealing component and on the heat-conducting medium (Khanna Fig. 1, Heat dissipation device (210, 242) disposed on top of heat transfer area of sealing component 230). Khanna fails to teach the chip device wherein the heat conducting medium is free from directly contacting the at least one chip. However, in a related field of endeavor, Pu teaches a heat conducting medium that is free from directly contacting the at least one chip (Pu Col. 7 Line 3 “The cooling fluid in the hollow chamber can perform heat exchange with the chip 21 and absorb heat generated by the chip 21.” Where the examiner interprets the cooling fluid as the heat conducting medium. The heat conducting medium, being confined to the hollow chamber as shown in Fig. 5B, is free from directly contacting the at least one chip.). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of Pu to the disclosure of Khanna in order to integrate a heat-conducting medium that is free from directly contacting the at least one chip. This is obvious to try as this is a known configuration in the art with the expected result of being able to absorb heat generated by the chip as taught by Pu (Pu Col. 7 Line 5). Regarding claim 2: The combined disclosure of Khanna and Pu teach the device of claim 1. Khanna further teaches the device wherein the sealing component includes a frame disposed at a periphery of the heat transfer area and on the substrate (Khanna [0022], “The sealing element 276 may be applied in any known manner to peripherally encompass the semiconductor chips” Where the examiner interprets the sealing element 276 as also framing the sealing component.). Regarding Claim 10: The combined disclosure of Khanna and Pu teach the device of claim 2. Khanna further teaches the device further comprising a heat-transferring medium and an isolator (Khanna Fig. 2, Heat transfer medium 274 and sealing element 276), wherein the heat-transferring medium is between the heat transfer area of the sealing component and the heat transfer surface of the at least one chip (Khanna Heat transfer surface of at least one chip 260, with heat transfer medium 274, in between the heat transfer surface which is interpreted by the examiner as any surface capable of conducting heat.), and the isolator is disposed around and isolates the heat-transferring medium (Khanna Fig. 2 sealing element 276). Regarding Claim 14: Khanna The combined disclosure of Khanna and Pu teaches the device of claim 10. Khanna teaches the device wherein the frame of the sealing component includes an inner ring wall, and the isolator is disposed at the inner ring wall (Khanna Fig. 2, sealing component 230 includes isolator 276 which the examiner interprets to also define an inner ring wall). Regarding the independent Claim 16: A chip device, comprising: a substrate having a first surface and a second surface opposite to the first surface (Khanna Fig. 2, substrate 215); at least one chip disposed over the first surface of the substrate and having a heat transfer surface (Khanna Fig. 2, chip(s) 254 that is interpreted by the examiner to inherently have a heat transfer surface that is interpreted as any surface capable of transmitting heat.); a sealing component covering the at least one chip and having a heat transfer area (Khanna Fig. 2, sealing component 230, where the heat transfer area is interpreted by the examiner as inherent to any elements capable of transferring heat via thermal contact); a heat-transferring medium disposed between the heat transfer area of the sealing component and the heat transfer surface of the at least one chip (Khanna Heat transfer surface of at least one chip 260, with thermally conductive medium 274, in between the heat transfer surface which is interpreted by the examiner as any surface in capable of conducting heat.); and an isolator disposed around and isolating the heat-transferring medium (Khanna Fig. 2 sealing element 276). Khanna fails to teach the chip device wherein the heat conducting medium is free from directly contacting the at least one chip. However, in a related field of endeavor, Pu teaches a heat conducting medium that is free from directly contacting the at least one chip (Pu Col. 7 Line 3 “The cooling fluid in the hollow chamber can perform heat exchange with the chip 21 and absorb heat generated by the chip 21.” Where the examiner interprets the cooling fluid as the heat conducting medium. The heat conducting medium, being confined to the hollow chamber as shown in Fig. 5B, is free from directly contacting the at least one chip.). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of Pu to the disclosure of Khanna in order to integrate a heat-conducting medium that is free from directly contacting the at least one chip. This is obvious to try as this is a known configuration in the art with the expected result of being able to absorb heat generated by the chip as taught by Pu (Pu Col. 7 Line 5). Regarding claim 17: The combined disclosure of Khanna and Pu teach the device of claim 16. Khanna further teaches the device wherein the sealing component includes a frame disposed at a periphery of the heat transfer area and on the substrate (Khanna Fig. 2, Sealing component 230 with sealing element 276 disposed at the periphery of the heat transfer area which is the area interpreted by the examiner as capable of conducting heat.). Regarding claim 21: The combined disclosure of Khanna and Pu teach the device of claim 17. Khanna further teaches the device wherein the frame of the sealing component includes an inner ring wall, and the isolator is disposed at the inner ring wall (Khanna Fig. 2, sealing component 230 includes sealing element 276 which the examiner interprets to also define an inner ring wall). Claims 3-5, 12-13, 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Khanna and Pu, in further view of O’Neal et al. (US 6222264 B1), hereinafter referred to as O’Neal, in further view of Besshi et al. (US 9236324 B2), hereinafter referred to as Besshi. Regarding claim 3: The combined disclosure of Khanna and Pu teach the device of claim 2. Khanna and Pu fail to teach device wherein the frame of the sealing component has a ring trench facing the heat dissipation device, and the barrier is disposed in the ring trench. However, in a similar endeavor, O’Neal teaches wherein the frame of the sealing component has a ring trench, and the barrier is disposed in the ring trench (O’Neal Fig. 1, trench 28, with barrier 32 disposed in the trench 28). O’Neal fails to teach the ring trench facing the heat dissipation device. However in a similar field of endeavor, Besshi, teaches a device wherein the trench is facing the heat dissipation device (Besshi Fig. 9, with trench 13, facing heat dissipation device 8). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of O’Neal, to the combined disclosure of Khanna and Pu, in order to provide trenches for the gaskets. This is obvious to try as this results in a secure seal that allows for flowable thermal interface materials to be used in mass production (O’Neal Col. 3 Line 12). The said trench can then be configured to face the heat dissipation device as taught by Besshi (Fig. 9, Fig. 11, Trench 13). Therefore, a person having ordinary skill in the art would have been able to implement a trench with a similar orientation, prior to the effective filing date of the claimed invention, as this is a known variation in the art as taught by Besshi (Besshi Fig. 9 Fig. 11). Regarding claim 4: The combined disclosure of Khanna and Pu teach the device of claim 2. Khanna and Pu fail to teach the device wherein the heat dissipation device has a ring trench facing the sealing component, and the barrier is disposed in the ring trench. However, in a similar endeavor, O’Neal teaches wherein the heat dissipation device has a ring trench, and the barrier is disposed in the ring trench (O’Neal Fig. 2, the ring trench 28 on heat dissipation device 16). O’Neal fails to teach the ring trench facing the sealing component. However in a similar field of endeavor, Besshi, teaches a device wherein the ring trench is facing the facing the sealing component (Besshi Fig. 12, with trench 14, facing sealing component 6). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of O’Neal, to the combined disclosure of Khanna and Pu in order to provide trenches for the gaskets. This is obvious to try as this results in a secure seal that allows for flowable thermal interface materials to be used in mass production (O’Neal Col. 3 Line 12). The said trench can also be configured to face the sealing component as taught by Besshi (Fig. 12, Trench 14). Therefore, a person having ordinary skill in the art would have been able to implement a trench of such orientation, prior to the effective filing date of the claimed invention, as this is a known variation in the art (Besshi Fig. 12, Trench 14). Regarding claim 5: The combined disclosure of Khanna and Pu teach the device of claim 2. Khanna and Pu fails to teach the device wherein the sealing component has a first corresponding groove, the heat dissipation device has a second corresponding groove, and the first corresponding groove corresponds to the second corresponding groove to constitute an accommodating space configured to accommodate the barrier. However, in a related field of endeavor, O’Neal teaches a device wherein the sealing component has a first corresponding groove to constitute an accommodating space configured to accommodate the barrier (O’Neal Fig. 1, groove 28, and barrier 32). O’Neal fails to teach a second corresponding groove. However, in a related field of endeavor, Besshi teaches that the grooves can be patterned unto the sealing component (Besshi, Fig. 9) or the heat dissipation device (Besshi, fig. 10). Therefore, a person having ordinary skill in the art would have been able to apply the teachings of O’Neal to the combined disclosure of Khanna and Pu in order to place grooves on the sealing component and the heat dissipation member in order to form corresponding grooves, prior to the effective filing date of the claimed invention. This could be done using known methods in the art and with the expected result of being able to provide an accommodating space for a barrier such as a gasket. This is obvious to try as the use of gaskets in trenches are known methods of preventing the flow of flowable thermally conductive material which allows their widespread application in mass produced devices (O’Neal Col.3 Line 13). Furthermore, a person having ordinary skill in the art would have been able been able to apply the teachings of Besshi to the disclosure of O’Neal in order to understand that the accommodating groove can be patterned unto the sealing component or the heat dissipation device in order implement a second corresponding groove. This is obvious to try as accommodating grooves on the component side or the heat dissipation side are known implementations in the art to secure sealing components as taught by Besshi (ibid.). Therefore, a person having ordinary skill in the art would have been able to apply the teachings of O’Neal to the combined disclosure of Khanna and Pu in order to place grooves on the sealing component and the heat dissipation member in order to form corresponding grooves, prior to the effective filing date of the claimed invention. This could be done using known methods in the art and with the expected result of being able to provide an accommodating space for a barrier such as a gasket. This is obvious to try as the use of gaskets in trenches are known methods of preventing the flow of flowable thermally conductive material which allows their widespread application in mass produced devices (O’Neal Col.3 Line 13). Regarding Claim 12: The combined disclosure of Khanna, Pu, and O’Neal teach the device of claim 10. Khanna, Pu, and O’Neal fail to teach the device wherein the substrate has a ring groove facing the sealing component, and the isolator is disposed in the ring groove. However in a similar field of endeavor, Besshi, teaches a device wherein the ring trench is facing the facing the sealing component (Besshi Fig. 12, with trench 14, facing sealing component 6). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, that the said grooves can also be configured to face the sealing component as taught by Besshi (Fig. 12, Trench 14 facing sealing component 6). Therefore, a person having ordinary skill in the art would have been able to implement a trench of such orientation, prior to the effective filing date of the claimed invention, as this is a known variation in the art (Besshi Fig. 12, Trench 14). Regarding Claim 13: The combined disclosure of Khanna, Pu, and O’Neal teach the device of claim 10. Khanna and Pu fails to teach the device wherein the frame of the sealing component has a first relative groove, the substrate has a second relative groove, and the first relative groove corresponds to the second relative groove to constitute an arranging space configured to arrange the isolator. However, in a related field of endeavor, O’Neal teaches a device wherein the frame of the sealing component has a first relative groove with an arranging space configured to arrange the isolator (O’Neal Fig. 1, groove 28 with isolator 32). O’Neal fails to teach the substrate has a second relative groove. However, in a related field of endeavor, Besshi teaches that the grooves can be patterned unto the sealing component (Besshi, Fig. 9, groove 13 on sealing component 6) or the substrate (Besshi, fig. 10, groove 14 on substrate 12). The examiner interprets the substrate as any surface capable of providing mechanical support to other structures). Therefore, a person having ordinary skill in the art would have been able been able to apply the teachings of Besshi to the disclosure of O’Neal in order to understand that the accommodating groove can be patterned unto the sealing component or the heat dissipation device in order implement a second corresponding groove. This is obvious to try as accommodating grooves on the component side or the heat dissipation side are known implementations in the art to secure sealing components as taught by Besshi (ibid.). Furthermore, a person having ordinary skill in the art would have been able to apply the combined teachings of O’Neal and Besshi to the combined disclosure of Khanna and Pu in order to place grooves on either the sealing component and the heat dissipation member in order to form corresponding grooves, prior to the effective filing date of the claimed invention. This could be done using known methods in the art and with the expected result of being able to provide an accommodating space for a gasket. This is obvious to try as the use of gaskets in accommodating trenches are known methods of preventing the flow of flowable thermally conductive material which allows their widespread application in mass produced devices (O’Neal Col.3 Line 13). Regarding claim 19: The combined disclosure of Khanna and Pu teach the device of claim 17. Khanna and Pu fail to teach the device wherein the substrate has a ring groove facing the sealing component, and the isolator is disposed in the ring groove. However, in a related field of endeavor, O’Neal teaches the use of ring grooves with isolator disposed in the ring groove (O’Neal Fig. 1, ring groove 28 and isolator 32). O’Neal fails to teach that the ring grooves are facing the sealing component. However in a similar field of endeavor, Besshi, teaches a device wherein the ring trench is facing the facing the sealing component (Besshi Fig. 12, with trench 14, facing sealing component 6). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, that the said grooves can also be configured to face the sealing component as taught by Besshi (Fig. 12, Trench 14 facing sealing component 6). Therefore, a person having ordinary skill in the art would have been able to implement a trench of such orientation, prior to the effective filing date of the claimed invention, as this is a known variation in the art (Besshi Fig. 12, Trench 14). Therefore, a person having ordinary skill in the art would have been able been able to apply the teachings of Besshi to the disclosure of O’Neal in order to understand that the accommodating groove can be patterned facing the sealing component. This is obvious to try as accommodating grooves patterned on the sealing component are known implementations in the art to secure sealing components as taught by Besshi (ibid.). Furthermore, a person having ordinary skill in the art would have been able to apply the combined teachings of O’Neal and Besshi to the combined disclosure of Khanna and Pu in order to place grooves on either the sealing component and the heat dissipation member in order to form corresponding grooves, prior to the effective filing date of the claimed invention. This could be done using known methods in the art and with the expected result of being able to provide an accommodating space for a gasket. This is obvious to try as the use of gaskets in accommodating trenches are known methods of preventing the flow of flowable thermally conductive material which allows their widespread application in mass produced devices (O’Neal Col.3 Line 13). Regarding claim 20: The combined disclosure of Khanna and Pu teach the device of claim 17. Khanna and Pu fails to teach the device wherein the frame of the sealing component has a first relative groove, the substrate has a second relative groove, and the first relative groove corresponds to the second relative groove to constitute an arranging space configured to arrange the isolator. However, in a related field of endeavor, O’Neal teaches a device wherein the frame of the sealing component has a first relative groove with an arranging space configured to arrange the isolator (O’Neal Fig. 1, groove 28 with isolator 32). O’Neal fails to teach the substrate has a second relative groove. However, in a related field of endeavor, Besshi teaches that the grooves can be patterned unto the sealing component (Besshi, Fig. 9, groove 13 on sealing component 6) or the substrate (Besshi, fig. 10, groove 14 on substrate 12). The examiner interprets the substrate as any surface capable of providing mechanical support to other structures). Therefore, a person having ordinary skill in the art would have been able to place grooves on the either the sealing component, as taught by O’Neal and Besshi, and the substrate, as taught by Besshi, in order to form corresponding grooves, prior to the effective filing date of the claimed invention. This could be done using known methods in the art and with the expected result of being able to provide an arranging space for a barrier such as a gasket as taught by the combined disclosure of Khanna and Pu. This is obvious to try as securing gaskets in arranging spaces are known methods of preventing the flow of flowable thermally conductive material which allows their widespread application in mass produced devices (O’Neal Col.3 Line 13). Claims 11, 15, 18, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Khanna and Pu, in further view of O’Neal. Regarding Claim 11: The combined disclosure of Khanna and Pu teaches the device of claim 10. Khanna and Pu fails to teach the device wherein the frame of the sealing component has a ring groove facing the substrate, and the isolator is disposed in the ring groove. However, in a similar endeavor, O’Neal teaches wherein the frame of the sealing component has a ring groove facing the substrate, and the isolator is disposed in the ring groove (O’Neal Fig. 1, ring groove 28 facing the direction of the substrate, with isolator 32 disposed in the groove 28). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of O’Neal, to the combined disclosure of Khanna and Pu, in order to provide grooves for the barrier. This is obvious to try as this results in a secure seal that allows for flowable thermal interface materials to be used in mass production (O’Neal Col. 3 Line 12). Regarding Claim 15: The combined disclosure of Khanna and Pu teaches the device of claim 10. Khanna and Pu fails to teach the method wherein the heat transfer area of the sealing component has an accommodating groove facing the heat transfer surface of the at least one chip, and the isolator is disposed in the accommodating groove. However, in a similar endeavor, O’Neal teaches wherein the heat transfer area of the sealing component has an accommodating groove facing the heat transfer surface of the at least one chip, and the isolator is disposed in the accommodating groove. (O’Neal Fig. 1, trench 28, with barrier 32 disposed in the accommodating groove 28, where the examiner interprets the heat transfer area as any area capable of conducting heat. The examiner also notes that the groove 28 opens towards the direction facing the heat transfer surface of the chip 18.) Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of O’Neal, to the combined disclosure of Khanna and Pu, in order to provide accommodating grooves for the isolator. This is obvious to try as this results in a secure seal that allows for flowable thermal interface materials to be used in mass production (O’Neal Col. 3 Line 12). Regarding claim 18: The combined disclosure of Khanna and Pu teaches the device of claim 10. Khanna and Pu fails to teach the device wherein the frame of the sealing component has a ring groove facing the substrate, and the isolator is disposed in the ring groove. However, in a similar endeavor, O’Neal teaches wherein the frame of the sealing component has a ring groove facing the substrate, and the isolator is disposed in the ring groove (O’Neal Fig. 1, ring groove 28 facing the direction of the substrate, with isolator 32 disposed in the groove 28). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of O’Neal, to the combined disclosure of Khanna and Pu, in order to provide grooves for the barrier. This is obvious to try as this results in a secure seal that allows for flowable thermal interface materials to be used in mass production (O’Neal Col. 3 Line 12). Regarding claim 22: The combined disclosure of Khanna and Pu teach the device of claim 17. Khanna and Pu fails to teach the device wherein the heat transfer area of the sealing component has an accommodating groove facing the heat transfer surface of the at least one chip, and the isolator is disposed in the accommodating groove. However, in a similar endeavor, O’Neal teaches wherein the heat transfer area of the sealing component has an accommodating groove facing the heat transfer surface of the at least one chip, and the isolator is disposed in the accommodating groove. (O’Neal Fig. 1, trench 28, with barrier 32 disposed in the accommodating groove 28, where the examiner interprets the heat transfer area as any area capable of conducting heat. The examiner also notes that the groove 28 opens towards the direction facing the heat transfer surface of the chip 18.) Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of O’Neal, to the disclosure of Khanna and Pu, in order to provide accommodating grooves for the isolator. This is obvious to try as this results in a secure seal that allows for flowable thermal interface materials to be used in mass production (O’Neal Col. 3 Line 12). Claims 6 and 7 rejected under 35 U.S.C. 103 as being unpatentable over the combined disclosure of Khanna and Pu and in further view of Bailey et al. (US 20070177367 A1), hereinafter referred to as Bailey. Regarding claim 6: The combined disclosure of Khanna and Pu teach the device of claim 2. Khanna and Pu fails to teach the device wherein the barrier is disposed outside the frame. However, in a similar field of endeavor, Bailey discloses a device wherein the barrier is disposed outside the frame (Bailey Fig. 7, [0057] “The gasket 120 surrounds the TIM and chip and acts (in combination with the vapor barrier 145) as an isolation barrier to isolate the TIM from atmosphere outside the gasket”). Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, to apply the teachings of Bailey to the combined disclosure of Khanna and Pu to have been able to implement a barrier outside the frame of a sealing component as this is a known way of sealing thermal interface material as taught by Bailey (Bailey, [0014]). This is obvious to try as ensuring a good seal helps prevent the migration of a thermal interface material which is known in the art to cause reliability issues stemming from poor heat transfer between the heat emitting device and the heat sink (Bailey [0011]). Regarding claim 7: The combined disclosure of Khanna, Pu, and Bailey teaches the device of claim 6. Khanna further teaches the device wherein the heat dissipation device includes a heat conduction area disposed over the heat transfer area of the sealing component and the frame (Khanna Fig. 2, heat dissipation device (242, 210) with heat conduction area (242) disposed over a heat transfer area, where the heat transfer area is interpreted by the examiner as an area capable of transmitting heat unto the heat dissipation device. Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over the combined disclosure of Khanna, Pu, and Bailey and in further view of O’Neal. Regarding Claim 8: The combined disclosure of Khanna, Pu, and Bailey teaches the device of claim 7. Khanna and Pu fails to teach a device wherein a first outer edge of the heat conduction area is aligned with a second outer edge of the frame of the sealing component, and the barrier is disposed at the first outer edge of the heat conduction area and the second outer edge of the frame. However, in a similar field of endeavor, O’Neal teaches the device wherein a first outer edge of the heat conduction area is aligned with a second outer edge of the frame of the sealing component (O’Neal Fig. 1 Outer edge of heat conducting area of heat dissipating body 16, and second outer edge of sealing component 16 are aligned, since the sealing component 16 also functions as the heat dissipating body). O’Neal fails to teach the device wherein the barrier is disposed at the first outer edge of the heat conduction area and the second outer edge of the frame. However in a similar field of endeavor, Bailey teaches the device wherein the barrier is disposed at the first outer edge of the heat conduction area and the second outer edge of the frame (Bailey Fig. 7, barrier, 120, first outer edge of heat conduction area (110). Therefore, it would have been obvious to a person having ordinary skill in the art, prior, to the effective filing date of the claimed invention, that the devices of Khanna or Pu could also have a form factor wherein the first outer edge of the heat conduction area is aligned with the second outer edge of the frame of the sealing component as this is a known form factor in the art and can be implemented by known methods in the art. It also would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, that the barrier can be disposed at the outer edge of the frame of the sealing member as this is taught by Bailey as a viable way of sealing a thermal interface material and isolate if from the atmosphere outside the gasket (Bailey [0057]). This is obvious to try as preventing the migration of thermal interface materials would ensure efficient heat transfer between processor and heat sinks (Bailey [0011]). Regarding Claim 9: The combined disclosure of Khanna, Pu, and Bailey teaches the device of claim 7. Khanna and Pu fail to teach a device wherein a first outer edge of the heat conduction area extends beyond a second outer edge of the frame of the sealing component, and the barrier is disposed under the heat conduction area and at the second outer edge of the frame. However in a similar field of endeavor, Bailey teaches the device wherein device wherein a first outer edge of the heat conduction area is aligned with a second outer edge of the frame of the sealing component (Bailey Fig. 7, first outer edge of heat conduction area (110)) and the barrier is disposed under the heat conduction area and at the second outer edge of the frame (Bailey Fig. 7, [0057] barrier 120, “The gasket 120 surrounds the TIM and chip and acts (in combination with the vapor barrier 145) as an isolation barrier to isolate the TIM from atmosphere outside the gasket”) Therefore, it would have been obvious to a person having ordinary skill in the art, prior to the effective filing date of the claimed invention, that the barrier can be disposed at the outer edge of the frame of the sealing member as this is taught by Bailey as a viable way of sealing a thermal interface material and isolate if from the atmosphere outside the gasket (Bailey [0057]). This is obvious to try as preventing the migration of thermal interface materials would ensure efficient heat transfer between processor and heatsinks (Bailey [0011]). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILIO ARDEO whose telephone number is (703)756-1235. The examiner can normally be reached Mon-Fri EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at 408-918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EMILIO ARDEO/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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Prosecution Timeline

Dec 19, 2022
Application Filed
Jun 12, 2025
Non-Final Rejection mailed — §103
Nov 10, 2025
Response Filed
Apr 01, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
33%
Grant Probability
58%
With Interview (+25.0%)
3y 6m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 6 resolved cases by this examiner. Grant probability derived from career allowance rate.

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