Prosecution Insights
Last updated: April 19, 2026
Application No. 18/068,886

TRANSPARENT TOUCH DISPLAY DEVICE

Non-Final OA §102§103
Filed
Dec 20, 2022
Examiner
HUNTER III, CARNELL
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
3y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
57 granted / 62 resolved
+23.9% vs TC avg
Moderate +15% lift
Without
With
+15.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
24 currently pending
Career history
86
Total Applications
across all art units

Statute-Specific Performance

§103
49.4%
+9.4% vs TC avg
§102
29.2%
-10.8% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 62 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election Applicant’s election without traverse of Species B, claims 1-3 and 5-20, in the reply filed on 11/19/2025 is acknowledged. IDS The IDS document(s) filed on 08/24/2023 and 01/09/2026 have been considered. Copies of the PTO-1449 documents are herewith enclosed with this office action. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 5 and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nakanishi (US 2020/0012374 A1), hereafter “Nakanishi”. As to claim 1, Nakanishi teaches a transparent touch display device comprising: a substrate (Fig. 12B, 110, ⁋ [0051]) including a pixel area (Fig. 12A, 104, ⁋ [0041]), a first transmission area located on a first side of the pixel area, and a second transmission area located on a second side of the pixel area (Fig. 12A, 106c, ⁋ [0083], see Fig. 1A which shows pixel areas 104 surrounded by transmission regions 106a on multiple sides); a driving transistor (Fig. 3, 130, ⁋ [0054]; ⁋ [0051], “The circuit element layer 112 is a layer formed of a circuit (pixel circuit) which drives pixels by active devices such as transistors or passive devices such as capacitors.”) disposed in the pixel area; an anode electrode (124, ⁋ [0051]) disposed in the pixel area, located over the driving transistor, and electrically connected to a source electrode or a drain electrode of the driving transistor (⁋ [0054], “The first electrode 124 is electrically connected to the transistor 130 via the source/drain electrode 142”); an emission layer (126) located on the anode electrode; a display cathode electrode (128) located on the emission layer; a first touch cathode electrode (118, ⁋ [0041]) disposed in the first transmission area and located on a first side of the display cathode electrode; a second touch cathode electrode (118 of the second transmission area) disposed in the second transmission area and located on a second side of the display cathode electrode; a first touch line (Fig. 15, 154, ⁋ [0064]) electrically connected to at least one of the first touch cathode electrode (118) and the second touch cathode electrode (see Fig. 15, see also ⁋ [0065], “the sensor electrode 118 is electrically connected to the detection wiring 154”); and a first upper touch shield (Fig. 15, 168b, ⁋ [0088]) disposed over the first touch line (154) and overlapping at least a portion of the first touch line. As to claim 2, Nakanishi teaches the transparent touch display device according to claim 1, wherein the first upper touch shield (168b) is disposed in a metal layer (Fig. 15 on layer 144) between a source-drain metal layer (Fig. 3, 142, ⁋ [0054]) in which the source electrode or the drain electrode of the driving transistor is disposed (layer 140) and a pixel electrode layer (⁋ [0058], “The sensor electrode 118 is formed in the same layer as first electrode 124”; Fig. 15 shows 118 to be above 168b which means 124 also would be formed in in a layer above 154) in which the anode electrode (124) is disposed. As to claim 3, Nakanishi teaches the transparent touch display device according to claim 1, wherein the first touch line (154) and the first upper touch shield (168b) overlap the first touch cathode electrode (118) (Fig. 15). As to claim 5, Nakanishi teaches the transparent touch display device according to claim 1, wherein the first touch line (154) and the first upper touch shield (168b) overlap the display cathode electrode (128) (⁋ [0090], “the shield electrode 168b overlapping the sensor electrode 118 may be provided so as to overlap one of or both the scan line 150…”). Examiner notes Fig. 6 shows the location of 150 and 128, which is clear in order for 168b to overlap scan line 150 it would also overlap 128. As shown in Fig. 23, this is also true as it pertains to the first touch line 154 overlapping scan line 150 as a result overlapping 128. As to claim 9, Nakanishi teaches the transparent touch display device according to claim 1, further comprising a side touch shield (Fig. 15, 170+172, ⁋⁋ [0083]- [0084]) located adjacent to the first touch line, wherein the side touch shield includes a same material as the first touch line (⁋ [0084]), and wherein the side touch shield is located, among a first side or edge of the first touch line and a second side or edge opposite to the first side or edge (Fig. 16 shows 170 located among both sides of 154), to be adjacent to the second side or edge closer to the anode electrode than the first side or edge (170 is adjacent to both sides of 154). Claim Rejections - 35 U.S.C. § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 6, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Nakanishi. As to claim 6, Nakanishi teaches the transparent touch display device according to claim 5, further comprising: a driving voltage line (Fig. 4, ⁋ [0059], 152b) disposed in the pixel area a base voltage line (152a) disposed in the pixel area, and electrically connected to the display cathode electrode (128) (see Fig. 4), Nakanishi fails to teach the driving voltage line overlapping the display cathode electrode, the base voltage line overlapping the display cathode electrode; and wherein the first touch line (154) and the first upper touch shield (168b) are disposed between the driving voltage line and the base voltage line, are disposed between the base voltage line and a first edge of the display cathode electrode, or are disposed between the driving voltage line and a second edge of the display cathode electrode. Notwithstanding, it would have been an obvious matter of design choice bounded by well known manufacturing constraints and ascertainable by routine experimentation and optimization to choose these particular dimensions because applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). As to claim 18, Nakanishi teaches the transparent touch display device according to claim 1, but fails to disclose wherein a maximum separation distance between the first touch cathode electrode and the substrate and a maximum separation distance between the second touch cathode electrode and the substrate each is shorter than a maximum separation distance between the display cathode electrode and the substrate. On the other hand, Examiner notes the Applicant has not specified a criticality to the dimensions. If the only difference between the prior art and the claims is a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device: In re Gardner v. TEC Systems, Inc., 220 USPQ 777. Allowable Subject Matter Claims 7-8, 10-17, and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: As to claim 7, Nakanishi is the closest prior art and fails to disclose a second touch line overlapping the display cathode electrode; a display line disposed between the first touch line and the second touch line and located in a different layer from the first touch line and the second touch line; and a second upper touch shield disposed over the second touch line and overlapping the second touch line. As to claim 8, Nakanishi is the closest prior art and fails to disclose a second upper touch shield different from the first touch line; and a plurality of touch lines overlapping the display cathode electrode, wherein the plurality of touch lines include a first group and a second group, all of touch lines in the first group among the plurality of touch lines overlap the first upper touch shield, and all of two or more touch lines in the second group among the plurality of touch lines overlap the second upper touch shield, and wherein a line width of the first upper touch shield is greater than a width of an area in which two or more touch lines in the first group are disposed, and a line width of the second upper touch shield is greater than a width of an area in which the two or more touch lines in the second group are disposed. As to claim 10 (from which 11-14 and 16 depend), Nakanishi is the closest prior art and fails to disclose a first touch bridge that runs across the pixel area and electrically connects the first touch cathode electrode and the second touch cathode electrode, wherein the first touch bridge overlaps the first touch line and is electrically connected to the first touch line. As to claim 15, Nakanishi is the closest prior art and fails to disclose a lower layer located under the display cathode electrode, wherein the lower layer has an under-cut structure in which a lower portion of the lower layer is recessed inwardly or inwardly and downwardly, wherein at a point where the lower layer has the under-cut structure, the display cathode electrode and the first touch cathode electrode are electrically disconnected from each other, and wherein at another point where the lower layer has the under-cut structure, the display cathode electrode and the second touch cathode electrode are electrically disconnected from each other. As to claim 17, Nakanishi is the closest prior art and fails to disclose wherein the display cathode electrode includes an electrode protrusion, the first touch cathode electrode includes an electrode groove in which the electrode protrusion of the display cathode electrode is inserted, and wherein the electrode protrusion and the electrode groove are electrically disconnected from each other, and the electrode protrusion extends up to an inside space of the first transmission area. As to claim 19, Nakanishi is the closest prior art and fails to disclose a reference voltage line disposed in the pixel area, overlapping the display cathode electrode and disposed in a center area of the display cathode electrode and a dummy line overlapping the display cathode electrode, wherein the first touch line is disposed between a first side of the display cathode electrode and the reference voltage line, and the dummy line is disposed between a second side of the display cathode electrode and the reference voltage line, and wherein the dummy line has a different electrical state from the first touch line. As to claim 20, Nakanishi is the closest prior art and fails to disclose a first touch bridge that runs across the pixel area and electrically connects the first touch cathode electrode and the second touch cathode electrode to each other; a first touch line overlapping the first touch bridge and electrically connected to at least one of the first touch cathode electrode and the second touch cathode electrode. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARNELL HUNTER whose telephone number is (571)270-1796. The examiner can normally be reached Monday - Friday 7:30 am - 4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CARNELL HUNTER III/Examiner, Art Unit 2893 /SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Dec 20, 2022
Application Filed
Mar 02, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+15.0%)
3y 5m
Median Time to Grant
Low
PTA Risk
Based on 62 resolved cases by this examiner. Grant probability derived from career allow rate.

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