Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Status of the Claims
1. This action is in response to the applicant’s filing on December 21, 2022. Claims 1-20 are pending.
Claim Rejections – 35 USC § 103
2. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1, 3-6, 8-14, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al (US 20190011567 A1), hereinafter Pacala, in view of McMichael et al (WO 2018125823 A1), hereinafter McMichael.
4. Regarding Claim 1:
Pacala teaches, A method comprising: receiving, from a controller of a light detection and ranging (lidar) device, ([Abstract]: Embodiments describe a solid state electronic scanning LIDAR system). Pacala further teaches, ([0072]: Tx module 106 can further include an optional processor 118 and memory 120, although in some embodiments these computing resources can be incorporated into ranging system controller 104). Pacala teaches, an indication of a first set of light emitters to be fired during a firing cycle, wherein the first set of light emitters is a subset of a plurality of light emitters of the lidar device such that the plurality of light emitters includes one or more light emitters that are not in the first set of light emitters, ([0072]: Light transmission module 106 includes an emitter array 114, which can be a one-dimensional or two-dimensional array of emitters). Pacala further teaches, ([0011]: emitter array firing circuitry coupled to the array of light emitters and configured to activate only a subset of light emitters at a time). Pacala teaches, selectively charging, by a charging circuit of the lidar device during a charging cycle, a first set of energy storage devices of the lidar device, ([0117]: In order to generate light, current is driven through emitters 602 in emitter array 601. Thus, emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601. Each bank 604a-f can include a respective contact array or via array 610a-f for coupling with capacitor bank 608). Pacala further teaches, ([0122]: Additionally, separating the emitter array into multiple banks with separate drive circuitry allows for each channel in the system to operate at substantially lower current).
Pacala also teaches, ([0123]: Each driver 704 corresponds to one emitter bank and the set of drivers 704 can operate in conjunction with multiplexer 706 to activate individual banks within the emitter array in any order). Pacala teaches, wherein each energy storage device of the first set of energy storage devices is associated with a light emitter in the first set of light emitters, ([0117]: In order to generate light, current is driven through emitters 602 in emitter array 601. Thus, emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601). Pacala teaches, emitting light signals from the first set of light emitters during the firing cycle, wherein emitting light signals from the first set of light emitters during the firing cycle comprises discharging, by a pulser circuit, energy stored within each of the energy storage devices in the first set of energy storage devices through the associated light emitter in the first set of light emitters, ([0117] Emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601. Each bank 604a-f can include a respective contact array or via array 610a-f for coupling with capacitor bank 608. Contact arrays 610a-f can be part of the semiconductor dies upon which respective emitter banks 604a-f are constructed. In some embodiments, contact arrays 610a-f are positioned between capacitor bank 608 and light emitters 602 within their respective emitter banks 604a-f. Before activation of one or more emitters in emitter array 601, one or more capacitors in capacitor bank 608 can be charged so that during activation of the one or more emitters in emitter array 601, the one or more charged capacitors can be discharged to drive current through the one or more emitters to emit narrowband light). Pacala does not teach, wherein the first set of energy storage devices is a subset of a plurality of energy storage devices of the lidar device such that the plurality of energy storage devices includes one or more energy storage devices that are not in the first set of energy storage devices and refraining from charging, by the charging circuit of the lidar device during the charging cycle, each energy storage device in the plurality of energy storage devices that is not in the first set of energy storage devices. However, McMichael teaches a LiDAR system, ([0041] The channels are divided into multiple charging banks. In described embodiments, the channels are divided into two charging banks. The capacitors corresponding to the laser emitters of one charging bank are charged while the laser emitters of the other charging bank are being fired. This allows a first bank of the channels to be used at a high rate, while allowing for the much lower rate at which the capacitors of each channel can be charged). McMichael, further teaches, ([0122] In the described embodiment, each channel is assigned to one or the other of two charging banks. Charging of the capacitors associated with all of the emitters of a single charging bank is performed concurrently. Charging is performed in repeated cycles of first charging the capacitors associated with emitters of the first charging bank and subsequently charging the capacitors associated with emitters of the second charging bank. While a bank is being charged, the channels of the other bank are used for distance measurements). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala with McMichael since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala with McMichael since, (Pacala: [0122]: Additionally, separating the emitter array into multiple banks with separate drive circuitry allows for each channel in the system to operate at substantially lower current). Charging fewer channels at a time would reduce the current requirement for the entire system.
5. Regarding Claim 3:
Pacala as modified by McMichael teaches, wherein the indication of the first set of light emitters to be fired during the firing cycle is received from the controller of the lidar device by a processor of the charging circuit, ([0072]: Tx module 106 can further include an optional processor 118 and memory 120, although in some embodiments these computing resources can be incorporated into ranging system controller 104). Pacala further teaches, ([0075]: Emitter controller 115 can also be any suitable processor mentioned above for sensor controller 125 and include one or more driving components for operating emitter array 114. Pacala also teaches, ([0077]: For instance, ranging system controller 104 can instruct emitter array 114 of light transmission module 106 to emit light).
6. Regarding Claim 4:
Pacala as modified by McMichael teaches, the processor of the charging circuit comprises a field- programmable gate array (FPGA), ([0075]: In some embodiments, light detection system 136 can include a sensor controller 125 coupled to sensor array 126 and configured to control the operation of sensor array 126. Sensor controller 125 can be any suitable component or group of components capable of selecting one or more photosensors to sense light, such as an ASIC, microcontroller, FPGA, or any other suitable processor coupled to a selecting circuit, e.g., a multiplexer. Likewise, light emission system 138 can include an emitter controller 115 coupled to emitter array 114 and configured to control the operation of sensor array 126. Emitter controller 115 can also be any suitable processor mentioned above for sensor controller 125 and include one or more driving components for operating emitter array 114).
7. Regarding Claim 5:
Pacala as modified by McMichael teaches, the lidar device comprises an application-specific integrated circuit (ASIC), and wherein the charging circuit is a component of the ASIC, ([0075]: In some embodiments, light detection system 136 can include a sensor controller 125 coupled to sensor array 126 and configured to control the operation of sensor array 126. Sensor controller 125 can be any suitable component or group of components capable of selecting one or more photosensors to sense light, such as an ASIC, microcontroller, FPGA, or any other suitable processor coupled to a selecting circuit, e.g., a multiplexer. Likewise, light emission system 138 can include an emitter controller 115 coupled to emitter array 114 and configured to control the operation of sensor array 126. Emitter controller 115 can also be any suitable processor mentioned above for sensor controller 125 and include one or more driving components for operating emitter array 114). Pacala further teaches, ([0081]: “Ranging system controller 104 can be realized in multiple ways including, e.g., by using a programmable logic device such an FPGA, as an ASIC or part of an ASIC, using a processor 130 with memory 132, and some combination of the above”. “Ranging system controller 104 can control light transmission module 106 by sending commands, or relaying commands that include, for example, controls to start and stop light emission and controls that can adjust other light-emitter parameters (e.g., pulse codes). In some embodiments, ranging system controller 104 has one or more wired interfaces or connectors for exchanging data with light sensing module 108 and with light transmission module 106”.
8. Regarding Claim 6:
Pacala as modified by McMichael teaches, the charging circuit is arranged on a mounting surface of a printed circuit board (PCB), ([0117]: The electrical connections and traces can be part of, or formed on, an interconnection structure 622, e.g., a printed circuit board (PCB), upon which capacitor bank 608 and emitter array 601 are mounted). Pacala further teaches, ([0179]: 1706 can be mounted on an interconnection structure 1708, e.g., a printed circuit board (PCB). In some embodiments, structure 1706 can be driver circuitry, such as a driver ASIC, that can operate emitter array 1702.
9. Regarding Claim 8:
Pacala as modified by McMichael teaches, the charging circuit is arranged across a plurality of printed circuit board (PCB) surfaces, ([0112]: In some embodiments, an emitter array can be operated by a driving system that includes various capacitors and control chips for operating the emitter array. FIG. 6 is a top-down, system view of an exemplary emitter driving system 600 for an emitter array 601 in a solid state electronic scanning LIDAR system). Pacala further teaches, ([0118]: In some embodiments, drivers 612 and 614 are coupled together via electrical connections 624, which can be a traces plated on interconnection structure 622. That way drivers 612 and 614 can communicate with one another to control the operation of emitter array 601). One of ordinary skill in the art at the time of filing would understand that the traces plated on interconnection structure comprise a printed circuit board. Pacala also teaches, ([0179] FIG. 17 is a cross-sectional view of the construction of an exemplary light transmission module 1700, according to some embodiments of the present disclosure. Light transmission module 1700 can include an emitter array 1702 formed on a substrate 1704. For example, in some embodiments emitter array 1702 can be a VCSEL array formed directly on a semiconductor chip. Emitter array 1702 can be mounted on a structure 1706, e.g. a ceramic plate, along with driver circuitry (not shown) as discussed herein with respect to FIGS. 6 and 7A-7B, and structure 1706 can be mounted on an interconnection structure 1708, e.g., a printed circuit board (PCB). In some embodiments, structure 1706 can be driver circuitry, such as a driver ASIC, that can operate emitter array 1702. When configured as driver circuitry, structure 1706 can be flip-chip bonded to an underside of substrate 1704. Various other electrical components (not shown) can also be mounted on interconnection structure 1708 to operate emitter array 1702. Thus, interconnection structure 1708 can be electrically coupled with substrate 1704 via any suitable method, such as wire bonds (not shown)).
10. Regarding Claim 9:
Pacala as modified by McMichael teaches, components of the charging circuit are electrically interconnected between the first PCB surface and the second PCB surface using wirebonds on the first PCB surface or the second PCB surface and vias through the PCB, ([0117]: The power source can be coupled to capacitor bank 608 via an array of electrical connections 618, where each electrical connection is a via coupled to a trace (not shown) routed to the power source). Pacala further teaches, ([0179]: “Emitter array 1702 can be mounted on a structure 1706, e.g. a ceramic plate, along with driver circuitry (not shown) as discussed herein with respect to FIGS. 6 and 7A-7B, and structure 1706 can be mounted on an interconnection structure 1708, e.g., a printed circuit board (PCB)”. “Thus, interconnection structure 1708 can be electrically coupled with substrate 1704 via any suitable method, such as wire bonds (not shown)”). Pacala as modified by McMichael does not teach, the first PCB surface is located within a recession formed within a PCB, wherein the second PCB surface is located outside of the recession formed within the PCB. However, it would have been obvious to one of ordinary skill in the art at the time of filing to try different PCB mounting techniques with various PCB shapes, MPEP 2144.04 IV. B. Changes in shape. It has been held that a change in shape is obvious, absent persuasive evidence that a particular configuration is significant. One of ordinary skill in the art at the time of filing would have been motivated to modify the shape of the PCB disclosed by Pacala to include a recession suitable for mounting a second PCB since, ([Connector tips: [P. 3]: “Mezzanine boards can also serve as a bridge between the nanometer scale technology used on semiconductors and the 1- x 1-mm scale interconnects used for FPGA to PCB connections and the more robust PCB and connector technology used on plug-in cards or motherboards used in larger systems”). In addition, ([Connector tips: [P. 3]: Mezzanines can enable developers to bring up and debug the system with existing semiconductors, then quickly drop in the latest and greatest when it becomes available, mitigating risk, improving time-to-market, and creating a much smoother transition between systems shipping today and upgrades for tomorrow). The immediate specification discloses no criticality relating to the shape of or recession in the PCB.
11. Regarding Claim 10:
Pacala as modified by McMichael teaches, the charging circuit is arranged across a first PCB surface and a second PCB surface, wherein the first PCB surface is located on a first PCB, wherein the second PCB surface is located on a second PCB, and wherein the first PCB is arranged relative to the second PCB such that: (i) the first PCB surface is approximately parallel with the second PCB surface and (ii) the first PCB surface is stacked vertically above the second PCB surface, ([0179] FIG. 17 is a cross-sectional view of the construction of an exemplary light transmission module 1700, according to some embodiments of the present disclosure. Light transmission module 1700 can include an emitter array 1702 formed on a substrate 1704. For example, in some embodiments emitter array 1702 can be a VCSEL array formed directly on a semiconductor chip. Emitter array 1702 can be mounted on a structure 1706, e.g. a ceramic plate, along with driver circuitry (not shown) as discussed herein with respect to FIGS. 6 and 7A-7B, and structure 1706 can be mounted on an interconnection structure 1708, e.g., a printed circuit board (PCB). In some embodiments, structure 1706 can be driver circuitry, such as a driver ASIC, that can operate emitter array 1702. When configured as driver circuitry, structure 1706 can be flip-chip bonded to an underside of substrate 1704. Various other electrical components (not shown) can also be mounted on interconnection structure 1708 to operate emitter array 1702. Thus, interconnection structure 1708 can be electrically coupled with substrate 1704 via any suitable method, such as wire bonds (not shown)). Fig. 17 shows the 2 PCBs stacked vertically on top of each other, with the first PCB surface is approximately parallel with the second PCB surface.
12. Regarding Claim 11:
Pacala as modified by McMichael teaches, the first PCB is flip-chip bonded to the second PCB, wherein the flip-chip bond comprises soldered connections (i) between a first side of a surface- mount technology (SMT) component and the first PCB surface and (ii) between a second side of the SMT component and the second PCB surface, and wherein components of the charging circuit are electrically interconnected between the first PCB surface and the second PCB surface through the soldered connections, ([0112]: In some embodiments, an emitter array can be operated by a driving system that includes various capacitors and control chips for operating the emitter array. FIG. 6 is a top-down, system view of an exemplary emitter driving system 600 for an emitter array 601 in a solid state electronic scanning LIDAR system). Pacala further teaches, ([0118]: In some embodiments, drivers 612 and 614 are coupled together via electrical connections 624, which can be a traces plated on interconnection structure 622. That way drivers 612 and 614 can communicate with one another to control the operation of emitter array 601). One of ordinary skill in the art at the time of filing would understand that the traces plated on interconnection structure comprise a printed circuit board. Pacala also teaches, ([0179] FIG. 17 is a cross-sectional view of the construction of an exemplary light transmission module 1700, according to some embodiments of the present disclosure. Light transmission module 1700 can include an emitter array 1702 formed on a substrate 1704. For example, in some embodiments emitter array 1702 can be a VCSEL array formed directly on a semiconductor chip. Emitter array 1702 can be mounted on a structure 1706, e.g. a ceramic plate, along with driver circuitry (not shown) as discussed herein with respect to FIGS. 6 and 7A-7B, and structure 1706 can be mounted on an interconnection structure 1708, e.g., a printed circuit board (PCB). In some embodiments, structure 1706 can be driver circuitry, such as a driver ASIC, that can operate emitter array 1702. When configured as driver circuitry, structure 1706 can be flip-chip bonded to an underside of substrate 1704. Various other electrical components (not shown) can also be mounted on interconnection structure 1708 to operate emitter array 1702. Thus, interconnection structure 1708 can be electrically coupled with substrate 1704 via any suitable method, such as wire bonds (not shown)).
13. Regarding Claim 12:
Pacala as modified by McMichael teaches, the second PCB surface has a greater surface area than the first PCB surface, wherein the second PCB surface comprises metallic contacts, and wherein components of the charging circuit are electrically interconnected between the first PCB surface and the second PCB surface through wirebond connections between (i) the first PCB surface or components of the charging circuit located on the first PCB surface and (ii) the metallic contacts, ([0117] In order to generate light, current is driven through emitters 602 in emitter array 601. Thus, emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601. Each bank 604a-f can include a respective contact array). Pacala further teaches, ([0179]: “Emitter array 1702 can be mounted on a structure 1706, e.g. a ceramic plate, along with driver circuitry (not shown) as discussed herein with respect to FIGS. 6 and 7A-7B, and structure 1706 can be mounted on an interconnection structure 1708, e.g., a printed circuit board (PCB)”. “Thus, interconnection structure 1708 can be electrically coupled with substrate 1704 via any suitable method, such as wire bonds (not shown)”).
Fig. 17 shows PCB 1704 is smaller than PCB 1708.
14. Regarding Claim 13:
Pacala as modified by McMichael teaches, the plurality of light emitters comprises a group of light emitters, wherein the plurality of energy storage devices comprises a group of energy storage devices, and wherein selectively charging the first set of energy storage devices and refraining from charging each energy storage device in the plurality of energy storage devices that is not in the first set of energy storage devices comprises: supplying, when the indication of the first set of light emitters to be fired during the firing cycle includes at least one light emitter in the group of four light emitters, a sufficient voltage to charge each of the energy storage devices in the group of four energy storage devices at respective nodes within the charging circuit that are associated with each of the energy storage devices in the group of energy storage devices; and deactivating, if one or more light emitters in the group of light emitters are not included in the indication of the first set of light emitters to be fired during the firing cycle, the one or more respective nodes associated with the one or more light emitters in the group of light emitters that are not included in the indication of the first set of light emitters to be fired during the firing cycle, wherein the deactivation of each respective node is performed by a respective switching component of the charging circuit, ([0011]: emitter array firing circuitry coupled to the array of light emitters and configured to activate only a subset of light emitters at a time). Pacala further teaches, ([0117]: In order to generate light, current is driven through emitters 602 in emitter array 601. Thus, emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601. Each bank 604a-f can include a respective contact array or via array 610a-f for coupling with capacitor bank 608). Pacala also teaches, ([0122]: Additionally, separating the emitter array into multiple banks with separate drive circuitry allows for each channel in the system to operate at substantially lower current). Pacala continues to teach, ([0123]: Each driver 704 corresponds to one emitter bank and the set of drivers 704 can operate in conjunction with multiplexer 706 to activate individual banks within the emitter array in any order). Pacala goes on to teach, ([0136] Sensor array 856 can include an array of photosensors 858 arranged in the same m×n configuration as each emitter array 852a, 852b and can be configured to capture light emitted from emitter arrays 852a, 852b. Specifically, each photosensor can have a one-to-one correspondence with a respective emitter in each emitter array 852a, 852b. For instance, photosensor 860 can be associated with, and aligned to have the same field of view as, emitter 862 in emitter array 852a and emitter 864 in emitter array 852b. Thus, when emitters 862 and 864 are fired to emit light to illuminate the same location (e.g., discrete spot) in the field, photosensor 860 will capture the emitted light from each of emitters 862 and 864 after the light has been reflected off of objects in the field. This concept can be appreciated with reference to FIG. 8E as well as the zoomed-in perspective 851 of photosensor 860 shown in FIG. 8D). Pacala as modified by McMichael does not teach, the plurality of light emitters comprises a group of four light emitters, wherein the plurality of energy storage devices comprises a group of four energy storage devices. However, it would have been obvious for one of ordinary skill in the art at the time of filing to include a group of 4 emitters because it has been held that, in the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. See MPEP 2144.05 I, Obviousness of Similar and Overlapping Ranges. One of ordinary skill in the art at the time of filing would have been motivated to include subsets of laser diode and sensor arrays which avoid crosstalk between points within each point cloud. A group of 4 for each subset would allow one diode to be active per subset while allowing at least 1 inactive diode between active diodes in the complete array, providing spatial separation between active diodes, reducing crosstalk within a complete acquisition. Thus, producing the highest acquisition speeds, while still mitigating potential cross talk. The immediate specification discloses no criticality regarding the use of 4 diodes in each subset.
15. Regarding Claim 14:
Pacala does not teach, selectively charging the first set of energy storage devices and refraining from charging each energy storage device in the plurality of energy storage devices that is not in the first set of energy storage devices comprises: supplying a sufficient voltage to charge each of the energy storage devices in the first set of energy storage devices at respective nodes within the charging circuit that are associated with each of the energy storage devices, wherein supplying the sufficient voltage to the respective nodes comprises connecting each of the respective nodes to a respective voltage supply using a respective switching component of the charging circuit; and refraining from supplying the sufficient voltage to charge each of the energy storage devices that is not in the first set of energy storage devices at respective nodes within the charging circuit that are associated with each of the energy storage devices, wherein refraining from supplying the sufficient voltage to the respective nodes comprises disconnecting each of the respective nodes from a respective voltage supply using a respective switching component of the charging circuit. However, McMichael further teaches, ([0122] In the described embodiment, each channel is assigned to one or the other of two charging banks. Charging of the capacitors associated with all of the emitters of a single charging bank is performed concurrently. Charging is performed in repeated cycles of first charging the capacitors associated with emitters of the first charging bank and subsequently charging the capacitors associated with emitters of the second charging bank. While a bank is being charged, the channels of the other bank are used for distance measurements).
(See Claim 1).
16. Regarding Claim 18:
Pacala does not teach, the pulser circuit comprises one or more gallium nitride field-effect transistors (GaNFETs), and wherein the plurality of light emitters comprises one or more laser diodes. However, McMichael further teaches, ([0040] Each laser emitter may be associated with a pair of capacitors that are used to generate two energy pulses for a corresponding individual laser burst. The capacitors of each pair are charged in common by a regular boost circuit, and discharged separately into the corresponding laser emitter using a pair of FETs (field-effect transistors). In certain embodiments, these FETs may comprise enhancement-mode GaN (gallium nitride) FETs, also referred to as eGaN FETs). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala with McMichael since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala with McMichael since, GaNFETs offer significant advantages over silicon MOSFETs, including much faster switching speeds, higher efficiency, smaller size, and better thermal performance.
17. Regarding Claims 19 & 20:
Pacala teaches, a light detection and ranging (lidar) device comprising: a controller;
a plurality of light emitters, ([Abstract]: Embodiments describe a solid state electronic scanning LIDAR system). Pacala further teaches, ([0072]: Tx module 106 can further include an optional processor 118 and memory 120, although in some embodiments these computing resources can be incorporated into ranging system controller 104). Pacala also teaches, ([0072]: Light transmission module 106 includes an emitter array 114, which can be a one-dimensional or two-dimensional array of emitters). Pacala teaches, a charging circuit comprising a plurality of energy storage devices; and a pulser circuit, ([0117]: In order to generate light, current is driven through emitters 602 in emitter array 601. Thus, emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601. Each bank 604a-f can include a respective contact array or via array 610a-f for coupling with capacitor bank 608). Pacala further teaches, ([0122]: Additionally, separating the emitter array into multiple banks with separate drive circuitry allows for each channel in the system to operate at substantially lower current).
Pacala also teaches, ([0123]: Each driver 704 corresponds to one emitter bank and the set of drivers 704 can operate in conjunction with multiplexer 706 to activate individual banks within the emitter array in any order). Pacala teaches, each energy storage device of the first set of energy storage devices is associated with a light emitter in the first set of light emitters, ([0117]: In order to generate light, current is driven through emitters 602 in emitter array 601. Thus, emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601). Pacala teaches, the pulser circuit is configured to discharge energy stored within each of the energy storage devices in the first set of energy storage devices through the associated light emitter in the first set of light emitters in order to cause the first set of light emitters to emit light signals during the firing cycle, ([0117] Emitter banks 604a-f can be coupled to a capacitor bank 608 that includes a plurality of capacitors configured to discharge current through emitter array 601. Each bank 604a-f can include a respective contact array or via array 610a-f for coupling with capacitor bank 608. Contact arrays 610a-f can be part of the semiconductor dies upon which respective emitter banks 604a-f are constructed. In some embodiments, contact arrays 610a-f are positioned between capacitor bank 608 and light emitters 602 within their respective emitter banks 604a-f. Before activation of one or more emitters in emitter array 601, one or more capacitors in capacitor bank 608 can be charged so that during activation of the one or more emitters in emitter array 601, the one or more charged capacitors can be discharged to drive current through the one or more emitters to emit narrowband light). Pacala teaches, the charging circuit is configured to receive an indication of a first set of light emitters to be fired during a firing cycle, ([0072]: Tx module 106 can further include an optional processor 118 and memory 120, although in some embodiments these computing resources can be incorporated into ranging system controller 104. In some embodiments, a pulse coding technique can be used, e.g., Barker codes and the like. In such cases, memory 120 can store pulse-codes that indicate when light should be transmitted. In some embodiments, the pulse-codes are stored as a sequence of integers stored in memory). Pacala does not teach, the first set of light emitters is a subset of the plurality of light emitters such that the plurality of light emitters includes one or more light emitters that are not in the first set of light emitters, wherein the charging circuit is configured to selectively charge, during a charging cycle, a first set of energy storage devices, wherein the first set of energy storage devices is a subset of the plurality of energy storage devices such that the plurality of energy storage devices includes one or more energy storage devices that are not in the first set of energy storage devices, wherein the charging circuit is configured to refrain from charging, during the charging cycle, each energy storage device in the plurality of energy storage devices that is not in the first set of energy storage devices. However, McMichael teaches a LiDAR system, ([0041] The channels are divided into multiple charging banks. In described embodiments, the channels are divided into two charging banks. The capacitors corresponding to the laser emitters of one charging bank are charged while the laser emitters of the other charging bank are being fired. This allows a first bank of the channels to be used at a high rate, while allowing for the much lower rate at which the capacitors of each channel can be charged). McMichael further teaches, ([0122] In the described embodiment, each channel is assigned to one or the other of two charging banks. Charging of the capacitors associated with all of the emitters of a single charging bank is performed concurrently. Charging is performed in repeated cycles of first charging the capacitors associated with emitters of the first charging bank and subsequently charging the capacitors associated with emitters of the second charging bank. While a bank is being charged, the channels of the other bank are used for distance measurements). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala with McMichael since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala with McMichael since, (Pacala: [0122]: Additionally, separating the emitter array into multiple banks with separate drive circuitry allows for each channel in the system to operate at substantially lower current). Charging fewer channels at a time this would reduce the current requirement for the entire system.
18. Regarding Claim 20:
Pacala further teaches, a plurality of light detectors configured to detect reflections of the light signals emitted by the first set of light emitters during the firing cycle, ([0011] In some embodiments, a solid state optical system includes a light transmission module including a transmitter layer having an array of individual light emitters, a light sensing module including a sensor layer that has an array of photosensors, emitter array firing circuitry coupled to the array of light emitters and configured to activate only a subset of light emitters at a time, and sensor array readout circuitry coupled to the array of photosensors and configured to synchronize the readout of individual photosensors within the array concurrently with the firing of corresponding light emitters so that each light emitter in the array of individual light emitters can be activated and each photosensor in the array of photosensors can be readout through one emission cycle. Each light emitter in the array of light emitters can be paired with a corresponding photosensor in the light sensing module).
19. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al (US 20190011567 A1), hereinafter Pacala, in view of McMichael et al (WO 2018125823 A1), hereinafter McMichael, further in view of Letor et al (EP 3855585 A1), hereinafter Letor.
20. Regarding Claim 2:
Pacala as modified by McMichael does not teach, the indication of the first set of light emitters to be fired during the first firing cycle is received from the controller of the lidar device at a serial peripheral interface (SPI) of the charging circuit. However, Letor teaches a LiDAR system, ([0014]: For example, the pulse generator circuit may be used in a laser system, such as a LiDAR system). Letor further teaches, ([0014]: As mentioned before, various embodiments of the present disclosure relate to a pulse generator circuit configured to apply a current pulse to a load. For example, the pulse generator circuit may be used in a laser system, such as a LiDAR system). Letor also teaches, ([0088]: As described in the foregoing, the pulse generator circuit 20a and optionally the load 30/laser diodes D may be integrated in an integrated circuit). Letor continues to teach, ([0090]: Moreover, Figure 13 highlights that such an integrated circuit may comprise a communication interface 216, such as an Inter-Integrated Circuit (I.sup.2C) or Serial Peripheral Interface (SPI), connected to one or more pads/pins 214 of the integrated circuit. For example, the control circuit 208a may be configured to use this communication interface 216 in order to receive control commands CTRL and/or send diagnostic data DIAG. For example, the control commands CTRL may include instruction indicating whether a current pulse should be applied to the diode D). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala in view of McMichael with Letor since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala in view of McMichael with Letor, since SPIs offer fast, full-duplex, simple, and flexible communication, ideal for high-speed tasks, such as dynamically controlling the emitters to be fired in a LiDAR system.
21. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al (US 20190011567 A1), hereinafter Pacala, in view of McMichael et al (WO 2018125823 A1), hereinafter McMichael, further in view of Goldin et al (US 11064604 B1), hereinafter Goldin.
22. Regarding Claim 7:
Pacala as modified by McMichael does not teach, the PCB has a three-dimensional structure, and wherein the three-dimensional structure comprises a bend in the PCB along an axis that is perpendicular to the mounting surface of the PCB. However, Goldin teaches, ([Col. 6, Lines 59-63]: The flexible PCB 1900 may be configured to bend along a bend line 105 located at or near a center line of the flexible PCB 1900. One or more elongated cut-outs may be disposed parallel to the bend line 105 (e.g., cut-out 110) and/or perpendicular to the bend line 105 (e.g., cut-out 1920). Such cut-outs may provide additional flexibility to the flexible PCB 1900 to allow for easier formation of a 180-degree bend such as by folding the right half of the flexible PCB 1900 over the left half of the flexible PCB 1900). Goldin further teaches a LiDAR system, ([Col. 13, Lines 59-65]: methods described herein may apply to any electronic device disposed within a housing for which maximizing usable interior space within a housing by folding a flexible PCBA within the available interior space is desired. Examples of such electronic devices may include underwater cameras, sonar devices, radar devices, lidar devices). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala in view of McMichael with Goldin since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala in view of McMichael with Goldin, since using flexible PCBs can result in (Goldin: [Col. 13, Lines 61-63]: maximizing usable interior space within a housing by folding a flexible PCBA within the available interior space).
23. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al (US 20190011567 A1), hereinafter Pacala, in view of McMichael et al (WO 2018125823 A1), hereinafter McMichael, further in view of Siessegger et al (US 20240201341 A1), hereinafter Siessegger.
24. Regarding Claim 15:
Pacala as modified by McMichael does not teach, the charging circuit comprises an array of high-side switches, and wherein each of the respective switching components is a component of the array of high-side switches. However, Siessegger teaches a LiDAR system, ([0368]: In the configuration in FIG. 10A, the laser diode drive circuit 1000a may include high-side drivers 1002a Dr1-Dr3 to drive respective field-effect transistors (FETs) 1004a T1-T3 (as exemplary switches to control the discharge of the capacitors C1- C3). Fig. 10A shows a high-side switch for each driver in the array. It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala in view of McMichael with Siessegger since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala in view of McMichael with Siessegger, since high-side switches provide improved fault protection, a stable ground reference for sensitive circuits, better load monitoring (current/voltage feedback), handling inrush currents, and compatibility with automotive chassis grounds.
25. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al (US 20190011567 A1), hereinafter Pacala, in view of McMichael et al (WO 2018125823 A1), hereinafter McMichael, further in view of Siessegger et al (US 20240201341 A1), hereinafter Siessegger, further in view of Letor et al (EP 3855585 A1), hereinafter Letor.
26. Regarding Claim 16:
Pacala as modified by McMichael does not teach, the array of high-side switches is a component of a serial-controlled solenoid driver. However, Siessegger teaches, the array of high-side switches, (see Claim 15). Pacala as modified by McMichael in view of Siessegger, does not teach, the array of high-side switches is a component of a serial-controlled solenoid driver. However, Letor teaches a LiDAR system, (see Claim 2), ([0014]: As mentioned before, various embodiments of the present disclosure relate to a pulse generator circuit configured to apply a current pulse to a load. For example, the pulse generator circuit may be used in a laser system, such as a LiDAR system). Letor further teaches, ([0088]: As described in the foregoing, the pulse generator circuit 20a and optionally the load 30/laser diodes D may be integrated in an integrated circuit). Letor also teaches, ([0090]: Moreover, Figure 13 highlights that such an integrated circuit may comprise a communication interface 216, such as an Inter-Integrated Circuit (I.sup.2C) or Serial Peripheral Interface (SPI), connected to one or more pads/pins 214 of the integrated circuit. For example, the control circuit 208a may be configured to use this communication interface 216 in order to receive control commands CTRL and/or send diagnostic data DIAG. For example, the control commands CTRL may include instruction indicating whether a current pulse should be applied to the diode D).
One of ordinary skill in the art at the time of filing would understand that an IC with SPI can function as a serial controlled solenoid driver, (STMicroelectronics, [P. 1]: The DMOS outpts L9822N has a very low power consumption. Data is transmitted serially to the device using the Serial Peripheral Interface (SPI) protocol). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala in view of McMichael, further in view of Siessegger with Letor since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala in view of McMichael, further in view of Siessegger with Letor, since using an SPI solenoid driver offers high speed and flexible control for multiple channels with precise current/voltage regulation.
27. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al (US 20190011567 A1), hereinafter Pacala, in view of McMichael et al (WO 2018125823 A1), hereinafter McMichael, further in view of Hurwitz et al (EP 3859393 A1), hereinafter Hurwitz.
28. Regarding Claim 17:
Pacala as modified by McMichael does not teach, at least one of the plurality of energy storage devices of the lidar device comprises a capacitor fabricated from silicon. However, Hurwitz teaches a LiDAR system, ([0004]: The present disclosure relates to a light source system suitable for use in a time of flight camera). Hurwitz further teaches, ([0005]: The present disclosure also includes a light source, such as a laser, and a driver arranged to supply a drive current to the light source to turn the light source on to emit light. The driver includes a capacitor to store energy and then discharge to generate the drive current. Hurwitz also teaches, ([0134]: The capacitors 132 and 142 described above may either be integrated with the semiconductor die 120, or they may be a lateral silicon design). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pacala in view of McMichael, with Hurwitz since it is the same field of endeavor and results would have been predictable. One of ordinary skill in the art at the time of filing would have been motivated to modify Pacala in view of McMichael, with Hurwitz, since silicon capacitors offer superior high-frequency performance, exceptional stability across wide temperature ranges, low DC bias effects, high reliability, and significant miniaturization.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
US 10983197 B1: Discloses a LiDAR system comprising an array of emitters activated to emit multi-pulse sequences.
US 9368936 B1: Discloses a laser diode firing circuit for LiDAR. The firing circuit includes a capacitor to charge and a transistor to control current.
US 20200205250 A1: Discloses control systems and methods for controlling pulsed laser diodes with capacitor and switch arrays.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES W NAPIER whose telephone number is (571)272-7451. The examiner can normally be reached Monday - Friday 7:30 am - 4:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert Hodge can be reached at (571) 272-2097. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/J.W.N./Examiner, Art Unit 3645
/ROBERT W HODGE/Supervisory Patent Examiner, Art Unit 3645