DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 20, 2026 has been entered.
Response to Amendment
This Office Action has been issued in response to Applicant’s Communication of amended application S/N 18/070,141 filed on January 20, 2026. Claims 1 to 14 are currently pending with the application. Claims 6 to 11 are withdrawn from further consideration.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1 to 5, 12, 13, and 14 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claims 1, 12, 13, and 14 recite determining allocation indexes and determining a coordinator node.
The limitation of determining allocation indexes, which specifically recites “determining, when handing an allocation request of a target transaction, transaction allocation indexes respectively corresponding to the at least two node devices, each transaction allocation index corresponding to one of the node devices used for indicating a matching degree of allocation of a new transaction to the node device”, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind, but for the recitation of generic computer components. That is, other than reciting “by a processor”, nothing in the claim element precludes the steps from practically being performed in a human mind. For example, but for the “by a processor” language, “determining”, in the context of this claim encompasses the user mentally, with the aid of pen and paper, identifying an index or value of nodes that indicates a degree of matching of allocation of a transaction to a node.
Continuing with the analysis, the limitation of determining a coordinator node, which specifically recites “determining a coordinator node device of the target transaction in the at least two node devices based on the transaction allocation indexes respectively corresponding to the at least two node devices”, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind, but for the recitation of generic computer components. That is, other than reciting “by a processor”, nothing in the claim element precludes the steps from practically being performed in a human mind. For example, but for the “by a processor” language, “determining”, in the context of this claim encompasses the user mentally and with the aid of pen and paper, identifying a coordinator node of the transaction based on the previously identified index. If a claim limitation, under its broadest reasonable interpretation, covers mental processes but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claims recite an abstract idea.
This judicial exception is not integrated into a practical application. In particular, the claims recite the additional elements – “coordinating, by the coordinator node device, the target transaction”, “transmitting a processing instruction of the target transaction to at least one data node device in the at least two node devices, wherein the at least one data node device is different than the coordinator node device and is configured to participate in processing the target transaction”, “causing the at least one data node device to execute the processing instruction of the target transaction”, a transaction allocation device, a distributed database system comprising at least two node devices sharing a same storage system, a processor, and a memory. The limitations “coordinating, by the coordinator node device, the target transaction” and “causing the at least one data node device to execute the processing instruction of the target transaction” are recited at a high-level of generality, with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, and is equivalent to merely saying “applying it”, therefore, does not integrate the judicial exception into a practical application.
The limitation “transmitting a processing instruction of the target transaction to at least one data node device in the at least two node devices, wherein the at least one data node device is different than the coordinator node device and is configured to participate in processing the target transaction” amounts to data-transmitting steps and which is considered to be insignificant extra-solution activity (See MPEP 2106.05(g)). The transaction allocation device, distributed database system comprising at least two node devices sharing a same storage system, processor, and memory in these steps are recited at a high-level of generality (i.e., as a generic processor performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea, and are not patent eligible.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. The insignificant extra-solution activity identified above, which include the data transmitting steps, is recognized by the courts as well-understood, routine, and conventional activity when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity (See MPEP 2106.05(d)(II)(i) Receiving or transmitting data over a network, e.g., using the Internet to gather data, buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network)). The claims are not patent eligible.
Claim 2 is dependent on claim 1 and includes all the limitations of claim 1. Therefore, claim 2 recites the same abstract idea of claim 1. The claim recites the additional limitations of “determining a transaction allocation mode, the transaction allocation mode comprising one of allocation based on transaction busyness, allocation based on device busyness, and allocation based on hybrid busyness; and determining the transaction allocation indexes respectively corresponding to the at least two node devices according to a determination manner indicated by the transaction allocation mode”, which can be performed in the human mind with the aid of pen and paper, and therefore, is further elaborating on the abstract idea. The claim does not amount to significantly more.
Claim 3 is dependent on claim 2 and includes all the limitations of claim 1. Therefore, claim 3 recites the same abstract idea of claim 1. The claim recites the additional limitations of “wherein the transaction allocation mode comprises the allocation based on hybrid busyness, and the determining the transaction allocation indexes respectively corresponding to the at least two node devices according to a determination manner indicated by the transaction allocation mode comprises: determining a transaction allocation index corresponding to a first node device based on a transaction processing quantity of the first node device, a device resource utilization rate of the first node device, a transaction processing quantity weight, a device resource utilization rate weight, and a weight adjustment parameter, wherein the first node device is any node device in the at least two node devices”, which can be performed in the human mind with the aid of pen and paper, and therefore, is further elaborating on the abstract idea. The claim does not amount to significantly more.
Claim 4 is dependent on claim 1 and includes all the limitations of claim 1. Therefore, claim 4 recites the same abstract idea of claim 1. The claim recites the additional limitation of “transmitting device ID information of the coordinator node device to a terminal initiating the allocation request, the terminal is configured to transmit transaction information of the target transaction to the coordinator node device according to the device ID information of the coordinator node device, and coordinating, by the coordinator node device, the target transaction based on the transaction information”, where the transmitting limitations amount to data-gathering steps and which is considered to be insignificant extra-solution activity, (See MPEP 2106.05(g)), and where the coordinating limitation is recited at a high-level of generality, with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, and is equivalent to merely saying “applying it”, which does not amount to significantly more than the abstract idea. The insignificant extra-solution activity, which includes the data-gathering steps, is recognized by the courts as well-understood, routine, and conventional activities when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity (See MPEP 2106.05(d)(II)(i) Receiving or transmitting data over a network, e.g., using the Internet to gather data, buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network)). Therefore, does not amount to significantly more than the abstract idea.
Claim 5 is dependent on claim 1 and includes all the limitations of claim 1. Therefore, claim 5 recites the same abstract idea of claim 1. The claim recites the additional limitations of “the distributed database system supports a key-value data storage format and a segment-page data storage format”, which is tying the abstract idea to a field of use by further specifying the target data, and which is simply an attempt to limit the application of the abstract idea to a particular technological environment; merely indicating a field of use or technological environment in which to apply the judicial exception does not meaningfully limit the claim (See MPEP 2106.05(h)).
Additionally, the claims do not include a requirement of anything other than conventional, generic computer technology for executing the abstract idea, and therefore, do not amount to significantly more than the abstract idea.
Claims 1 to 5, 12, 13, and 14 are therefore not drawn to eligible subject matter as they are directed to an abstract idea without significantly more.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4, 12, 13, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over MATSUBARA et al. (U.S. Publication No. 2018/0260463) hereinafter Matsubara, and further in view of Rao et al. (U.S. Publication No. 2021/0117425) hereinafter Rao.
As to claim 1:
Matsubara discloses:
A transaction processing method, applied to a transaction allocation device, the transaction allocation device residing in a distributed database system, the distributed database system further comprising at least two node devices sharing a same storage system [Paragraph 0018 teaches task processing nodes 200 execute tasks using data 221 stored in the distributed database], the method comprising:
determining, when handling an allocation request of a target transaction, transaction allocation indexes respectively corresponding to the at least two node devices, each transaction allocation index corresponding to one of the node devices used for indicating a matching degree of allocation of a new transaction to the node device [Paragraph 0020 teaches upon receipt of an execution request of a task, performing a data inquiry to each task processing node 200, to determine presence of data to be used in the task, and based on the responses to the data inquiry, determine a task processing node where to assign the task, in other words, the responses from the node devices represent the matching degree of allocation of the transaction to the node device; Paragraph 0027 teaches receiving execution request of a task, and identifying the task processing nodes 200 to be performed the data inquiry before performing the data inquiry, and performing the data inquiry to the identified task processing nodes]; and
determining a node device of the target transaction in the at least two node devices based on the transaction allocation indexes respectively corresponding to the at least two node devices [Paragraph 0020 teaches based on the received responses from each of the task processing nodes, determining a task processing node to assign the task for processing; Paragraph 0028 teaches selecting a task processing node where to assign the task based on the results of the data inquiry and assigns the task to the selected task processing node; Paragraph 0057 teaches target task processing node processes the task, and transmits information for the response, therefore, coordinating the target transaction; Paragraph 0078 teaches assigning tasks to the at least one of the task processing nodes so that the tasks to be executed are balanced among the task processing nodes, in other words, organizing one or more data nodes to jointly process the target transaction; Paragraph 0082 teaches assigning the task to a plurality of task processing nodes, by assigning a task for performing different processing to the each of the plurality of task processing nodes, therefore, assigning tasks of the transaction to one or more data nodes devices to process the transaction].
Matsubara does not appear to expressly disclose determining a coordinator node; and coordinating, by the coordinator node device, the target transaction, comprising: transmitting a processing instruction of the target transaction to at least one data node device in the at least two node devices, wherein the at least one data node device is different than the coordinator node device and is configured to participate in processing the target transaction; and causing the at least one data node device to execute the processing instruction of the target transaction.
Rao discloses:
determining a coordinator node [Paragraph 0624 teaches identifying a query coordinator 3304 that can process the query; Paragraph 0625 teaches determining a query coordinator to execute the tasks, where different query coordinators can be identified for different operations]; and
coordinating, by the coordinator node device, the target transaction, comprising: transmitting a processing instruction of the target transaction to at least one data node device in the at least two node devices, wherein the at least one data node device is different than the coordinator node device and is configured to participate in processing the target transaction [Paragraph 0625 teaches query coordinator(s) 3304 can coordinate the various tasks to execute queries assigned to them, where the query coordinator determines what tasks are to be handled by the worker nodes 3306, spawn the worker nodes 3306 for the different tasks, instruct different worker nodes 3306 to perform the different tasks and where to route the results of each task, monitor the worker nodes 3306 during the query, control the flow of data between the worker nodes, etc., where the coordinator and the worker nodes are different]; and
causing the at least one data node device to execute the processing instruction of the target transaction [Paragraph 0625 teaches query coordinator(s) 3304 can coordinate the various tasks to execute queries assigned to them, where the query coordinator instructs different worker nodes 3306 to perform the different tasks, therefore, causing the nodes to execute the transaction; Paragraph 0626 teaches worker nodes 3306 can perform the various tasks assigned to them by a query coordinator 3304].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Matsubara, by determining a coordinator node; and coordinating, by the coordinator node device, the target transaction, comprising: transmitting a processing instruction of the target transaction to at least one data node device in the at least two node devices, wherein the at least one data node device is different than the coordinator node device and is configured to participate in processing the target transaction; and causing the at least one data node device to execute the processing instruction of the target transaction, as taught by Rao [Paragraph 0624-0626], because both applications are directed to management of distributed environments; by selecting a coordinator node, processing demands on the search head is reduced, while enabling isolation between different query processing (See Rao Paras [0624], [0625]).
Same rationale applies to claims 12, 13, and 14 since they recite similar limitations, and are therefore similarly rejected.
As to claim 2:
Matsubara discloses:
determining a transaction allocation mode, the transaction allocation mode comprising one of allocation based on transaction busyness, allocation based on device busyness, and allocation based on hybrid busyness [Paragraph 0075 teaches in case where a plurality of processing nodes is identified, the selection of the task processing nodes can be performed based on CPU usage, or amount of processing load; Paragraph 0079 teaches selecting task processing node based on a selection rule]; and
determining the transaction allocation indexes respectively corresponding to the at least two node devices according to a determination manner indicated by the transaction allocation mode [Paragraph 0075 teaches the selection of the task processing nodes can be performed based on CPU usage, or amount of processing load; Paragraph 0076 teaches selecting a task processing node having a low CPU usage; Paragraph 0049 teaches the load 303 stores the value of the memory usage, the number of tasks being executed by the task processing node, etc.].
As to claim 4:
Matsubara discloses:
transmitting device ID information of the coordinator node device to a terminal initiating the allocation request [Paragraph 0077 teaches transmitting information including the identification information on the task processing nodes holding the target data; Paragraph 0083 teaches transmitting task transfer information including identification information of the task processing nodes], the terminal is configured to transmit transaction information of the target transaction to the coordinator node device according to the device ID information of the coordinator node device (Examiner respectfully notes that the terminal is outside of the scope of the claims), and
coordinating, by the coordinator node device, the target transaction based on the transaction information [Paragraph 0057 teaches target task processing node processes the task, and transmits information for the response, therefore, coordinating the target transaction].
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over MATSUBARA et al. (U.S. Publication No. 2018/0260463) hereinafter Matsubara as applied to claim 1 above, in view of Rao et al. (U.S. Publication No. 2021/0117425) hereinafter Rao, and further in view of Gordon (U.S. Publication No. 2017/0289298).
As to claim 3:
Matsubara discloses all the limitations as set forth in the rejections of claim 1 above, but does not appear to expressly disclose the transaction allocation mode comprises the allocation based on hybrid busyness, and the determining the transaction allocation indexes respectively corresponding to the at least two node devices according to a determination manner indicated by the transaction allocation mode comprises: determining a transaction allocation index corresponding to a first node device based on a transaction processing quantity of the first node device, a device resource utilization rate of the first node device, a transaction processing quantity weight, a device resource utilization rate weight, and a weight adjustment parameter, wherein the first node device is any node device in the at least two node devices.
Gordon discloses:
the transaction allocation mode comprises the allocation based on hybrid busyness,
and the determining the transaction allocation indexes respectively corresponding to the at least two node devices according to a determination manner indicated by the transaction allocation mode comprises: determining a transaction allocation index corresponding to a first node device based on a transaction processing quantity of the first node device, a device resource utilization rate of the first node device, a transaction processing quantity weight, a device resource utilization rate weight, and a weight adjustment parameter, wherein the first node device is any node device in the at least two node devices [Paragraph 0009 teaches calculating grades for at least one of the assignments in respect of at least one of the interconnected computer nodes, such that each grade being indicative of a suitability of a respective computer node of the interconnected computer nodes to execute a respective assignment; Paragraph 0193 teaches the data of various parameters relating to dynamic behavior and the environment can include various parameters data indicative of the current state of one or more nodes and resources, and can include data of presence and loads and availability and faults and capabilities and response times and connectivity and costs, e.g., costs of network links, different types of data storage resources, statistical data, etc.; Paragraphs 0194-0244 teach parameter data can include hardware resources, including storage-related resources like response time, average latency, random seek time, data transfer rate, performance parameters of each CPU and core, computer node parameters like recent and current node load statistics, existing allocations and reservations, current amount of memory, recent and current latency statistics].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Matsubara, by determining a transaction allocation index corresponding to a first node device based on a transaction processing quantity of the first node device, a device resource utilization rate of the first node device, a transaction processing quantity weight, a device resource utilization rate weight, and a weight adjustment parameter, wherein the first node device is any node device in the at least two node devices, as taught by Gordon [Paragraphs 0009, 0193-0244], because both applications are directed to transaction routing to computing nodes; including additional parameters in the calculation of the degree or grade enables the identification of the most suitable computer node to select for execution of transactions, improving thereby efficiency of processing (See Gordon Para [0299]).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over MATSUBARA et al. (U.S. Publication No. 2018/0260463) hereinafter Matsubara as applied to claim 1 above, in view of Rao et al. (U.S. Publication No. 2021/0117425) hereinafter Rao, and further in view of Gupta et al. (U.S. Patent No. 10,872,073) hereinafter Gupta.
As to claim 5:
Matsubara discloses:
the distributed database system supports a key-value data storage format [Paragraph 0019 teaches the distributed database stores key-value pairs as a plurality of pieces of data, although is not limited to a KVS].
Matsubara does not appear to expressly disclose a segment-page data storage format.
Gupta discloses:
supporting a key-value data storage format and a segment-page data storage format [Column 10, lines 9 to 22 teach storing data for a database managed in database service, such as data pages and segment redo logs, and backing up all data blocks written to the distributed storage system in a key-value storage].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Matsubara, by supporting a key-value data storage format and a segment-page data storage format, as taught by Gupta [Column 10], because both applications are directed to data management in distributed databases; by supporting various formats of data, flexibility and interoperability of the system is enhanced.
Response to Arguments
The following is in response to arguments filed on January 20, 2026. Arguments have been carefully and respectfully considered.
Claim Rejections - 35 USC § 101
Applicant’s arguments have been carefully and respectfully considered, but are not persuasive.
In regards to claim 1, Applicant argues that “the claims are not an abstract idea because it involves large-scale transaction-related data (e.g. determining transaction allocation indexes), interaction between multiple nodes, and dynamic selection of a coordinator node to execute distributed transaction coordination”.
In response to the preceding argument, Examiner respectfully disagrees, and respectfully submits that, as further described in the rejections above, the broadest reasonable interpretation of claims as presently presented, covers performance of the limitation in the mind but for the recitation of generic computer components. That is, the determination steps, as presently presented, can be performed in the human mind, with the aid of pen and paper.
In regards to claim 1, Applicant further argues that “directed to a practical application that involves a specific improvement to the functioning of a distributed database system, i.e., the improvement to the efficiency of transaction processing”, and further, that “amended claim 1 results in improved efficiency of transaction processing, reliability of transaction processing, and system performance of a database system”.
In response to the preceding argument, Examiner respectfully disagrees, and respectfully submits that it is not clear, from the Applicant’s argument, what is the specific improvement in the functioning of a computer, or the improvement to another technology or technical field, that is achieved with the claimed invention. Furthermore, it is also not apparent from the Applicant’s argument, how such improvement correlate with the claim language as presently presented. Based on the preceding argument, it appears that the improvement is related to “the efficiency of transaction processing, reliability of transaction processing, and system performance of a database system”. However, it is not clear how transaction processing efficiency and reliability constitutes an improvement in the computer, nor how the system’s performance is improved by the claims as presently presented. Moreover, it is not clear what is the correlation between the mentioned improvement in the cited paragraphs of the specification, and the claim language. Therefore, 101 Rejections are hereby sustained.
Claim Rejections - 35 USC § 102/103
Applicant’s arguments have been carefully and respectfully considered, but are moot in view of new grounds of rejections, as necessitated by the amendments.
Conclusion
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/RAQUEL PEREZ-ARROYO/Primary Examiner, Art Unit 2169