Prosecution Insights
Last updated: April 19, 2026
Application No. 18/070,523

OPEN CAVITY INTEGRATED CIRCUIT

Non-Final OA §103
Filed
Nov 29, 2022
Examiner
ARROYO, TERESA M
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
96%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
352 granted / 489 resolved
+4.0% vs TC avg
Strong +24% interview lift
Without
With
+23.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
37 currently pending
Career history
526
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
57.6%
+17.6% vs TC avg
§102
18.6%
-21.4% vs TC avg
§112
19.0%
-21.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 489 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I (claims 1-8) in the reply filed on 9/30/2025 is acknowledged. Claim Objections Claims 1-8 is/are objected to because of the following informalities: In claim 1, since an electronic device is being claimed, it is circular to include the recitation of an electronic device in the body of the claim. In claim 5, it is unclear as to whether “a sensor region” is the same as “a sensor” in claim 1. The other claims are objected as being dependent on claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 2, 4-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2006/0091515 (Weng) in view of U.S. Patent Application Publication No. 2005/0127534 (Stecher). Weng discloses 1. An electronic device comprising: a substrate 410; a die 310 having an active surface ([0022]), the die 310 being disposed on the substrate 410; a sensor 313 in communication with the active surface ([0022]) of the die 310; a ring 340 encircling ([0024]) the sensor 313, the ring 340 including a cylindrical wall (dam); a mold compound 430 covering the die 310 and abutting an outer surface of the wall (dam) thereby forming a cavity (Fig. 6) in the mold compound 430 to expose the sensor 313 to an environment external to the electronic device. Weng fails to disclose the ring including a cylindrical wall and a cap, the cap having a partial circular shape that extends beyond each side of the wall. Stecher teaches (Fig. 2B) An electronic device comprising: a ring including 10 a cylindrical wall (bottom half) and a cap (top half), the cap (top half) having a partial circular shape that extends beyond each side of the wall (bottom half). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a cap shape on top of the wall in Weng. The motivation would have been to clamp the molding compound based on routine engineering design considerations as discussed in Stecher ([0059]). See MPEP 2144.04 Weng discloses 2. The electronic device of claim 1 further comprising a metal structure 350 disposed between the ring 340 and the die 310. Weng discloses 4. The electronic device of claim 1 further comprising at least one stress relief layer and/or at least one metal structure 350 disposed between the ring 340 and the die 310. Weng discloses 5. The electronic device of claim 1, wherein an inner diameter of the ring 340 is equal to or greater than a sensor region 313 of the die 310 to prevent affecting sensor performance (statement of intended use). See MPEP 2144.07. Weng discloses 6. The electronic device of claim 1 further comprising wire bonds 420 attached to the active surface of the die 310 and to the substrate 410. Weng appears to disclose (determining the optimum height would only involve routine skill in the art, see MPEP 2144.04) 7. The electronic device of claim 6, wherein the ring 340 has a height that extends above a maximum height of the wire bonds 420. Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weng in view of Stecher as applied to claim 6 above, and further in view of U.S. Patent Application Publication No. 2012/0322208 (Uchida). The combination of references fails to teach 8. The electronic device of claim 6, wherein the substrate is a leadframe that includes a die pad and conductive terminals, the die being attached to the die pad via a die attach material and the wire bonds being attached to the conductive terminals. Uchida teaches An electronic device comprising: wherein the substrate 104 / 109 is a leadframe that includes a die pad and conductive terminals ([0042], [0063]), the die 101 being attached to the die pad via a die attach material ([0057]) and the wire bonds 105 being attached to the conductive terminals. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a leadframe in Weng. The motivation would be a substrate that includes a leadframe is well-known in the package art as discussed in Uchida. See MPEP 2144.03. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Application Publication Nos. 2011/0036174 (Hooper) teaches sensor having a cap; 2017/0147857 (Liu) teaches a sensor on a substrate; 2018/0273376 (Feyh) teaches a sensor having a ring; 2020/0182661 teaches a sensor having a ring; 2023/0129699 (Guevara) teaches sensor having a cap; U.S. Patent No. 8,937,380 (Vaupel) teaches a sensor having a ring. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571.272.1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TERESA M. ARROYO/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Nov 29, 2022
Application Filed
Oct 18, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
96%
With Interview (+23.5%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 489 resolved cases by this examiner. Grant probability derived from career allow rate.

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