Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species b (Claims 1,3, and 5-8 readable thereon) in the reply filed on October 22, 2025 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1,3 and 5-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lutz et al (USPGPUB 20190198621, hereinafter “Lutz”).
Regarding Claim 1, Lutz teaches a silicon carbide semiconductor device, comprising: a semiconductor substrate containing a semiconductor having a bandgap that is wider than a bandgap of silicon ([0002], “A wide band gap semiconductor device can for example be a power semiconductor device that comprises silicon carbide (SiC); a wide band gap is defined as relative to silicon, and also SiC is known to have a wider energy bandgap than silicon”) ; and a device structure that is provided in the semiconductor substrate and has a predetermined blocking voltage, the device structure including a drift layer that is of an n- type, wherein the drift layer contains a first impurity of the n-type and a second impurity of a second p-type, ([0004], “A wide band gap semiconductor of the wide band gap semiconductor device 100 comprises a first doping region of a first conductivity type and a second doping region of a second conductivity type. The second doping region comprises a drift portion, a compensation portion and a highly doped portion…”) the predetermined blocking voltage is ensured by an n-type impurity concentration determined by subtracting a concentration of the second impurity from a concentration of the first impurity of the drift layer, the n-type impurity concentration being within a first range, a combined impurity concentration of the concentration of the first impurity and the concentration of the second impurity of the drift layer is in a second range, when the predetermined blocking voltage is a first blocking voltage class, the first range is 1x1016/cm3+20% and the second range is 3 x1016/cm3 to 1.3 x1017/cm3,when the predetermined blocking voltage is a second blocking voltage class, the first range is 3x1015/cm3+-20% and the second range is 3 x1016/cm3 to 1.1x1017/cm3, and when the predetermined blocking voltage is a third blocking voltage class, the first range is 1x1015/cm3+20% and the second range is 3x1016/cm3 to 9x1016/cm3([0004], “The drift portion of the second doping region has a first average net doping concentration lower than 1e17 cm.sup.−3. The highly doped portion of the second doping region has a second average net doping concentration higher than 5e18 cm.sup.−3. The compensation portion of the second doping region is located between the drift portion and the highly doped portion. The compensation portion extends from a first area comprising a net doping concentration higher than 1e16 cm.sup.−3 and lower than 1e17 cm.sup.−3 to a second area comprising a net doping concentration higher than 5e18 cm.sup.−3. A maximum gradient of the net doping concentration within at least a part of the compensation portion extending from the second area towards the first area for at least 100 nm is lower than 5e22 cm.sup.−4”; these different portions of the drift region are seen having different doping concentrations which are inherently dependent upon a fine-tuning of the blocking voltage).
Regarding Claim 3, Lutz teaches (Fig. 2) the silicon carbide semiconductor device according to claim 1, wherein the device structure is an insulated gate electric field effect transistor having a planar gate structure (Fig. 2, the device is seen structured as a planar gate IGFET).
Regarding Claim 5, Lutz teaches the silicon carbide semiconductor device according to claim 1, wherein the drift layer is an epitaxial layer ([0036], “the wide band gap semiconductor substrate may be an epitaxial semiconductor layer or a semiconductor base substrate and an epitaxial semiconductor layer”) uniformly doped throughout with the first impurity and the second impurity (Fig. 4, the drift region 402 is shown to have a uniform doping profile).
Regarding Claim 6, Lutz teaches the silicon carbide semiconductor device according to claim 1, wherein the first impurity is nitrogen, and the second impurity is aluminum or boron ([0035], “the first doping region 102 comprises the first conductivity type which can be a p-doping (e.g. caused by incorporating aluminum ions or boron ions) or an n-doping (e.g. caused by incorporating nitrogen ions, phosphor ions or arsenic ions)”.
Regarding Claim 7, Lutz teaches the silicon carbide semiconductor device according to claim 1, wherein the semiconductor substrate contains silicon carbide ([0002], “A wide band gap semiconductor device can for example be a power semiconductor device that comprises silicon carbide (SiC)”).
Allowable Subject Matter
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 8, the closest available references, that of Lutz and Siemieniec et al (USGPUB 20210020740), alone or in any reasonable combination, fails to teach the limitation, “… the first blocking voltage class is 1.2 kV-class, the second blocking voltage class is 3.3 kV-class, and the third blocking voltage class is 6.5 kV-class…” (Siemieniec teaches a blocking voltage class that includes 1.2 kV, 3.3 kV, and 6.5 kV, but the profiles where each of the concentrations are mapped to specific individual concentrations, is not seen in Siemieniec or any other reference available. [0047], “he power semiconductor device or an electrical structure (e.g. transistor of the silicon carbide device) of the power semiconductor device may have a breakdown voltage or blocking voltage of more than 100 V (e.g. a breakdown voltage of 200 V, 300 V, 400V or 500V) or more than 500 V (e.g. a breakdown voltage of 600 V, 5 700 V, 800V or 1000V) or more than 1000 V (e.g. a breakdown voltage of 1200 V, 1500 V, 1700V, 2000V, 3300V or 6500V)…”) .
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR J LASASSO whose telephone number is (703)756-5668. The examiner can normally be reached M-F 8-5 EST.
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/V.J.L./Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898