Prosecution Insights
Last updated: October 27, 2026
Application No. 18/071,901

OVERLYING FIDUCIAL DESIGN FOR GLASS PLACEMENT ACCURACY IMPROVEMENT

Final Rejection §103§112
Filed
Nov 30, 2022
Examiner
RODRIGUEZ VILLANU, SANDRA MILENA
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
102 granted / 116 resolved
+19.9% vs TC avg
Moderate +12% lift
Without
With
+12.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
34 currently pending
Career history
167
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
47.5%
+7.5% vs TC avg
§102
23.4%
-16.6% vs TC avg
§112
27.2%
-12.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 116 resolved cases

Office Action

§103 §112
DETAILED ACTION General Remarks The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The Amendment filed on 08/13/2026 has been entered. Claims 22-25 are withdrawn. Response to Arguments Applicant's arguments "Applicant Arguments/Remarks Made in an Amendment" with the "Amendment/Req. Reconsideration-After Non-Final Reject" filed on 08/13/2026, have been fully considered, the arguments/amendments are not persuasives and some of them are moot because do not apply to new ground of rejections with a new references, US 20230187372 A1 to Hung, US 20230207480 A1 to Karhade, US 20230170309 A1 to Lee, US 20190333861 A1 to Pietambaram being used in the current rejection, see detail below. Drawings Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 4, it recites the limitation “…wherein the first fiducial mark contacts the second fiducial mark”. It is not clear how the first fiducial mark contacts the second fiducial mark and are space away, as claimed in claim 1 and shown in Figure 3. The specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention, whereby the claims are rendered indefinite. Therefore, the resulting claim is indefinite and is failing to particularly point out and distinctly claim the subject matter. Appropriate clarification and/or correction are/is required within metes and bounds of the claimed invention. As there is a great deal of confusion and uncertainty as to the proper interpretation of the limitations of claim 1, it would not be proper for the examiner to reject such a claim on the basis of prior art. See MPEP 2173.06 II (second) wherein In re Steele, 305 F.2d 859, 134 USPQ 292 (CCPA 1962), a rejection under 35 U.S.C. 103 should not be based on considerable speculation about the meaning of terms employed in a claim or assumptions that must be made as to the scope of the claims. Claim Rejections - 35 USC § 103 The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1,5 and 12 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung et al. (US 20230187372 A1, hereinafter Hung) in view of Vaidya et al. (US 20210272881 A1, hereinafter Vaidya, of the record). Re: Independent Claim 1, Hung discloses a package architecture, (Fig. 1) comprising: PNG media_image1.png 306 640 media_image1.png Greyscale Hung’s Figure 1-Annotated. a first substrate (14 in [0036], Fig. 1); a first fiducial mark (141 in [0042], Fig. 3) on a surface of the first substrate (14 in [0036], Fig. 1); a second substrate (13 in [0042], Fig. 1) over the first substrate (14); a second fiducial mark (133 in [0042], Fig. 3) on the second substrate (13), wherein a footprint of the second fiducial mark (133) at least partially overlaps (Fig. 3) a footprint of the first fiducial mark (141) and wherein the second fiducial mark (133) is spaced away (fig. 3) from the first fiducial mark (141). Hung does not disclose expressly wherein the second substrate comprises glass. However, in the same semiconductor device field of endeavor, Vaidya discloses wherein the substrate comprises glass (substrate 101 made of borosilicate glass in [0030], Fig. 2A). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s second substrate comprises glass according to Vaidya’s substrate in order to have the predictable result of improving the alignment process and reducing the time processing ([0030], Vaidya). Re: Claim 5, Hung modified by Vaidya discloses the package architecture of claim 1, wherein the first fiducial mark (141, Hung) is a first material (141 made in a different step to 133 having a first material) and the second fiducial mark (133) is a second material (133 made in a different step to 141 having a second material) that is different than the first material (two different portions of the material). Re: Claim 12, Hung modified by Vaidya discloses the package architecture of claim 1, wherein the second substrate (13 in [0042], Fig. 1, Hung) is an interposer (13 to facilitate the electrical communication of components of the electronic device in [0039], as an interposer or bridge, Hung), or wherein the second substrate is a bridge inserted in a cavity in the first substrate. Claim(s) 2-3, 6 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung et al. (US 20230187372 A1, hereinafter Hung) in view of Vaidya et al. and further in view of Karhade et al. (US 20230207480 A1, hereinafter Karhade). Re: Claim 2, Hung modified by Vaidya discloses the package architecture of claim 1, Hung modified by Vaidya does not disclose expressly wherein the second fiducial mark is recessed into a surface of the second substrate that faces the first substrate. However, in the same semiconductor device field of endeavor, Karhade discloses wherein the second fiducial mark (263, [0041], Fig. 2D) is recessed into a surface of the second substrate (260, [0041], Fig. 2D) that faces the first substrate (251, [0040], Fig. 2D). PNG media_image2.png 238 541 media_image2.png Greyscale Karhade’s Figure 2D-Annotated. It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s second fiducial mark recessed into a surface of the second substrate according to Karhade’s second fiducial mark 263, that faces the first substrate, in order to have the predictable result of improve the alignment accuracy which is a critical factor in providing high yielding die modules ([0028], Karhade). Re: Claim 3, Hung modified by Vaidya discloses the package architecture of claim 1, Hung modified by Vaidya does not disclose expressly wherein the first fiducial mark is recessed into a surface of the first substrate that faces the second substrate. However, in the same semiconductor device field of endeavor, Karhade discloses wherein the first fiducial mark (225, [0041], Fig. 2D) is recessed into a surface of the first substrate (251, [0040], Fig. 2D) that faces the second substrate (260, [0041], Fig. 2D). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s first fiducial mark recessed into a surface of the first substrate according to Karhade’s first fiducial mark 225, that faces the second substrate, in order to have the predictable result of improve the alignment accuracy which is a critical factor in providing high yielding die modules ([0028], Karhade). Re: Claim 6, Hung modified by Vaidya discloses the package architecture of claim 1, Hung modified by Vaidya does not disclose wherein the footprint of the first fiducial mark is larger than the footprint of the second fiducial mark. However, in the same semiconductor device field of endeavor, Karhade discloses wherein the footprint of the first fiducial mark (512 in [0058], Fig. 5D) is larger (Figs. 5D) than the footprint of the second fiducial mark (563 in [0061], Fig. 5D). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s footprint of the first fiducial mark larger than the Hung’s footprint of the second fiducial mark, according to Karhade’s device in order to have the predictable result of improve the alignment accuracy which is a critical factor in providing high yielding die modules ([0028], Karhade). Claim(s) 7-10 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung et al. in view of Vaidya et al. and further in view of Hsu et al. (US 20220095462 A1, hereinafter Hsu, of the record). Re: Claim 7, Hung modified by Vaidya discloses the package architecture of claim 1, Hung modified by Vaidya does not disclose wherein the first fiducial mark is circular and wherein the second fiducial mark is circular. However, in the same semiconductor device field of endeavor, Hsu discloses wherein a fiducial mark (10M a fiducial mark having a circular ring shape in [0018], Fig. 1C) is circular (circular ring, Fig. 1C). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the first and second fiducial mark of Hung according to Hsu’s fiducial mark, wherein the fiducial mark is circular in order to have the predictable result of developing a package substrate with thin thickness, multiple functions, high performance and low power consumption to meet the compactness requirement of consumer electronic and communication products ([0002], Hsu). Therefore, Hung in view of Vaidya and Hsu teaches wherein the first fiducial mark (141, Hung) is circular (10M, Hsu) and wherein the second fiducial mark (133, Hung) is circular (10M, Hsu). Re: Claim 8, Hung modified by Vaidya and Hsu discloses the package architecture of claim 7, wherein the first fiducial mark (Hsu’s 10M applied to Hung) is a circular ring (circular ring, Fig. 1C, Hsu). Re: Claim 9, Hung modified by Vaidya and Hsu discloses the package architecture of claim 7, wherein the second fiducial mark (Hsu’s 10M applied to Hung) is a circular ring (circular ring, Fig. 1C, Hsu). Re: Claim 10, Hung modified by Vaidya and Hsu discloses the package architecture of claim 7, wherein the first fiducial mark (Hsu’s 10M applied to Hung) and the second fiducial mark (Hsu’s 10M applied to Hung) are both circular rings (circular ring, Fig. 1C, Hsu). Claim(s) 11 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung et al. in view of Vaidya et al. and further in view of Lee et al. (US 20230170309 A1, hereinafter Lee). Re: Claim 11, Hung modified by Vaidya discloses the package architecture of claim 1, Hung modified by Vaidya does not disclose wherein at least one of the first fiducial mark and the second fiducial mark are cross-shaped. However, in the same semiconductor device field of endeavor, Lee discloses a fiducial mark (FM1 first alignment mark in [0027, 0030], Fig. 1) having a cross-shaped (Fig. 1). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s first fiducial mark and the Hung’s second fiducial mark having a cross-shape according to Lee’s device in order to have the predictable result of improve reliability and durability of semiconductor packages ([0003], Lee). Claim(s) 13 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung et al. in view of Vaidya et al. and further in view of Pietambaram et al. (US 20190333861 A1, hereinafter Pietambaram). Re: Claim 13, Hung modified by Vaidya discloses the package architecture of claim 1, Hung modified by Vaidya does not disclose wherein the package architecture is coupled to a processor of a computing system. However, in the same semiconductor device field of endeavor, Pietambaram discloses wherein the package architecture (Fig. 6) is coupled to a processor of a computing system (as a computer system in [0045]). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Pietambaram’s feature of wherein the package architecture is coupled to a processor of a computing system to the combination of Hung and Vaidya in order to have the predictable result of provide higher-yielding packages for incorporation into such systems ([0045], Pietambaram). Claim(s) 14-15, 18-21 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung et al. (US 20230187372 A1, hereinafter Hung) in view of Vaidya et al. and further in view of Karhade et al. (US 20230207480 A1, hereinafter Karhade). Re: Independent Claim 14, Hung discloses an interposer (Fig. 1), comprising: a substrate (14 in [0036], Fig. 1), a first fiducial mark (141- bottom corner in [0042], Fig. 2), wherein the first fiducial mark (141- bottom corner) is proximate a first corner of the substrate (14); a second fiducial mark (141- top corner in [0042], Fig. 2) wherein the second fiducial mark (141- top corner) is proximate a second corner of the substrate (14), wherein the first corner is diagonally opposite from the second corner (Fig. 2). Hung does not expressly disclose wherein the substrate comprises glass; a first fiducial mark embedded in a first recess into a first surface of the substrate; and a second fiducial mark embedded in a second recess into the first surface of the substrate. However, in the same semiconductor device field of endeavor, Vaidya discloses wherein the substrate comprises glass (substrate 101 made of borosilicate glass in [0030], Fig. 2A). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s second substrate comprises glass according to Vaidya’s substrate in order to have the predictable result of improving the alignment process and reducing the time processing ([0030], Vaidya). Hung modified by Vaidya does not expressly disclose a first fiducial mark embedded in a first recess into a first surface of the substrate; and a second fiducial mark embedded in a second recess into the first surface of the substrate. However, in the same semiconductor device field of endeavor, Karhade discloses a fiducial mark (263, [0041], Fig. 2D) embedded in a first recess into a first surface of the substrate (260, [0041], Fig. 2D). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s first and second fiducial mark recessed into a first surface of the substrate according to Karhade’s second fiducial mark 263, in order to have the predictable result of improve the alignment accuracy which is a critical factor in providing high yielding die modules ([0028], Karhade). Re: Claim 15, Hung modified by Vaidya and Karhade discloses the interposer of claim 14, wherein the glass is a borosilicate glass (substrate 101 made of borosilicate glass in [0030], Fig. 2A, Vaidya) or a fused silica glass. Re: Claim 18, Hung modified by Vaidya and Karhade discloses the interposer of claim 14, wherein the interposer is a bridge (13 to facilitate the electrical communication of components of the electronic device in [0039], as an interposer or bridge, Hung) in a package substrate (Hung’s 12-11, Fig. 1). Re: Claim 19, Hung modified by Vaidya and Karhade discloses the interposer of claim 14, wherein the first fiducial mark (Hung’s 141-bottom corner, Figs. 2,3) is substantially similar (Figs. 2,3, Hung) to the second fiducial mark (Hung’s 141-top corner, Figs. 2,3). Re: Claim 20, Hung modified by Vaidya and Karhade discloses the interposer of claim 14, Hung modified by Vaidya and Karhade wherein the first fiducial mark and the second fiducial mark both comprise copper. However, it would have been obvious to one of ordinary skill in the art at the time the invention was made the selection of a known material as copper (141 fiducial mark by Hung made of a known material as copper) based on its suitability for its intended use supported a prima facie obviousness determination (MPEP § 2144.07). Re: Claim 21, Hung modified by Vaidya and Karhade discloses the interposer of claim 14, wherein surfaces of the first fiducial mark (Hung’s 141 at left in Fig. 3) and the second fiducial mark (Hung’s 141 at right in Fig. 3) are substantially coplanar (Fig. 3, Hung) with the first surface of the substrate (Hung’s 14). Claim(s) 16-17 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hung in view of Vaidya, in view of Karhade and further in view of Hsu et al. (US 20220095462 A1, hereinafter Hsu, of the record). Re: Claim 16, Hung modified by Vaidya and Karhade discloses the interposer of claim 14, Hung modified by Vaidya and Karhade does not disclose wherein the first fiducial mark and the second fiducial mark are both circular. However, in the same semiconductor device field of endeavor, Hsu discloses wherein a fiducial mark (10M a fiducial mark having a circular ring shape in [0018], Fig. 1C) is circular (circular ring, Fig. 1C). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to make the Hung’s first and second fiducial mark circular according to Hsu’s fiducial mark, in order to have the predictable result of developing a package substrate with thin thickness, multiple functions, high performance and low power consumption to meet the compactness requirement of consumer electronic and communication products ([0002], Hsu). Re: Claim 17, Hung modified by Vaidya, Karhade and Hsu disclose the interposer of claim 16, wherein the first fiducial mark (Hsu’s 10M applied to Hung) and the second fiducial mark (Hsu’s 10M applied to Hung) are both circular rings (circular ring, Fig. 1C, Hsu). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SANDRA M RODRIGUEZ VILLANUEVA whose telephone number is (571)272-1936. The examiner can normally be reached Monday to Friday 8:00am-5:00pm (EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at (571) 272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SANDRA MILENA RODRIGUEZ VILLANUEVA/ Examiner, Art Unit 2898 /JESSE Y MIYOSHI/ Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Nov 30, 2022
Application Filed
Jul 25, 2023
Response after Non-Final Action
May 15, 2026
Non-Final Rejection mailed — §103, §112
Aug 13, 2026
Response Filed
Oct 16, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+12.1%)
2y 10m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 116 resolved cases by this examiner. Grant probability derived from career allowance rate.

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