Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/06/2025 has been entered.
Drawings
The objections to the Drawings are withdrawn in view of the amendments to
the Claim 5.
Claim Objections
The objections to the Claim 5 are withdrawn in view of the amendments to Claim 5.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-7 are is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kendzia, III et al. (US 11,690,195 - hereinafter, "Kendzia").
With respect to Claim 1, Kendzia teaches (in Figure 4 and in column 2, lines 9-44 and as shown in annotated Figure 4 below)
A switching apparatus, comprising:
a first switching module (a set of (10), see annotated Figure 4 below), comprising two first unidirectional switches (see annotated Figure 4 below, in column 1, lines 64-67, “Referring now to the drawings, the cooling system described herein is particularly useful for cooling power semiconductor switches 10, such as thyristors, IGBTs, GTOs, IGCTs, etc.” and in column 2, lines 40-44, “Each of the modules 18 may have two anti-parallel power semiconductor switches 10 to switch AC power, which means the static transfer switch 12 may have a total of twelve power semiconductor switches 10 therein”, thus each switch (10) can be thyristors arranged in an anti-parallel arrangement and Examiner respectfully notes that Merriam-Webster defines a couple of definitions for “unidirectional”. For example, Merriam-Webster provides one of the several definitions of “unidirectional” as “involving, functioning, moving, or responsive in a single direction”. Accordingly, the limitation “unidirectional switches” can be viewed in the broadest reasonable interpretation that a “switches moving current in a single direction”, thus each switch (10) can be viewed as a unidirectional switch as it allows current from a voltage source to an output), configured to switch a first alternating current (AC) voltage source (positive AC voltage, in paragraph [0014], “Power semiconductor switches 10 are used to electrically couple a first or second power source 14A, B to the power output 16 which is connected to the electric load. That is, only one of the power sources 14A is coupled to the power output 16 at a particular time, while the other power source 14B is disconnected from the power output 16. Thus, in the three phase static transfer switch 12 in the figures, separate power semiconductor switches 10 are used for each phase and each power source 14A, B. Further, it is preferred that two power semiconductor switches 10 are paired together in an anti-parallel arrangement to effectively switch positive and negative AC voltages”);
a second switching module (another set of (10), see annotated Figure 4 below), comprising two second unidirectional switches (see annotated Figure 4 below, similarly as taught by first unidirectional switches, each switch (10) can be viewed as a unidirectional switch as it allows current from a voltage source to an output), configured to switch a second AC voltage source (negative AC voltage) different from the first AC voltage source (positive AC voltage); and
a heatsink (see annotated Figure 4 below) thermally and electrically (in paragraph [0015], “In this arrangement, the heat sinks 20 may be used as electrical conductors to supply electric power or draw electric power from the electrical contacts 24 of the power semiconductor switches 10” and in paragraph [0020], “The channels 50 may be aligned with the respective heat sink opening 36 so that air flows through the channel 50 as it travels to the heat sink opening 36 and the plenum 34. This further directs that airflow through the heat sink 20 to efficiently dissipate heat therefrom”) coupled to the two first unidirectional switches (see annotated Figure 4 below) of the first switching module (a set of (10)) and the two second unidirectional switches (see annotated Figure 4 below) of the second switching module (another set of (10)), and
a bus bar assembly (a system of (26)) comprising:
a first bar (a (26), see annotated Figure 4 below) electrically coupled (in paragraph [0015], “Electrical connectors 26 attached to the heat sinks 20 are also provided for coupling each heat sink 20 to a power source 14 or power output 16”) to heatsink (see annotated Figure 4 below) and defining an output (in paragraph [0015], “It is understood that when a power semiconductor switch 10 is electrically on, electric power flows from the power source 14 through one heat sink 20 to one of the electrical contacts 24, through the switch 10 to the other electrical contact 24, and through the other heat sink 20 to the power output 16”) for the first voltage source (14A) and the second voltage source (14B);
a second bar (another (26), see annotated Figure 4 below) electrically coupled (in paragraph [0015], “Electrical connectors 26 attached to the heat sinks 20 are also provided for coupling each heat sink 20 to a power source 14 or power output 16”) to the first switching module (a set of (10)) and electrically isolated (isolated by first switching module (a set of (10), see annotated Figure 4 below), in paragraph [0015], “It is understood that when a power semiconductor switch 10 is electrically on, electric power flows from the power source 14 through one heat sink 20 to one of the electrical contacts 24, through the switch 10 to the other electrical contact 24, and through the other heat sink 20 to the power output 16”, thus isolated if the first switching module is off) from the first bar (a (26), see annotated Figure 4 below); and
a third bar (another (26), see annotated Figure 4 below) electrically coupled (in paragraph [0015], “Electrical connectors 26 attached to the heat sinks 20 are also provided for coupling each heat sink 20 to a power source 14 or power output 16”) to the second switching module (another set of (10), see annotated Figure 4 below) and electrically isolated (isolated by the second switching module (another set of (10), see annotated Figure 4 below), in paragraph [0015], “It is understood that when a power semiconductor switch 10 is electrically on, electric power flows from the power source 14 through one heat sink 20 to one of the electrical contacts 24, through the switch 10 to the other electrical contact 24, and through the other heat sink 20 to the power output 16”, thus isolated if the second switching module is off)) from the first bar (a (26), see annotated Figure 4 below).
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With respect to Claim 3, Kendzia further teaches (in Figure 4 and in column 2, lines 9-44 and as shown in annotated Figure 4 above) further comprising:
a second heatsink (see annotated Figure 4 above) thermally coupled (in paragraph [0003], “Heat generated by the power semiconductor switch is at least partially absorbed by one or more heat sinks pressed against the power semiconductor switch, for example, with a clamp”) to the first switching module (a set of (10)); and a third heatsink (see annotated Figure 4 above) thermally coupled (in paragraph [0003], “Heat generated by the power semiconductor switch is at least partially absorbed by one or more heat sinks pressed against the power semiconductor switch, for example, with a clamp”) to the second switching module (another set of (10)).
With respect to Claim 4, Kendzia further teaches (in Figure 4 and in column 2, lines 9-44 and as shown in annotated Figure 4 above)
wherein the bus bar assembly (a system of (26)) further comprises: an output terminal (16, in column 2, lines 61-63, “Electrical connectors 26 attached to the heat sinks 20 are also provided for coupling each heat sink 20 to a power source 14 or power output 16”) connected to the first bar (a (26), see annotated Figure 4 above).
With respect to Claim 5, as best understood by the Examiner, Kendzia further teaches (in Figure 4 and in column 2, lines 9-44 and as shown in annotated Figure 4 above)
wherein the bus bar assembly (a system of (26)) further comprise:
a first input terminal (a (24), see annotated Figure 4 above, in paragraph [0015], “In this arrangement, the heat sinks 20 may be used as electrical conductors to supply electric power or draw electric power from the electrical contacts 24 of the power semiconductor switches 10. That is, each of the opposite side surfaces 24 of a power semiconductor switch 10 constitutes an electrical contact 24. Electrical connectors 26 attached to the heat sinks 20 are also provided for coupling each heat sink 20 to a power source 14 or power output 16… It is understood that when a power semiconductor switch 10 is electrically on, electric power flows from the power source 14 through one heat sink 20 to one of the electrical contacts 24, through the switch 10 to the other electrical contact 24, and through the other heat sink 20 to the power output 16”) connected (see annotated Figure 4 above, connected to the second bar through heat sink (see annotated Figure 4 above)) to the second bar (another (26), see annotated Figure 4 above), the first input terminal (a (24)) defining an input to the first switching module (a set of (10)); and
a second input terminal (another (24), see annotated Figure 4 above) connected (see annotated Figure 4 above, connected to the second bar through heat sink (see annotated Figure 4 above)) to the third bar (another (26), see annotated Figure 4 above), the second input terminal (another (24)) defining an input to the second switching module (another set of (10)).
With respect to Claim 6, Kendzia further teaches (in Figure 4 and in column 2, lines 9-44 and as shown in annotated Figure 4 above)
wherein the heatsink (see annotated Figure 4 above) is in direct mechanical contact with (in paragraph [0015], “Threaded rods 22 may be used as a clamp to squeeze the heat sinks 20 and the power semiconductor switches 10 together”, thus direct mechanically contacting by clamping with the threaded rod (22)) the first switching module (a set of (10)) and the second switching module (another set of (10)).
With respect to Claim 21, Kendzia further teaches (in Figure 4 and in column 2, lines 9-44 and as shown in annotated Figure 4 above)
wherein:
the second heatsink (see annotated Figure 4 above) is electrically coupled to the first switching module (a set of (10)) and the second bar (another (26), see annotated Figure 4 above) is electrically coupled to the first switching module (a set of (10)) via the second heatsink (see annotated Figure 4 above);
the third heatsink (see annotated Figure 4 above) is electrically coupled to the second switching module (another set of (10)) and the third bar (another (26), see annotated Figure 4 above) is electrically coupled to the second switching module (another set of (10)) via the third heatsink (see annotated Figure 4 above).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Kendzia in view of Carter (US 2010/0066431 - hereinafter, "Carter").
With respect to Claim 22, Kendzia teaches the limitations of Claim 1 as per above but fails to specifically teach or suggest the limitations of Claim 22.
Carter, however, teaches (in Figure 2-6 and in paragraph [0030])
further comprising:
a controller (224) operably coupled to the first switching module (208a) and the second switching module (208b), the controller (224) comprising:
a memory storing instructions (other component, in paragraph [0030], “other component that is or can be adapted to receive and understand the comparison information provided by the monitor circuit 220 and then control the switching devices 208 based on the comparison information”) thereon, and
a processor (digital signal processor) configured to execute the instructions and thereby control an opening and a closing of the first switching module (208a) and an opening and a closing of the second switching module (208b).
It would have been obvious to a person having ordinary skill in the art at the time before effective filing date of the claimed invention, to combine the teachings of Carter with Kendzia, such that a controller operably coupled to the first switching module and the second switching module, the controller comprising: a memory storing instructions thereon, and a processor configured to execute the instructions and thereby control an opening and a closing of the first switching module and an opening and a closing of the second switching module as taught by Carter since doing so would allow monitoring, controlling and decision to be made as to whether or not a switch needs to be made between sources of power being supplied to the load. (in paragraph [0030]-[0031])
Response to Arguments
Applicant’s arguments filed on 01/20/2026 have been fully considered, but notes that Applicant’s arguments are directed to the claims as amended, and since the rejection has been modified to meet the limitations of the amended claims (See rejection above).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Steven Ngo whose telephone number is (571)272-4295. The examiner can normally be reached Monday - Friday 7:30AM - 4:00PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jayprakash Gandhi can be reached at (571) 272-3740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/S.N./Examiner , Art Unit 2835
/Jayprakash N Gandhi/Supervisory Patent Examiner, Art Unit 2835