DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s election without traverse of claims 1-10 in the reply filed on 08/22/25 is acknowledged. By this election, claims 11-20 are withdrawn and claims 1-10 are pending in the application.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 8 and 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang et al. (2020/0343145).
Regarding claim 1, Kang (Fig. 15) discloses a semiconductor device 100, comprising: a substrate 10 ([0062]); a gate electrode 210 on the substrate 10 ([0064]); an STI region (40, 60) in the substrate 10 (Fig. 5, [0062]); an isolation region (710, 720) comprising: a pre-DTI region (710, 720) that at least partially overlaps with the STI region 40 (Fig. 10, [0078]); and a DTI region (650, 660) extending from the pre-DTI region (710, 720) into the substrate 10 ([0074]); and an interlayer dielectric 770 on the substrate 10, covering the interlayer dielectric 770 (Fig. 15).
Regarding claim 2, Kang (Fig. 14) discloses wherein at least part of the isolation region (710, 720) passes through the interlayer dielectric 770.
Regarding claim 3, Kang (Fig. 14) discloses wherein the DTI region 650 has a smaller width than that of the pre-DTI region 720.
Regarding claim 4, Kang (Fig. 14) discloses further comprising: an air gap 15 in the isolation region 650, at least partially below the pre-DTI region 720.
Regarding claim 5, Kang (Fig. 14) discloses wherein each of the gate electrode 210 and at least part of the DTI region 720 above an uppermost surface of the substrate 10.
Regarding claim 6, Kang (Fig. 4) discloses further comprising: a first buried layer 20 having a second conductivity type (N-type) in the substrate 10 (Fig. 4, [0062]); a deep well 90 directly or indirectly connected to the first buried layer 20 ([0063]); a first well 110 in the deep well 90; a drain 320 in the first well 90 and at a surface of the substrate 10; a body region 360 having a first conductivity type (N or P-type) in the substrate 10 ([0065]); and a source 340 in the body region 360 and at the surface of the substrate 10 ([0065]).
Regarding claim 8, Kang (Fig. 15) discloses wherein the pre-DTI region 720 is at least partially below an adjacent gate electrode 210.
Regarding claim 10, Kang (Fig. 15) discloses wherein the DTI region 720 has a lowermost surface below the second buried layer 80.
Allowable Subject Matter
Claims 7 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art of record fails to disclose all the limitations recited in the above claims. Specifically, the prior art of record fails to disclose further comprising: a second buried layer having the first conductivity type in the substrate; and a high-voltage well having the second conductivity type connected to the second buried layer and the deep well (claim 7); or further comprising: a dummy gate on the STI region, wherein the pre-DTI region at least partially overlaps the dummy gate (claim 9).
Conclusion
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/THERESA T DOAN/ Primary Examiner, Art Unit 2814