Prosecution Insights
Last updated: July 17, 2026
Application No. 18/079,165

IMAGE SENSOR

Non-Final OA §103
Filed
Dec 12, 2022
Priority
Dec 22, 2021 — RE 10-2021-0185406
Examiner
NETTLES, CORALIE ANN
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
3 (Non-Final)
68%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
23 granted / 34 resolved
At TC average
Strong +32% interview lift
Without
With
+31.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
38 currently pending
Career history
87
Total Applications
across all art units

Statute-Specific Performance

§103
93.3%
+53.3% vs TC avg
§102
3.8%
-36.2% vs TC avg
§112
3.0%
-37.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 34 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 31, 2026 has been entered. Response to Amendment This Office Action is in response to Applicant's amendments filed March 31, 2026. Claims 1, 16, and 18 have been amended. No claims have been added. No claims have been canceled. Claims 11-15 stand withdrawn. Currently, claims 1-10, and 16-20 are pending. Response to Arguments Applicant’s arguments with respect to claims 1 and 16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 4-5, 7-8, 10, 16, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kao et al. (US 20220223635 A1) herein after “Kao” in view of Kim et al. (US 20200227449 A1) herein after “Kim449” and Kim et al. (US 20190229141 A1) herein after “Kim141”. Regarding claim 1, Figs. 2H and 3A of Kao disclose an image sensor (Fig. 2H, semiconductor device 500I, ¶ [0050]) comprising: a substrate (Fig. 2H, substrate 100, ¶ [0014]) having a first surface (Fig. 2H, front surface 100f, ¶ [0014]) and an opposing second surface (Fig. 2H, back surface 100b, ¶ [0014]) and including a photoelectric conversion region (Fig. 2H, doped region 101, ¶ [0015]); a first isolation region (Fig. 2H, shallow trench structure 82a, 82b, ¶ [0048]) extending vertically into the substrate (100) from the first surface (100f) of the substrate (100); a second isolation region (Fig. 2H, back side isolation structure IS2, ¶ [0028]) extending vertically into the substrate (100) from the second surface (100b) of the substrate (100) and corresponding to the first isolation region (82); a photoelectric conversion device (Fig. 2H, photodetector PD, ¶ [0015]) disposed at a central portion of the photoelectric conversion region (101) of the substrate (100); and a contact region (Fig. 2H, conductive structure 120b, ¶ [0024]) extending vertically from the second surface (100b) of the substrate (100) to electrically connect the first isolation region (82) at a peripheral portion (Fig. 2H, second region R2, ¶ [0013]) of the photoelectric conversion region (101), wherein the second isolation region (IS2) includes: a trench (“a back side isolation structure IS2, such as a back side trench isolation”, ¶ [0028]); an insulating liner (Fig. 2H, dielectric layer 116, ¶ [0025]) conformally formed on an inner wall of the trench. Kao fails to disclose an insulating liner conformally formed on an inner wall of the trench; a trap conductive film conformally formed on an inner wall of the insulating liner; and an insulating filling layer filling a residual portion of the trench and including an air gap, wherein a dielectric constant of the insulating filling layer is lower than a dielectric constant of silicon oxide. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses an insulating liner (Fig. 4, insulating pattern 155, ¶ [0054]) conformally formed on an inner wall of the trench (TR1); a trap conductive film (Fig. 4, conductive pattern 153, ¶ [0054]) conformally formed on an inner wall of the insulating liner (Fig. 4, insulating pattern 155, ¶ [0054]); and an insulating filling layer (Fig. 4, gapfill pattern 151, ¶ [0054]) filling a residual portion of the trench (TR1). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the layers as disclosed by Kim449, to improve dark current (see Kim449, ¶ [0063]). Kim449 fails to disclose the insulating filling layer including an air gap, wherein a dielectric constant of the insulating filling layer is lower than a dielectric constant of silicon oxide. In the similar field of endeavor of solid-state imaging devices, Fig. 6D of Kim141 discloses the insulating filling layer (Fig. 6D, isolation layer 130a, ¶ [0078]) including an air gap (“the isolation layer 130a may define an air gap in the isolation trench 120, similar to the air gap 175 in FIGS. 6A to 6C”, ¶ [0078]), wherein a dielectric constant of the insulating filling layer (130a) is lower than a dielectric constant of silicon oxide (“The isolation layer 130a may include at least one… a low dielectric material having a lower dielectric constant than silicon oxide”, ¶ [0079]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the insulating filling layer as disclosed by Kim141, to separate the adjacent pixels (see Kim141, ¶ [0061]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07). Regarding claim 2, Kao, Kim449 and Kim141 together disclose the image sensor of claim 1 as applied above, but Kao and Kim141 fail to disclose wherein the trap conductive film of the second isolation region is electrically connected to the contact region. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses wherein the trap conductive film (153) of the second isolation region (Fig. 4, pixel separation structure 150, ¶ [0054]) is electrically connected to the contact region (Fig. 4, conductive line CL, ¶ [0062]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the trap conductive film and contact region as disclosed by Kim449, to improve dark current (see Kim449, ¶ [0063]). Regarding claim 4, Kao, Kim449 and Kim141 together disclose the image sensor of claim 1 as applied above, but Kao fails to disclose wherein the trap conductive film includes at least one of doped polysilicon, titanium (Ti), tungsten (W), aluminum (Al), and indium tin oxide (ITO), and the insulating filling layer includes an oxide layer formed by a process having poor step coverage. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses wherein the trap conductive film (153) includes at least one of doped polysilicon, titanium (Ti), tungsten (W), aluminum (Al), and indium tin oxide (ITO) (Fig. 4, “The conductive pattern 153 may be formed of or include, for example, poly silicon doped with n- or p-type impurities”, ¶ [0056]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the trap conductive film as disclosed by Kim, to improve dark current (see Kim, ¶ [0063]). Kim449 fails to disclose the insulating filling layer includes an oxide layer formed by a process having poor step coverage. In the similar field of endeavor of solid-state imaging devices, Kim141 discloses the insulating filling layer (130a) of the second isolation region is formed by a process having poor step coverage (“The void 175 may be formed depending on the gap fill capability of the material forming the anti-reflection film 170”, “the isolation layer 130a may define an air gap in the isolation trench 120, similar to the air gap 175”, ¶ [0078] and [0091]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the insulating filling layer as disclosed by Kim141, to separate the adjacent pixels (see Kim141, ¶ [0061]). Regarding claim 5, Kao, Kim449 and Kim141 together disclose the image sensor of claim 1 as applied above, and Figs. 2H and 3A of Kao further disclose wherein the first isolation region (82) and the second isolation region (IS2) are respectively arranged in a lattice pattern (shown in Fig. 3A), and the contact region (120b) is disposed at a lattice point of the second isolation region (IS2) in the peripheral portion (R2). Regarding claim 7, Kao, Kim449 and Kim141 together disclose the image sensor of claim 1 as applied above, and Fig. 2H of Kao further discloses wherein the first isolation region (82) and the second isolation region (IS2) are in directly contact and penetrate the substrate (100). Regarding claim 8, Kao, Kim449 and Kim141 together disclose the image sensor of claim 7 as applied above, and Fig. 2H of Kao further discloses wherein the first isolation region (82) includes a first trench (trench for 82), an insulating barrier (Fig. 2H, dielectric liner 80, ¶ [0044]) conformally formed on an inner wall of the first trench (trench for 82), and a conductive filling film (Fig. 2H, conductive layer 81, ¶ [0044]) filling the first trench (trench for 82), and the insulating liner (116) directly contacts the insulating barrier (80) and the conductive filling film (81) in the first isolation region (82). Regarding claim 10, Kao, Kim449 and Kim141 together disclose the image sensor of claim 1 as applied above, and Fig. 2H of Kao further discloses comprising: a color filter (Fig. 2H, light filters (e.g., color filters) 128, ¶ [0040]) and a microlens (Fig. 2H, lenses (e.g., micro-lenses) 130, ¶ [0040]) disposed on an upper portion of the second surface (100b) of the substrate (100). Regarding claim 16, Figs. 2H and 3A of Kao disclose an image sensor (500I) comprising: a substrate (100) having a front surface (100f) and an opposing rear surface (100b), and including a photoelectric conversion region (101); a first isolation region (82) arranged in a lattice pattern and vertically extending into the substrate (100) from the front surface (100f) of the substrate (100), wherein the first isolation region (82) includes; a first trench (trench for 82), an insulating barrier (80) formed on an inner wall of the first trench (trench for 82), and a conductive filling film (81) filling a residual portion of the first trench (trench for 82); a second isolation region (IS2) arranged in a lattice pattern and vertically extending into the substrate (100) from the rear surface (100b) to contact the first isolation region (82), wherein the second isolation region (IS2) includes; a second trench (trench for IS2), an insulating liner (116) conformally formed on an inner wall of the second trench (trench for IS2); and a contact region (120b) vertically extending from the rear surface (100b) to electrically connect the conductive filling film (81) of the first isolation region (82) and the trap conductive layer of the second isolation region (IS2), wherein the photoelectric conversion region (101) includes: a photoelectric conversion device (PD) disposed in an inner portion of the substrate (100); a color filter (128) disposed on the rear surface (100b) of the substrate (100); and a microlens (130) disposed on the color filter (128). Kao fails to disclose a trap conductive film conformally formed on an inner wall of the insulating liner, and an insulating filling layer filling a residual portion of the second trench and including an air gap, wherein a dielectric constant of the insulating filling layer is lower than a dielectric constant of silicon oxide. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses a trap conductive film (153) conformally formed on an inner wall of the insulating liner (155), and an insulating filling layer filling (151) a residual portion of the second trench (TR1). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the layers as disclosed by Kim, to improve dark current (see Kim, ¶ [0063]). Kim449 fails to disclose the insulating filling layer including an air gap, wherein a dielectric constant of the insulating filling layer is lower than a dielectric constant of silicon oxide. In the similar field of endeavor of solid-state imaging devices, Fig. 6D of Kim141 discloses the insulating filling layer (130a) including an air gap (“the isolation layer 130a may define an air gap in the isolation trench 120, similar to the air gap 175 in FIGS. 6A to 6C”, ¶ [0078]), wherein a dielectric constant of the insulating filling layer (130a) is lower than a dielectric constant of silicon oxide (“The isolation layer 130a may include at least one… a low dielectric material having a lower dielectric constant than silicon oxide”, ¶ [0079]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the insulating filling layer as disclosed by Kim141, to separate the adjacent pixels (see Kim141, ¶ [0061]) and/or because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07). Regarding claim 18, Kao, Kim449 and Kim141 together disclose the image sensor of claim 16 as applied above, and Fig. 2H of Kao further discloses wherein the insulating liner (116) of the second isolation region (IS2) includes a high-k dielectric material formed by a process having good step coverage (“The dielectric layer 116 may include a suitable dielectric material, such as… a high-k dielectric material”, ¶ [0070]). Kao fails to disclose the trap conductive film of the second isolation region includes at least one of doped polysilicon, titanium (Ti), tungsten (W), aluminum (Al), and indium tin oxide (ITO), and the insulating filling layer of the second isolation region includes a low-k dielectric material formed by a process having poor step coverage. Kao fails to disclose the trap conductive film of the second isolation region includes at least one of doped polysilicon, titanium (Ti), tungsten (W), aluminum (Al), and indium tin oxide (ITO), and the insulating filling layer of the second isolation region includes a low-k dielectric layer formed by a process having poor step coverage. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses wherein the trap conductive film (153) of the second isolation region includes at least one of doped polysilicon, titanium (Ti), tungsten (W), aluminum (Al), and indium tin oxide (ITO) (Fig. 4, “The conductive pattern 153 may be formed of or include, for example, poly silicon doped with n- or p-type impurities”, ¶ [0056]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the trap conductive film as disclosed by Kim, to improve dark current (see Kim, ¶ [0063]). Kim449 fails to disclose the insulating filling layer of the second isolation region includes a low-k dielectric layer formed by a process having poor step coverage. In the similar field of endeavor of solid-state imaging devices, Kim141 discloses the insulating filling layer (130a) of the second isolation region is formed by a process having poor step coverage (“The void 175 may be formed depending on the gap fill capability of the material forming the anti-reflection film 170”, “the isolation layer 130a may define an air gap in the isolation trench 120, similar to the air gap 175”, ¶ [0078] and [0091]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the insulating filling layer as disclosed by Kim141, to separate the adjacent pixels (see Kim141, ¶ [0061]). Regarding claim 20, Kao, Kim449 and Kim141 together disclose the image sensor of claim 16 as applied above, and Fig. 2H of Kao further discloses wherein each of the first trench and the second trench is a deep trench isolation (“any suitable isolation structure including insulating materials, such as a shallow trench isolation (STI) structure, a deep trench isolation (DTI) structure”, ¶ [0013]). Claims 3 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Kao (US 20220223635 A1), Kim449 (US 20200227449 A1) and Kim141 (US 20190229141 A1) in further view of Fukase et al. (US 20160284746 A1) herein after “Fukase”. Regarding claim 3, Kao, Kim449 and Kim141 together disclose the image sensor of claim 1 as applied above, but Kao and Kim141 fail to disclose comprising: an anti-reflection layer covering the second surface of the substrate and the second isolation region, wherein a lowermost surface of the anti-reflection layer directly contacts an uppermost surface of the insulating liner, an uppermost surface of the trap conductive film, and an uppermost surface of the insulating filling layer, and the lowermost surface of the anti-reflection layer does not contact the air gap. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses comprising: an anti-reflection layer (Fig. 4, anti-reflection layer 132, ¶ [0048]) covering the second surface (Fig. 4, second surface 100b, ¶ [0035]) of the substrate (Fig. 4, semiconductor substrate 100, ¶ [0034]) and the second isolation region (150), and wherein a lowermost surface of the anti-reflection layer (132) directly contacts an uppermost surface of the insulating liner (155), an uppermost surface of the trap conductive film (153), and an uppermost surface of the insulating filling layer (151). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the layers as disclosed by Kim, to improve dark current (see Kim, ¶ [0063]). Kim449 fails to disclose the lowermost surface of the anti-reflection layer does not contact the air gap. In the similar field of endeavor of solid-state imaging devices, Fig. 10 of Fukase discloses the lowermost surface of the anti-reflection layer (Fig. 10, antireflection film 33, ¶ [0042]) does not contact the air gap (9). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the air gap as disclosed by Fukase, to suppress optical color mixing (see Fukase, ¶ [0110]). Regarding claim 17, Kao, Kim449 and Kim141 together disclose the image sensor of claim 16 as applied above, but Kao and Kim141 fail to disclose comprising: an anti-reflection layer covering the rear surface of the substrate and the second isolation region, wherein a lowermost surface of the anti-reflection layer directly contacts an uppermost surface of the insulating liner, an uppermost surface of the trap conductive film, and an uppermost surface of the insulating filling layer, and the lowermost surface of the anti-reflection layer does not contact the air gap. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses comprising: an anti-reflection layer (132) covering the rear surface (100b) of the substrate (100) and the second isolation region (150), and wherein a lowermost surface of the anti-reflection layer (132) directly contacts an uppermost surface of the insulating liner (155), an uppermost surface of the trap conductive film (153), and an uppermost surface of the insulating filling layer (151). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the layers as disclosed by Kim, to improve dark current (see Kim, ¶ [0063]). Kim449 fails to disclose the lowermost surface of the anti-reflection layer does not contact the air gap. In the similar field of endeavor of solid-state imaging devices, Fig. 10 of Fukase discloses the lowermost surface of the anti-reflection layer (33) does not contact the air gap (9). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the air gap as disclosed by Fukase, to suppress optical color mixing (see Fukase, ¶ [0110]). Claims 6 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kao (US 20220223635 A1), Kim449 (US 20200227449 A1), and Kim141 (US 20190229141 A1) in further view of Noh et al. (US 20190221597 A1) herein after “Noh”. Regarding claim 6, Kao, Kim449 and Kim141 together disclose the image sensor of claim 5 as applied above, but the combination fails to disclose wherein, a length of the second isolation region vertically extending from the second surface of the substrate is less than a length of the contact region vertically extending from the second surface of the substrate. In the similar field of endeavor of image sensors, Fig. 2 of Noh discloses wherein, a length of the second isolation region (Fig. 2, device isolation region 124, ¶ [0030]) vertically extending from the second surface (Fig. 2, second surface 110B, ¶ [0028]) of the substrate (Fig. 2, semiconductor substrate 110, ¶ [0026]) is less than a length of the contact region (Fig. 2, through via 172, ¶ [0053]) vertically extending from the second surface (110B) of the substrate (110). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the contact region as disclosed by Noh, to provide a conductive pathway through the substrate (see Noh, ¶ [0053]). Regarding claim 19, Kao, Kim449 and Kim141 together disclose the image sensor of claim 16 as applied above, and Fig. 2H of Kao further discloses wherein the insulating liner (116) of the second isolation region (IS2) directly contacts the insulating barrier (80) and the conductive filling film (81) of the first isolation region (82), and the contact region (120b) directly contacts the conductive filling film (81) of the first isolation region (82) Kao and Kim141 fail to disclose the contact region direct contacts the insulating barrier of the first isolation region, and a length of the second isolation region in a vertical direction from the rear surface is less than a length of the contact region in the vertical direction from the rear surface. In the similar field of endeavor of image sensors, Fig. 4 of Kim449 discloses the contact region (CL) direct contacts the insulating barrier (155) of the first isolation region. It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the contact region as disclosed by Kim, to improve dark current (see Kim, ¶ [0063]). Kim449 fails to disclose a length of the second isolation region in a vertical direction from the rear surface is less than a length of the contact region in the vertical direction from the rear surface. In the similar field of endeavor of image sensors, Fig. 2 of Noh discloses wherein, a length of the second isolation region (124) in a vertical direction from the rear surface (110B) is less than a length of the contact region (172) in the vertical direction from the rear surface (110B). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the contact region as disclosed by Noh, to provide a conductive pathway through the substrate (see Noh, ¶ [0053]). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kao (US 20220223635 A1), Kim449 (US 20200227449 A1), and Kim141 (US 20190229141 A1) in further view of Yoon et al. (US 20150372031 A1) herein after “Yoon”. Regarding claim 9, Kao, Kim449 and Kim141 together disclose the image sensor of claim 8 as applied above, but the combination fails to disclose wherein a first width of the first isolation region measured in a first horizontal direction is less than a second width of the second isolation region measured in the first horizontal direction. In the similar field of endeavor of image sensors, Fig. 12C of Yoon discloses wherein a first width (Fig. 12C, width W1, ¶ [0077]) of the first isolation region (Fig. 12C, first deep trench isolation layer 7, ¶ [0057]) measured in a first horizontal direction is less than a second width (Fig. 12C, width W2, ¶ [0077]) of the second isolation region (Fig. 12C, second deep trench isolation layer 11, ¶ [0057]) measured in the first horizontal direction (Fig. 12C, “the width W1 of the first deep trench isolation layer 7 may be less than the width W2 of the second deep trench isolation layer 11”, ¶ [0077]). It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the image sensor of Kao with the widths as disclosed by Yoon, to improve reproducibility (see Yoon, ¶ [0072]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORALIE NETTLES whose telephone number is (571)270-5374. The examiner can normally be reached Mon-Fri. 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.A.N./Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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Prosecution Timeline

Show 1 earlier event
Sep 15, 2025
Non-Final Rejection mailed — §103
Nov 05, 2025
Applicant Interview (Telephonic)
Nov 05, 2025
Examiner Interview Summary
Dec 11, 2025
Response Filed
Feb 05, 2026
Final Rejection mailed — §103
Mar 31, 2026
Request for Continued Examination
Apr 07, 2026
Response after Non-Final Action
Jun 08, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
68%
Grant Probability
99%
With Interview (+31.7%)
3y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
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