Prosecution Insights
Last updated: July 17, 2026
Application No. 18/081,137

INFORMATION HANDLING SYSTEM HAVING EXPANDABLE AND ADAPTABLE BATTERY MODULES

Non-Final OA §103§112
Filed
Dec 14, 2022
Examiner
CRUM, GAGE STEPHEN
Art Unit
2841
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Dell Products L.P.
OA Round
4 (Non-Final)
56%
Grant Probability
Moderate
4-5
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 56% of resolved cases
56%
Career Allowance Rate
101 granted / 180 resolved
-11.9% vs TC avg
Strong +30% interview lift
Without
With
+30.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
25 currently pending
Career history
219
Total Applications
across all art units

Statute-Specific Performance

§103
93.5%
+53.5% vs TC avg
§102
3.2%
-36.8% vs TC avg
§112
3.3%
-36.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 180 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendments filed January 20, 2026 have been entered. Applicant’s amendments have overcome each and every claim objection and 112(b) rejection previously set forth in the Non-Final Action mailed January 20, 2026. Claims 1-4, 6-13, and 15-20 remain pending, but stand rejected for the reasons detailed below. Response to Arguments Applicant's arguments filed January 20, 2026 have been fully considered but they are not persuasive. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). As an overview: Liao is cited to teach an information handling system with a first battery pack and a battery pack extension. Latella is cited to teach the specific electrical contacts between the first battery pack and the battery pack extension. Dobson is cited to teach the first battery pack and the battery pack extension each having a BMU, where control circuitry is configured to switch the first battery pack and battery pack extension in series or parallel via communication with the BMUs. Wang is simply cited to teach battery control circuitry being located on a motherboard. Applicant argues the prior art only teaches battery cells, not battery packs (Arguments, pages 8-10). However, a battery pack is simply a collection of one or more batteries in a casing configured to supply electrical energy. Applicant’s specification does not provide a specific definition requiring a “battery pack” to have a plurality of battery cells. Therefore, Examiner is forced to take a broadest reasonable interpretation of a “battery pack.” Examiner submits Liao teaches battery packs 134, 136 necessarily having at least one cell configured to supply energy, and further suggests where these battery packs include a plurality of cells (see Paragraphs [0038]-[0039]). But regardless, Latella explicitly teaches battery packs having a plurality of cells (see Figure 10). For these reasons, Examiner maintains, under a BRI, that at least Liao and Latella teach battery packs, and disagrees with the assertion that none of the prior art teaches “battery packs.” Applicant acknowledges Dobson teaches batteries being combined dynamically in serries and in parallel, but argues the batteries in Dobson are battery cells, not battery packs (Arguments, page 9). Under the definition and reasoning provided above, Examiner submits a single-cell battery can be interpreted as a battery pack under BRI. But regardless, Examiner notes the battery monitoring units and control circuitry of Dobson are being combined to the battery packs of Liao as previously modified by Latella. Thus, the combination of references results in the battery monitoring units, from Dobson, being combined to the battery packs, from Liao as modified by Latella. Applicant also argues cell monitoring units 2 in Dobson cannot be interpreted as BMUs (Arguments, pages 9). Examiner disagrees, considering Paragraphs [0029]-[0051] of Dobson explicitly teaches battery cell monitoring units 2 communicating with controller 7 via control bus 8 to switch batteries between parallel and series configurations. For these reasons, claims 1-4, 6-13, and 15-20 stand rejected. Claim Objections Claims 8 and 18 are objected to because of the following informalities: In claim 8, line 8, “the first battery” should read --the first battery pack--. In claim 18, line 2-3, “and motherboard” should read --and the motherboard--. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(d): (d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph: Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. Claim 16 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claim 16 depends on canceled claim 14. For the purposes of examination, claim 16 will be treated as being dependent on claim 10. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 6, 10-11, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (US Publication No. 2013/0164588) in view of Latella (US Patent No. 5738954), Dobson (US Publication No. 2010/0289447), and Wang (US Publication No. 2017/0063108). Regarding claim 1, Liao discloses an information handling system comprising: a housing (Figures 1-2, base 118) having an interior (within 118); a motherboard (motherboard 119) coupled to the housing (118) in the interior (within 118); a first battery pack (first battery unit 134a) disposed on the housing (118) in the interior (within 118) and interfaced with the motherboard (119; through contacts 150; Paragraph [0030], “the first battery unit 134 a and the third battery unit 134 b are electrically connected with the motherboard 119 via the electrical connector 150”), and a battery pack extension (second battery unit 136a) packaged separate from the first battery pack (134a) and disposed on the housing (118) in the interior (within 118). Liao does not disclose the first battery pack having contacts exposed on an upper surface; and a battery pack extension disposed on the housing in the interior and interfaced with the first battery pack by contacts exposed on a lower surface that rest on the first battery pack contacts. However, Latella teaches an information handling system (portable device 100) comprising: a first battery pack (battery 104) interfaced with a motherboard (transceiver circuitry; through contacts 201), the first battery pack (104) having contacts (contacts 246) exposed on an upper surface (surface 242); and a battery pack extension (battery pack 102) interfaced with the first battery (104) by contacts (flat contacts 401) exposed on a lower surface (surface 400) that rest on the first battery contacts (246; see Figure 17). Because the first and second batteries in Liao are stacked similar to the first and second batteries of Latella and because Liao discloses connecting the first battery to the motherboard through similar battery contacts, it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the first and second batteries of Liao for the first and second batteries of Latella, according to known methods to yield the predictable results of connecting a plurality of stacked batteries to an information handling system (see Figure 4 in Liao; see Figure 2 and 10 in Latella). Liao in view of Latella does not teach wherein the battery pack extension is a programmable parallel/series battery pack extension, the first battery pack having a first battery management unit (BMU) and the programmable parallel/series battery pack extension having a second BMU, the motherboard communicating battery configurations to the first battery pack and the programmable parallel/series battery pack extension in series managed with the first and second BMU, the battery configurations including power transfer from the first battery pack and the programmable parallel/series battery pack extension to the motherboard at a first voltage with a parallel interface of the first battery pack and the programmable parallel/series battery pack extension and at a second voltage with a series interface of the first battery pack and the programmable parallel/series battery pack extension. However, Dobson teaches the first battery pack (first battery 1) having a first battery management unit (BMU) (first cell monitoring circuit 2) and the programmable parallel/series battery pack extension (second battery 1) having a second BMU (second cell monitoring circuit 2), control circuitry (comprised of control bus 8, controller 7, load 6) communicating battery configurations (via 7) to the first battery pack (second 1) and programmable parallel/series battery pack extension (second 1) in series managed with the first and second BMU (first and second 2), the battery configurations including power transfer from the first battery pack (first 1) and the programmable parallel/series battery pack extension (second 1) to the control circuitry (comprised of control bus 8, controller 7, load 6) at a first voltage with a parallel interface of the first battery pack (first 1) and the programmable parallel/series battery pack extension (second 1) and at a second voltage with a series interface of the first battery pack (first 1) and the programmable parallel/series battery pack extension (second 1) (Paragraphs [0029]-[0051], battery cell monitoring circuits 2 communicating with controller 7 via control bus 8 to switch batteries between parallel and series configurations). Because Dobson also teaches the battery control system being incorporated into a mobile electronic device (see Paragraph [0052]), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the battery management system of Dobson to the information handling system of Liao as modified by Latella. Doing so would have optimized power consumption by allowing the information handling system to switch the batteries between series and parallel configurations based on the various conditions of operation (see Paragraphs [0007] and [0031] in Dobson). Liao in view of Latella and Dobson does not explicitly teach the control circuitry being located on a motherboard, a processor coupled to the motherboard and operable to execute instructions that process information; a memory coupled to the motherboard and interfaced with the processor, the memory operable to store the instructions and information. However, Wang teaches an information handling system comprising a first battery pack (comprised of battery cell 202a, switches 204a, 206a, and cell charger/discharger 214a), a battery pack extension (comprised of battery cell 202b, switches 204b, 206b, and cell charger/discharger 214b), a motherboard (Figure 1, motherboard 101), a processor (processor 103) coupled to the motherboard (101) and operable to execute instructions that process information (see Paragraph [0022]); a memory (memory 104) coupled to the motherboard (101) and interfaced with the processor (103), the memory (104) operable to store the instructions and information (see Paragraph [0023]), the first battery pack (202a, 204a, 206a, 214a) having a first battery management unit (BMU) (214a), the battery pack extension (202b, 204b, 206b, 214b) having a second BMU (214b), and the motherboard (101) communicating battery configurations (via controller 106, corresponding to controller 7 in Dobson; see Paragraph [0030]) to the first battery pack (202a, 204a, 206a, 214a) and battery pack extension (202b, 204b, 206b, 214b) in series managed with the first and second BMU (214a, 214b; see Paragraphs [0029]-[0036]) Because Liao also discloses a motherboard (119), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have arranged the control circuitry of Liao as modified by Latella and Dobson on the motherboard of Liao as modified by Latella and Dobson, as taught in Wang, according to known methods to yield the predictable results of connecting control circuitry to a plurality of batteries, and considering it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); MPEP § 2144.04(VI)(C). Doing so would have also simplified assembly of the information handling system by allowing a single motherboard to provide structural support for various electronic components, including the battery control circuitry, of the system (see Paragraphs [0021]-[0028] in Wang). It would have also been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the processor and memory of Wang to the motherboard of Liao as modified by Latella and Dobson. Doing so would have allowed the motherboard to store information and execute operations based on the stored information (see Paragraphs [0022]-[0023] in Wang). Regarding claim 2, Liao in view of Latella, Dobson, and Wang teaches the information handling system of Claim 1, and further teaches (in Latella) wherein: the programmable parallel/series battery pack extension contacts (Figures 10 and 17, contacts 401) comprise plural contact pads (401 being “flat contacts”; see Figure 17); and the first battery pack contacts (retractable contacts 246) comprise plural spring fingers (246 being “retractable contacts”; see Figure 17) extending up towards the contact pads (401; see Figure 17). Regarding claim 6, Liao in view of Latella, Dobson, and Wang teaches the information handling system of Claim 1, further comprising (in Dobson) an embedded controller (microcontroller 7, corresponding to controller 106 in Wang) coupled to the motherboard (119 in Liao, as taught in Wang) and interfaced with the first battery management unit (2) to command parallel and series battery configuration based upon operating conditions of the information handling system (see Paragraphs [0029]-[0051]). Regarding claim 10, Liao discloses a method for assembly of an information handling system, the method comprising: coupling a motherboard (Figure 2, motherboard 119) to a housing (base 118) in the housing interior (within 118); placing a first battery pack (first battery unit 134a) in the housing interior (within 118) interfaced with the motherboard (119, through connector 150; see Paragraph [0030]); placing a battery pack extension (second battery unit 136a) in the housing interior (within 118). Liao does not disclose placing a battery pack extension to have contacts of the battery pack extension directly interface with contacts of the first battery pack; and configuring discharge from the first battery pack and the battery pack extension with a battery management unit of the first battery pack. However, Latella teaches placing a battery pack extension (battery pack 102) to have contacts (flat contacts 401) of the battery pack extension (102) directly interface with contacts (246) of the first battery pack (battery apparatus 104; see Figures 10, 17) (see col. 16, ln. 15-37). Because the first and second batteries in Liao are stacked similar to the first and second batteries of Latella and because Liao discloses connecting the first battery to the motherboard through similar battery contacts to Latella, it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the first and second batteries of Liao for the first and second batteries of Latella to allow for the methods of connecting the first and second batteries and allowing the first and second batteries to supply power for the system, according to known methods to yield the predictable results of connecting a plurality of stacked batteries to an information handling system (see Figure 4 in Liao; see Figure 2 and 10 in Latella). Liao in view of Latella does not teach wherein the battery pack extension is a programmable parallel/series battery pack extension, the first battery pack having a first battery management unit (BMU); the programmable parallel/series battery pack extension having a second BMU; and configuring discharge from the first battery pack and the programmable parallel/series battery pack extension with communication from the motherboard to the first battery pack and the programmable parallel/series battery pack extension in series managed with the first and second BMUs. However, Dobson teaches a first battery pack (first battery 1) having a first battery management unit (BMU) (first battery cell monitoring circuit 2); the programmable parallel/series battery pack extension (second battery 1) having a second BMU (second battery cell monitoring circuit 2); and configuring discharge from the first battery pack (first 1) and the programmable parallel/series battery pack extension (second 1) with communication from the control circuitry (comprised of control bus 8, controller 7, load 6) to the first battery pack (first 1) and the programmable parallel/series battery pack extension (second 1) in series managed with the first and second BMUs (first and second 2, via control bus 8 and controller 7; see Paragraphs [0029]-[0051]) to selectively transfer power to the control circuitry (comprised of control bus 8, controller 7, load 6) in series or parallel (see Paragraphs [0029]-[0051]). Because Dobson also teaches the battery control system being incorporated into a mobile electronic device (see Paragraph [0052]), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the battery management system of Dobson to the information handling system of Liao as modified by Latella. Doing so would have optimized power consumption by allowing the information handling system to switch the batteries between series and parallel configurations based on the various conditions of operation (see Paragraphs [0007] and [0031] in Dobson). Liao in view of Latella and Dobson does not explicitly teach wherein the control circuitry is located on a motherboard. However, Wang teaches an information handling system comprising a first battery (comprised of battery cell 202a, switches 204a, 206a, and cell charger/discharger 214a), a programmable parallel/series battery pack extension (comprised of battery cell 202b, switches 204b, 206b, and cell charger/discharger 214b), and a motherboard (motherboard 101), the first battery pack (202a, 204a, 206a, 214a) having a first battery management unit (BMU) (214a), the programmable parallel/series battery pack extension (202b, 204b, 206b, 214b) having a second BMU (214b), and configuring discharge (via controller 106; see Paragraph [0030]) of the first battery pack (202a, 204a, 206a, 214a) and the programmable parallel/series battery pack extension (202b, 204b, 206b, 214b) with communication from the motherboard (101) to the first battery pack (202a, 204a, 206a, 214a) and the programmable parallel/series battery pack extension (202b, 204b, 206b, 214b) in series managed with the first and second BMU (214a, 214b; see Paragraphs [0029]-[0036]) to selectively transfer power to the motherboard (101) in series or parallel (see Paragraphs [0029]-[0036]). Because Liao also discloses a motherboard (119), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have arranged the control circuitry of Liao as modified by Latella and Dobson on the motherboard of Liao as modified by Latella and Dobson, as taught in Wang, according to known methods to yield the predictable results of connecting control circuitry to a plurality of batteries, and considering it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); MPEP § 2144.04(VI)(C). Doing so would have also simplified assembly of the information handling system by allowing a single motherboard to provide structural support for various electronic components, including the battery control circuitry, of the system (see Paragraphs [0021]-[0028] in Wang). Because Latella similarly discloses a battery management unit (BMU) and switches within the first battery, it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the first and second batteries of Liao as previously modified by Latella, Dobson, and Wang such that the controller was capable of selectively configuring the first and second batteries in series or in parallel based on metrics communicated between the first and second BMUs, as taught in Dobson. Doing so would have optimized the power efficiency by allowing the system to adjust the power output from the first and second batteries based on the power needs of the information handling system (see Paragraphs [0007] and [0031] in Dobson). Regarding claim 11, Liao in view of Latella, Dobson, and Wang teaches the method of Claim 10, further comprising (in Liao): coupling a housing cover (comprised of keyboard module 112 and upper cover 114) to the housing (118) over the first battery pack (134a, 136a, as modified by Latella and Dobson) and the motherboard (119); and aligning a first member (tray 132) extending down from the housing cover (112, 114, where walls of 132 extends downward relative to 112, 114) to engage the first battery pack (134a) to retain the first battery pack (134a) in position (through engagement with 132a). Regarding claim 17, Liao discloses a battery assembly comprising: a housing (Figure 2, base 118) having an interior (within 118); a motherboard (motherboard 119) disposed in the housing (118); and a first battery pack (first battery unit 134a) disposed on the housing (118) in the interior (within 118) and interfaced (through connector 150; see Paragraph [0030]) with the motherboard (119), the first battery pack (134a); and a battery pack extension (second battery 136a) disposed on the housing (118) in the interior (within 118). Liao does not disclose the first battery pack having contacts exposed on an upper surface; and a battery pack extension interfaced with the first battery pack by contacts exposed on a lower surface that rest on the first battery pack contacts. However, Latella teaches an information handling system (portable device 100) comprising: a first battery pack (battery 104) interfaced with a motherboard (transceiver circuitry; through contacts 201), the first battery pack (104) having contacts (contacts 246) exposed on an upper surface (surface 242); and a battery pack extension (battery pack 102) interfaced with the first battery pack (104) by contacts (flat contacts 401) exposed on a lower surface (surface 400) that rest on the first battery pack contacts (246; see Figure 17). Because the first and second batteries in Liao are stacked similar to the first and second batteries of Latella and because Liao discloses connecting the first battery to the motherboard through similar battery contacts, it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the first and second batteries of Liao for the first and second batteries of Latella, according to known methods to yield the predictable results of connecting a plurality of stacked batteries to an information handling system (see Figure 4 in Liao; see Figure 2 and 10 in Latella). Liao in view of Latella does not teach wherein the battery pack extension is a programmable parallel/series battery pack extension, the first battery having a first battery management unit (BMU); the second battery having a second BMU in communication with the first BMU through the contacts, the motherboard communicating commands to the first BMU and second BMU in series to coordinate power transfer out of the first battery and second battery to the motherboard. However, Dobson teaches a first battery pack (first battery 1) having a first battery management unit (BMU) (first battery cell monitoring circuit 2); a programmable parallel/series battery pack extension (second battery 1) having a second BMU (second battery cell monitoring circuit 2) in communication with the first BMU (first 2) through the contacts (bus 8, corresponding to connection between 246 and 401 in Latella), the control circuitry (comprised of controller 7 and load 6) communicating commands to the first BMU (first 2) and second BMU (second 2) in series to coordinate power transfer out of the first battery pack (first 1) and the programmable parallel/series battery pack extension (second 1) to the control circuitry (comprised of controller 7 and load 6) (see Paragraphs [0029]-[0051]). Because Dobson also teaches the battery control system being incorporated into a mobile electronic device (see Paragraph [0052]) and because Latella also teaches a battery management module in the first battery communicating through the battery contacts (see col. 16, ln. 15-37 and Figure 10 in Latella), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the battery management system of Dobson to the batteries of Liao as modified by Latella. Doing so would have optimized power consumption by allowing the information handling system to switch the batteries between series and parallel configurations based on the various conditions of operation (see Paragraphs [0007] and [0031] in Dobson). Liao in view of Latella and Dobson does not explicitly teach wherein the control circuitry is located on a motherboard. However, Wang teaches an information handling system comprising a first battery (comprised of battery cell 202a, switches 204a, 206a, and cell charger/discharger 214a), a second battery (comprised of battery cell 202b, switches 204b, 206b, and cell charger/discharger 214b), and a motherboard (motherboard 101), the first battery pack (202a, 204a, 206a, 214a) having a first battery management unit (BMU) (214a), a programmable parallel/series battery pack extension (202b, 204b, 206b, 214b) having a second BMU (214b), and the motherboard (101) communicating commands (via controller 106; see Paragraph [0030]) to the first BMU (214a) and second BMU (214b) in series to coordinate power transfer out of the first battery pack (202a, 204a, 206a, 214a) and the programmable parallel/series battery pack extension (202b, 204b, 206b, 214b) to the motherboard (101; see Figure 1 and Paragraphs [0029]-[0036]). Because Liao also discloses a motherboard (119), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have arranged the control circuitry of Liao as modified by Latella and Dobson on the motherboard of Liao as modified by Latella and Dobson, as taught in Wang, according to known methods to yield the predictable results of connecting control circuitry to a plurality of batteries, and considering it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); MPEP § 2144.04(VI)(C). Doing so would have also simplified assembly of the information handling system by allowing a single motherboard to provide structural support for various electronic components, including the battery control circuitry, of the system (see Paragraphs [0021]-[0028] in Wang). Claims 3-4 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (US Publication No. 2013/0164588), Latella (US Patent No. 5738954), Dobson (US Publication No. 2010/0289447), Wang (US Publication No. 2017/0063108), and in further view of Wei (US Patent No. 9219322). Regarding claim 3, Liao in view of Latella, Dobson, and Wang teaches the information handling system of Claim 1, further comprising (in Liao): a battery connector (connector 150) coupled to the housing (118) between the motherboard (119) and the first battery pack (134a, corresponding to 104 in Latella), first battery pack (134a) resting on the battery connector (150) to communicate power (see Paragraph [0030], [0033]); and a housing cover (comprised of housing portion of 112, upper cover 114, and tray 132) coupled to the housing (118) over the motherboard (119), the first battery pack (134a, as modified by Latella and Dobson) and the programmable parallel/series battery pack extension (136a, as modified by Latella and Dobson), the housing cover (112, 114, 132) having a first member (first fixing portion 132a of 132 connected to 134a) that extends into the housing interior (within 118) to engage the first battery pack (134a; see Figure 4) and retain the first battery pack (134a; see Paragraph [0027]). Liao in view of Latella, Dobson, and Wang does not explicitly teach the motherboard resting on the battery connector. However, Wei teaches a battery connector (Figures 5-8, leaf spring connector 114) interfacing a first battery pack (component 253; see col. 2, ln. 52) and motherboard (PCB 120), the motherboard and the first battery pack (253) resting on the battery connector (114). It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the connection between the motherboard and battery connector of Liao as modified by Latella, Dobson, and Wang for the connection taught in Wei, according to known methods to yield the predictable results of electrically connecting a motherboard to a battery through a connector. Doing so would have also provided for a slimmer connection means between the motherboard and battery (see col. 2, ln. 1-39 in Wei). Liao in view of Latella, Dobson, and Wang does not expressly teach wherein the battery connector is capable of communicating power and information. However, Latella further teaches wherein a battery connector (contacts 201) is capable of communicating power (Figure 10, through positive and negative terminal 1003, 1007) and information (through thermistor sense terminal 1005 and Hi-Cap positive terminal 1001; see col. 8, ln. 14-42). Because Liao, Wei, and Latella all teach similarly configured connectors, it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the connector of Liao as modified by Latella, Dobson, Wang, and Wei to include the information terminals taught in Latella. Doing so would have improved the safety and efficiency of the system by allowing the system to monitor the temperature and charging/discharging status of the battery cells (see col. 8, ln. 14-42 in Latella). Regarding claim 4, Liao in view of Latella, Dobson, Wang, and Wei teaches the information handling system of Claim 3, further comprising (in Liao) a second member (battery cover 138) extending from the housing cover (112, 114, 132) into the interior (within 118) to engage the programmable parallel/series battery pack extension (136a, corresponding to 102 in Latella) and retain the programmable parallel/series battery pack extension (136a) in position (see Paragraph [0035]). Regarding claim 18, Liao in view of Latella, Dobson, and Wang teaches the battery assembly of Claim 17, further comprising: a battery connector (electrical connector 150 in Liao) coupled to the housing (118) and interfacing the first battery pack (134a, as modified by Latella and Dobson; see Paragraph [0030] in Liao) and the motherboard (119; see Paragraph [0030] in Liao) with contact pads (flat contacts 701 in Latella) disposed on the bottom side of the first battery pack (bottom side of 134a, as modified by Latella and Dobson); a housing cover (device body 110) coupled over the motherboard (119) and the first battery pack (134a, as modified by Latella and Dobson); and a member (tray 132) extending from the housing cover (110) to engage the first battery pack (134a, as modified by Latella) and retain the first battery pack in position (see Figure 4 and Paragraph [0035]). Liao in view of Latella, Dobson, and Wang does not explicitly teach the battery connector interfacing the motherboard with contact pads disposed on the bottom side of the motherboard. However, Wei teaches a battery connector (Figures 5-8, leaf spring connector 114) interfacing a first battery pack (component 253) and the motherboard (PCB 120) with contact pads (conductive traces 128) disposed on the bottom side (side 124) of the motherboard (120; see Figure 8). It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have substituted the connection between the motherboard and battery connector of Liao as modified by Latella, Dobson, and Wang for the connection taught in Wei, according to known methods to yield the predictable results of electrically connecting a motherboard to a battery through a connector. Doing so would have also provided for a slimmer connection means between the motherboard and battery (see col. 2, ln. 1-39 in Wei). Claims 7 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (US Publication No. 2013/0164588), Latella (US Patent No. 5738954), Dobson (US Publication No. 2010/0289447), Wang (US Publication No. 2017/0063108), and in further view of Partiwala (US Publication No. 2021/0210961). Regarding claim 7, Liao in view of Latella, Dobson, and Wang teaches the information handling system of Claim 6, but does not teach wherein the embedded controller adjusts processor speed based upon whether the first battery pack and the programmable parallel/series battery pack extension have the parallel or series battery configuration. However, Partiwala teaches an embedded controller (battery control 806) coupled to the motherboard (119 in Liao, corresponding to substrate connected to 804 in Partiwala) and interfaced (electrically interfaced) with the battery management unit (802) to command parallel and series battery configurations (see Paragraph [0033]) based upon operating conditions of the information handling system (see Paragraphs [0024]-[0038]), and wherein the embedded controller (806) adjusts processor speed based upon whether the first battery pack and the programmable parallel/series battery pack extension (see Figures 5-6) have the parallel or series battery configuration (Paragraphs [0029], [0033], [0048]-[0049], battery manager 604 capable of adjusting clock frequency of the processor by configuring batteries to be in series or parallel based on circuitry measurements). Because Dobson also contemplates switching between a series and parallel configuration based on different operating conditions (see Paragraphs [0007] and [0031] in Dobson), and because Wang also teaches the control circuitry being connected to the processor of the motherboard (see Figure 1 and Paragraph [0030] in Wang), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the capabilities of the controller in Partiwala to the controller of Liao as modified by Latella, Dobson, and Wang to allow for the method of switching the batteries in series or in parallel based on the processor operating conditions. Doing so would have provided the necessary instructions and operations for configuring the first and second batteries in parallel or in series based on power limits and efficiency standards (see Paragraph [0033] in Partiwala). Regarding claim 15, Liao in view of Latella, Dobson, and Wang teaches the method of Claim 10, but does not teach further comprising monitoring with an embedded controller of the motherboard operating conditions of the central processing unit; and commanding, with an embedded controller configuration, the first battery management unit to place the first battery pack and the programmable parallel/series battery pack extension in parallel or in series based upon operating conditions of the central processing unit However, Partiwala teaches monitoring with an embedded controller (battery controller 806) of the motherboard (substrate connected to processor 806, corresponding to motherboard 119 in Liao) operating conditions of the central processing unit (Figure 8, circuitry measurements; Paragraphs [0029], [0033], [0048], [0049], battery manager 604 adjusting clock frequency of the processor by configuring batteries to be in series or parallel based on circuitry measurements); and commanding with an embedded controller (806) configuration, the first battery management unit (processor 802) to place the first battery pack and the programmable parallel/series battery pack extension (battery cells 602; see Figures 5-6) in parallel and in series based upon operating conditions of the central processing unit (see Paragraphs [0029], [0033], [0048], [0049]). Because Dobson also contemplates switching between a series and parallel configuration based on different operating conditions (see Paragraphs [0007] and [0031] in Dobson), and because Wang also teaches the control circuitry being connected to the processor of the motherboard (see Figure 1 and Paragraph [0030] in Wang), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the capabilities of the controller in Partiwala to the controller of Liao as modified by Latella, Dobson, and Wang to allow for the method of switching the batteries in series or in parallel based on the processor operating conditions. Doing so would have provided the necessary instructions and operations for configuring the first and second batteries in parallel or in series based on power limits and efficiency standards (see Paragraph [0033] in Partiwala). Regarding claim 16, Liao in view of Latella, Dobson, and Wang teaches the method of Claim 10, but does not teach monitoring with the first battery management unit operating conditions of the first battery pack and the programmable parallel/series battery pack extension; and commanding with the first battery management unit adjustments by an embedded controller of operating conditions of the central processing unit. However, Partiwala teaches monitoring with the first battery management unit (processor 802) operating conditions of the first battery pack and the programmable parallel/series battery pack extension (battery cells 602; see Figures 5-6); and commanding with the first battery management unit (802) adjustments by an embedded controller (battery control 806) of operating conditions of the central processing unit (Paragraphs [0029], [0033], [0048], [0049], based on circuitry measurements such as clock frequency of the general-purpose processor). Because Dobson also contemplates switching between a series and parallel configuration based on different operating conditions (see Paragraphs [0007] and [0031] in Dobson), and because Wang also teaches the control circuitry being connected to the processor of the motherboard (see Figure 1 and Paragraph [0030] in Wang), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the capabilities of the controller in Partiwala to the controller of Liao as modified by Latella, Dobson, and Wang to allow for the method of switching the batteries in series or in parallel based on the processor operating conditions. Doing so would have provided the necessary instructions and operations for configuring the first and second batteries in parallel or in series based on power limits and efficiency standards (see Paragraph [0033] in Partiwala). Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (US Publication No. 2013/0164588), Latella (US Patent No. 5738954), Dobson (US Publication No. 2010/0289447), Wang (US Publication No. 2017/0063108), and in further view of Luo (US Publication No. 2008/0203817) and Horiuchi (US Publication No. 2001/0029128). Regarding claim 8, Liao in view of Latella, Dobson, and Wang teaches the information handling system of Claim 1, further comprising (in Liao): a housing cover (comprised of housing portion of keyboard module 112 and upper cover 114) coupled over the interior (within 118); a keyboard (keyboard portion of 112) coupled to the housing cover (112). Liao in view of Latella, Dobson, and Wang does not explicitly teach a keyboard connector interface aligned to interface with a keyboard connector of the motherboard; and a battery pin in the keyboard connector interface and referenced by the first battery to detect coupling of the housing cover to the housing, the first battery management unit of the first battery pack restricting battery operation when the housing cover is not detected coupled to the housing. However, Luo teaches a keyboard connector interface (connector 202b) of the housing cover (220) aligned to interface with a keyboard connector (connector 202a) of the motherboard (Figure 1, circuitry 218); and a battery pin (connection detection pin 264) in the keyboard connector interface (202b) and referenced by the first battery (battery pack 252) to detect coupling of the housing cover (220) to the housing (information handling system 210), the first battery management unit (enable circuit 610) of the first battery pack (252) restricting battery operation when the housing cover (220) is not detected coupled to the housing (210; see Paragraphs [0021]-[0023]). It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the keyboard connector interface, keyboard connector, and BMU capabilities of Luo to the housing cover, motherboard, and first BMU in the first battery of Liao as modified by Latella, Dobson, and Wang, respectively. Doing so would have allowed the motherboard and keyboard to communicate information and power when the cover is coupled to the housing (see Paragraph [0021]-[0023] in Luo). Liao in view of Latella, Dobson, Wang, and Luo does not teach a keyboard connector interface exposed at a bottom side of the housing cover, and a keyboard connector exposed at an upper side of the motherboard. However, Horiuchi teaches a keyboard connector interface (connector 36) exposed at a bottom side (see Figure 4) of the housing cover (keyboard unit 14), and a keyboard connector (connector 24) exposed at an upper side (see Figures 2-3) of the motherboard (motherboard 28). It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the keyboard connector and keyboard connector interface to be located on the bottom side of the housing cover and the upper side of the motherboard, as taught in Horiuchi according to known methods to yield the predictable results of connecting a keyboard to a motherboard, and considering it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); MPEP § 2144.04(VI)(C). Doing so would have also provided for a more simplified and reliable connection between the keyboard and the motherboard (see Paragraphs [0008]-[0014] in Horiuchi). Regarding claim 9, Liao in view of Latella, Dobson, Wang, Luo, and Horiuchi teaches the information handling system of Claim 8, and further teaches (in Liao) wherein the first battery pack and the programmable parallel/series battery pack extension (134a, 136a, as modified by Latella and Dobson) lift free from the housing interior (within 118) when the housing cover (112, 114) is removed (see Figures 2-4). Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (US Publication No. 2013/0164588), Latella (US Patent No. 5738954), Dobson (US Publication No. 2010/0289447), Wang (US Publication No. 2017/0063108), and in further view of Homer (US Publication No. 2008/0055827). Regarding claim 12, Liao in view of Latella, Dobson, and Wang teaches the method of Claim 11, but does not teach further comprising: interfacing a keyboard connector interface of the housing cover with a keyboard connector of the motherboard; detecting the interfacing with the first battery management unit of the first battery pack; and commanding the motherboard to power down from the first battery management unit when a separation of the keyboard connector interface and the keyboard connector is detected. However, Homer teaches a method comprising: interfacing a keyboard connector interface (Paragraph [0023], portion of keyboard 42 connected to latch 140) of a housing cover (42) with a keyboard connector (actuator 114, including 140) of a motherboard (circuitry within computer housing 18, corresponding to motherboard 119 in Liao); detecting the interfacing (connection between hook member 140 and keyboard 42) with the first battery management unit (power controller 154) of the first battery pack (Paragraph [0007], battery connected to power controller 154); and commanding the motherboard (components on motherboard, corresponding to 119 in Liao) to power down from the first battery management unit (154) when a separation of the keyboard connector (114) interface (114) and the keyboard connector (portion of keyboard 42 connected to 140) is detected . Because Latella also teaches a battery management module in the first battery (see col. 16, ln. 15-37), it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the connector interfaces of Homer to the housing cover and motherboard of Liao as modified by Latella, Dobson, and Wang, and to have combined the BMU capabilities of Homer to the BMU of Liao as modified by Latella, Dobson, and Wang. Doing so would have protected the internal components connected to the motherboard from potential damage by ensuring no power was supplied to the motherboard and its components while accessible to a user due to the keyboard/housing cover being removed (see Paragraph [0007] in Homer). Regarding claim 13, Liao in view of Latella, Dobson, Wang, and Homer teaches the method of Claim 12, further comprising (in Liao): aligning a second member (battery cover 183) extending down from the housing cover (112, 114) to engage the programmable parallel/series battery pack extension (136a) to retain the programmable parallel/series battery pack extension (136a) in position (see Paragraph [0035] and Figures 2-4). Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (US Publication No. 2013/0164588), Latella (US Patent No. 5738954), Dobson (US Publication No. 2010/0289447), Wang (US Publication No. 2017/0063108), Wei (US Patent No. 9219322), and in further view of Luo (US Publication No. 2008/0203817) and Horiuchi (US Publication No. 2001/0029128). Regarding claim 19, Liao in view of Latella, Dobson, Wang, and Wei teaches the battery assembly of Claim 18, further comprising: a keyboard (keyboard of keyboard module 112 in Liao) coupled to the housing cover (110 in Liao); and the first battery management unit (2 in Dobson). Liao in view of Latella, Dobson, Wang, and Wei does not teach the keyboard having a membrane, the membrane including a printed circuit board with a connector interface to interface with a keyboard connector of the motherboard; and the first battery management unit interfaced with the keyboard through the keyboard connector to detect presence and absence of the housing cover. However, Luo teaches the keyboard (keyboard system 220) having a membrane (keyboard circuitry 222), the membrane (22) including a printed circuit board (see Figure 1 and Paragraphs [0017]-[0018]) with a connector interface (connector 202b) to interface with a keyboard connector (202a) of the motherboard (circuitry 218, corresponding to 119 in Liao); and the first battery management unit (enable circuit 610) interfaced with the keyboard (220) through the keyboard connector (202a, through detect pin 264) to detect presence and absence of the housing cover (housing of 220). It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have combined the membrane, connector interface, keyboard connector, and BMU capabilities of Luo to the keyboard, housing cover, motherboard, and BMU in the first battery of Liao as modified by Latella, Dobson, Wang, and Wei, respectively. Doing so would have allowed the motherboard and keyboard to communicate information and power (see Paragraph [0021]-[0023] in Luo). Liao in view of Latella, Dobson, Wang, Wei, and Luo does not teach a connector interface that folds to a bottom side of the housing cover to align the connector interface with a keyboard connector of the motherboard. However, Horiuchi teaches a connector interface (Figure 4, connector 36) that folds to a bottom side (installation side 14B) of the housing cover (bottom side of keyboard unit 48) to align the connector interface (36) with a keyboard connector (connector 24) of the motherboard (motherboard 28). It would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the keyboard connector and keyboard connector interface to be located on the bottom side of the housing cover and the upper side of the motherboard, through the use of a foldable connector, as taught in Horiuchi according to known methods to yield the predictable results of connecting a keyboard to a motherboard, and considering it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); MPEP § 2144.04(VI)(C). Doing so would have also provided for a more simplified and reliable connection between the keyboard and the motherboard (see Paragraphs [0008]-[0014] in Horiuchi). Regarding claim 20, Liao in view of Latella, Dobson, Wang, Wei, Luo, and Horiuchi teaches the battery assembly of Claim 19, and further teaches (in Dobson) wherein the first battery management unit (2) selectively configures the first battery pack and the programmable parallel/series battery pack extension (first and second batteries 1, corresponding to 134a, 136a in Liao) to discharge in series and in parallel (Paragraph [0029], BMUs 2 selectively configuring batteries 1 in series or parallel based on different operating conditions detected by 2). Because Latella similarly discloses a battery management unit (BMU) and switches within the first battery, it would have been prima facie obvious to one of ordinary skill in the art before the effective file date of the claimed invention to have modified the first and second batteries of Liao as previously modified by Latella, Dobson, Wang, Wei, Luo, and Horiuchi such that the controller was capable of selectively configuring the first and second batteries in series or in parallel based on metrics communicated between the first and second BMUs, as taught in Dobson. Doing so would have optimized the power efficiency by allowing the system to adjust the power output from the first and second batteries based on the power needs of the information handling system (see Paragraphs [0007] and [0031] in Dobson). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAGE STEPHEN CRUM whose telephone number is (571)272-3373. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allen Parker can be reached at (303)297-4722. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GAGE CRUM/Examiner, Art Unit 2841 gsc
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Prosecution Timeline

Show 7 earlier events
Oct 06, 2025
Request for Continued Examination
Oct 11, 2025
Response after Non-Final Action
Oct 21, 2025
Non-Final Rejection mailed — §103, §112
Jan 20, 2026
Response Filed
May 05, 2026
Final Rejection mailed — §103, §112
Jul 01, 2026
Response after Non-Final Action
Jul 08, 2026
Applicant Interview (Telephonic)
Jul 10, 2026
Examiner Interview Summary

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