Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to Applicant’s Amendment filed 03/05/2026. Claims 1-20 are pending. Claims 1, 4-6, 8, 10-12, 14, and 15-18 have been amended. Any examiner’s note, objection, or rejection not repeated is withdrawn due to Applicant’s amendment.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/05/2026 has been entered.
Priority
Applicant’s claim for priority from foreign application no. PCT/CN2022/132533 filed 11/17/2022 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. (US 10891156 B1) in view of Kahle et al. (US 20200183842 A1), hereinafter referred to as Zhao and Kahle, respectively.
Regarding Claim 1, Zhao discloses One or more processors, comprising: circuitry (Col. 3, Lines 53-58-The processor devices 132 include central processing units (CPUs) and hardware accelerator devices such as GPUs, and other workload-optimized processors that are implemented to execute the assigned tasks for a target application (e.g., application specific integrated circuits. Please note that a processor device 132 corresponds to Applicant’s one or more processors comprising circuitry, as it is known in the art that these devices comprise one or more circuits.) to, in response to an application programming interface (API) call, cause one or more memory transactions to be performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests. Please note that system call APIs requesting memory allocation corresponds to Applicant’s cause memory transactions to be performed in response to an API call, as a memory allocation corresponds to Applicant’s memory transaction.),
Zhao does not explicitly disclose wherein the API provides one or more functions to receive tracking information for the one or more memory transactions and cause manual transaction accounting to be performed based, at least in part, on the received tracking information.
However, Kahle discloses wherein the API provides one or more functions to receive tracking information for the one or more memory transactions ([0005] An approach is disclosed that tracks memory transactions by a node.; [0071] meta-data support in system memory is used for maintaining the “Snapshot” and to track read and write accesses by the transaction; [0163] using system metadata for tracking the read and write sets of transactions to determine if the memory accesses for two or more concurrent transactions conflict; [0167] The snapshot of memory may be performed by the application or runtime using the API call; [0175] tracks the state of shared memory, when entering a transaction processing state, corresponding to one or more global virtual addresses accessed by a plurality of processing threads executing a plurality of transactions. Please note that the snapshot of memory performed using the API call that allows for snapshots that are involved in meta-data support in system memory to track read and write accesses by the transaction corresponds to Applicant’s API providing functions to receive tracking information for the memory transactions, as the API provides snapshots of memory that allow for the system to track read and write access by the transaction, i.e., receive tracking information.)
and cause manual transaction accounting to be performed based, at least in part, on the received tracking information ([0071] meta-data support in system memory is used for maintaining the “Snapshot” and to track read and write accesses by the transaction; [0081] access methods are provided by the extended memory architecture: […] An asynchronous copy method. Please note that meta-data support in system memory being used to track read and write accesses by the transaction in a system which includes access methods that may comprise an asynchronous copy method corresponds to Applicant’s manual transaction accounting being performed based on the received tracking information, as Applicant states in [0058] of the Specification that manual transaction accounting is when a user (e.g., computer program code, such as a kernel running on PPU 106) performs one or more aspects of tracking data to be asynchronously moved.).
Zhao and Kahle are both considered to be analogous to the claimed invention because they are in the same field of performing asynchronous computer requests relating to memory. Therefore, it would have been obvious to someone of ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Zhao to incorporate the teachings of Kahle to modify the asynchronous API memory transaction system to do so with the API providing functions to receive tracking information for the memory transactions and cause manual transaction accounting to be performed accordingly, allowing for improved performance and resource usage, as described in Kahle.
Regarding Claim 2, Zhao-Kahle as disclosed in Claim 1, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests; Col. 4, Lines 62-63- enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that asynchronously executing the request including system call APIs such as memory allocation requests corresponds to Applicant’s memory transactions to be asynchronously performed.).
Regarding Claim 3, Zhao-Kahle as disclosed in Claim 1, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed between a first memory and a second memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that memory allocation or data access/copy/movement requests correspond to Applicant’s memory transactions, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a memory request between memories of a GPU, i.e., with its first memory as the host and its second as the device.).
Regarding Claim 4, Zhao-Kahle as disclosed in Claim 1, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed between a global memory and a shared memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that memory allocation or data access/copy/movement requests correspond to Applicant’s memory transactions, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a copy request between memories of a GPU, i.e., with its global memory as the host and its shared memory as the device.)
Regarding Claim 5, Zhao-Kahle as disclosed in Claim 1, Zhao further discloses wherein the one or more memory transactions include one or more copy operations to be asynchronously performed between a first memory and a second memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that copy requests correspond to Applicant’s memory transactions including copy operations, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a copy request between memories of a GPU, i.e., with its first memory as the host and its second as the device.)
Regarding Claim 6, Zhao-Kahle as disclosed in Claim 1, Zhao further discloses wherein the one or more memory transactions include one or more copy operations to be asynchronously performed between a global memory and a shared memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that copy requests correspond to Applicant’s memory transactions including copy operations, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a copy request between memories of a GPU, i.e., with its global memory as the host and its shared memory as the device.)
Regarding Claim 7, Zhao-Kahle as disclosed in Claim 1, Zhao further discloses wherein in response to the API call, an indication of whether asynchronous data movement hardware is to be used to perform the one or more memory transactions is returned (Col. 10, Lines 45-50-the data coordination engine 133 may determine that the request can be immediately executed under the current resource usage and allocation. Alternatively, the data coordination engine 133 can enqueue the request, and then asynchronously execute the request. Please note that determining whether the request will alternatively be executed asynchronously corresponds to Applicant’s returning an indication of whether asynchronous data movement hardware is to be used to perform the one or more data transactions in response to an API call, as the data coordination engine 133 must return an indication in order to trigger the asynchronous execution.).
Regarding Claim 8, Zhao discloses A system, comprising: one or more processors (Col. 6, Lines 64-65-server node 200 comprises one or more central processing units 202. Please note that the server node 200 comprising central processing units 202 corresponds to Applicant’s system comprising processors.) to, in response to an application programming interface (API) call, cause one or more memory transactions to be performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests. Please note that system call APIs requesting memory allocation corresponds to Applicant’s cause memory transactions to be performed in response to an API call, as a memory allocation corresponds to Applicant’s memory transaction.),
Zhao does not explicitly disclose wherein the API provides one or more functions to receive tracking information for the one or more memory transactions and cause manual transaction accounting to be performed based, at least in part, on the received tracking information.
However, Kahle discloses wherein the API provides one or more functions to receive tracking information for the one or more memory transactions ([0005] An approach is disclosed that tracks memory transactions by a node.; [0071] meta-data support in system memory is used for maintaining the “Snapshot” and to track read and write accesses by the transaction; [0163] using system metadata for tracking the read and write sets of transactions to determine if the memory accesses for two or more concurrent transactions conflict; [0167] The snapshot of memory may be performed by the application or runtime using the API call; [0175] tracks the state of shared memory, when entering a transaction processing state, corresponding to one or more global virtual addresses accessed by a plurality of processing threads executing a plurality of transactions. Please note that the snapshot of memory performed using the API call that allows for snapshots that are involved in meta-data support in system memory to track read and write accesses by the transaction corresponds to Applicant’s API providing functions to receive tracking information for the memory transactions, as the API provides snapshots of memory that allow for the system to track read and write access by the transaction, i.e., receive tracking information.)
and cause manual transaction accounting to be performed based, at least in part, on the received tracking information ([0071] meta-data support in system memory is used for maintaining the “Snapshot” and to track read and write accesses by the transaction; [0081] access methods are provided by the extended memory architecture: […] An asynchronous copy method. Please note that meta-data support in system memory being used to track read and write accesses by the transaction in a system which includes access methods that may comprise an asynchronous copy method corresponds to Applicant’s manual transaction accounting based on the received tracking information, as Applicant states in [0058] of the Specification that manual transaction accounting is when a user (e.g., computer program code, such as a kernel running on PPU 106) performs one or more aspects of tracking data to be asynchronously moved.).
Zhao and Kahle are both considered to be analogous to the claimed invention because they are in the same field of performing asynchronous computer requests relating to memory. Therefore, it would have been obvious to someone of ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Zhao to incorporate the teachings of Kahle to modify the asynchronous API memory transaction system to do so with the API providing functions to receive tracking information for the memory transactions and cause manual transaction accounting to be performed accordingly, allowing for improved performance and resource usage, as described in Kahle.
Regarding Claim 9, Zhao-Kahle as disclosed in Claim 8, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests; Col. 4, Lines 62-63- enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that asynchronously executing the request including system call APIs such as memory allocation requests corresponds to Applicant’s memory transactions to be asynchronously performed.).
Regarding Claim 10, Zhao-Kahle as disclosed in Claim 8, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed between a first memory and a second memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that memory allocation or data access/copy/movement requests correspond to Applicant’s memory transactions, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a memory request between memories of a GPU, i.e., with its first memory as the host and its second as the device.)
Regarding Claim 11, Zhao-Kahle as disclosed in Claim 8, Zhao further discloses wherein the one or more memory transactions include one or more copy operations to be asynchronously performed between a global memory and a shared memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that copy requests correspond to Applicant’s memory transactions including copy operations, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a copy request between memories of a GPU, i.e., with its global memory as the host and its shared memory as the device.)
Regarding Claim 12, Zhao-Kahle as disclosed in Claim 8, Zhao further discloses wherein the one or more memory transactions include one or more copy operations to be asynchronously performed between a first memory and a second memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that copy requests correspond to Applicant’s memory transactions including copy operations, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a copy request between memories of a GPU, i.e., with its first memory as the host and its second as the device.)
Regarding Claim 13, Zhao-Kahle as disclosed in Claim 8, Zhao further discloses wherein in response to the API call, an indication of whether asynchronous data movement hardware is to be used to perform the one or more memory transactions is returned (Col. 10, Lines 45-50-the data coordination engine 133 may determine that the request can be immediately executed under the current resource usage and allocation. Alternatively, the data coordination engine 133 can enqueue the request, and then asynchronously execute the request. Please note that determining whether the request will alternatively be executed asynchronously corresponds to Applicant’s returning an indication of whether asynchronous data movement hardware is to be used to perform the one or more data transactions in response to an API call, as the data coordination engine 133 must return an indication in order to trigger the asynchronous execution.).
Regarding Claim 14, Zhao discloses A method (Col. 14, Lines 62-64- methods as discussed herein), comprising: receiving an application programming interface (API) call; and in response to receiving the API call, causing one or more memory transactions to be performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests. Please note that system call APIs requesting memory allocation corresponds to Applicant’s cause memory transactions to be performed in response to receiving an API call, as a memory allocation corresponds to Applicant’s memory transaction.)
Zhao does not explicitly disclose wherein the API provides one or more functions to receive tracking information for the one or more memory transactions and cause manual transaction accounting to be performed based, at least in part, on the received tracking information.
However, Kahle discloses wherein the API provides one or more functions to receive tracking information for the one or more memory transactions ([0005] An approach is disclosed that tracks memory transactions by a node.; [0071] meta-data support in system memory is used for maintaining the “Snapshot” and to track read and write accesses by the transaction; [0163] using system metadata for tracking the read and write sets of transactions to determine if the memory accesses for two or more concurrent transactions conflict; [0167] The snapshot of memory may be performed by the application or runtime using the API call; [0175] tracks the state of shared memory, when entering a transaction processing state, corresponding to one or more global virtual addresses accessed by a plurality of processing threads executing a plurality of transactions. Please note that the snapshot of memory performed using the API call that allows for snapshots that are involved in meta-data support in system memory to track read and write accesses by the transaction corresponds to Applicant’s API providing functions to receive tracking information for the memory transactions, as the API provides snapshots of memory that allow for the system to track read and write access by the transaction, i.e., receive tracking information.)
and cause manual transaction accounting to be performed based, at least in part, on the received tracking information ([0071] meta-data support in system memory is used for maintaining the “Snapshot” and to track read and write accesses by the transaction; [0081] access methods are provided by the extended memory architecture: […] An asynchronous copy method. Please note that meta-data support in system memory being used to track read and write accesses by the transaction in a system which includes access methods that may comprise an asynchronous copy method corresponds to Applicant’s manual transaction accounting based on the received tracking information, as Applicant states in [0058] of the Specification that manual transaction accounting is when a user (e.g., computer program code, such as a kernel running on PPU 106) performs one or more aspects of tracking data to be asynchronously moved.).
Zhao and Kahle are both considered to be analogous to the claimed invention because they are in the same field of performing asynchronous computer requests relating to memory. Therefore, it would have been obvious to someone of ordinary skill in the art prior to the effective filing date of the claimed invention to have modified Zhao to incorporate the teachings of Kahle to modify the asynchronous API memory transaction system to do so with the API providing functions to receive tracking information for the memory transactions and cause manual transaction accounting to be performed accordingly, allowing for improved performance and resource usage, as described in Kahle.
Regarding Claim 15, Zhao-Kahle as disclosed in Claim 14, Zhao further discloses wherein the one or more memory transactions include one or more copy operations to be asynchronously performed between a first memory and a second memory of a graphics processing unit (GPU) (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host, wherein the device can be a GPU […] enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that copy requests correspond to Applicant’s memory transactions including copy operations, asynchronously executing them corresponds to asynchronously performing them, and carrying them out from device-to-host where the device can be a GPU corresponds to Applicant’s performing them between a first and second memory of a GPU. It would be obvious to a person of ordinary skill in the art to carry out a copy request between memories of a GPU, i.e., with its first memory as the host and its second as the device.)
Regarding Claim 16, Zhao-Kahle as disclosed in Claim 14, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests; Col. 4, Lines 62-63- enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that asynchronously executing the request including system call APIs such as memory allocation requests corresponds to Applicant’s memory transactions to be asynchronously performed.)
Regarding Claim 17, Zhao-Kahle as disclosed in Claim 14, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed (Col. 4, Lines 55-56- In particular, the requests include system call APIs such as memory allocation requests; Col. 4, Lines 62-63- enqueue the intercepted request in a request queue for asynchronous execution as a later time. Please note that asynchronously executing the request including system call APIs such as memory allocation requests corresponds to Applicant’s memory transactions to be asynchronously performed.) and an identifier of a source memory location and an identifier of a destination memory location are received as inputs (Col. 4, lines 55-63- the requests include system call APIs such as memory allocation requests, or data access/copy/movement requests for transferring data from “host-to-device” or from 37 device-to-host. Please note that system call APIs including requests for transferring data from host-to-device correspond to Applicant’s receiving an identifier of a source memory location and an identifier of a destination memory location as inputs, as the host would correspond to the source memory location and the device would correspond to the destination memory location, and must necessarily be included in the data transfer request of the system call API in order to complete it.)
Regarding Claim 18, Zhao-Kahle as disclosed in Claim 14, Zhao further discloses wherein the one or more memory transactions are to be asynchronously performed using asynchronous data movement hardware (Col. 4, Lines 42-47- the data coordination engine 133 is configured to monitor requests issued by an executing task, intercept requests issued by the executing task which correspond to data flow operations to be performed as part of the task execution, and asynchronously execute the intercepted requests. Please note that the data coordination engine 133 monitoring requests corresponding to data flow operations to be executed asynchronously corresponds to Applicant’s memory transactions being performed asynchronously using asynchronous data movement hardware.).
Regarding Claim 19, Zhao-Kahle as disclosed in Claim 14, Zhao further discloses wherein in response to the API call, an indication of whether asynchronous data movement hardware is to be used to perform one or more asynchronous data movement operations is returned (Col. 10, Lines 45-50-the data coordination engine 133 may determine that the request can be immediately executed under the current resource usage and allocation. Alternatively, the data coordination engine 133 can enqueue the request, and then asynchronously execute the request; Col. 12, Lines 34-35- asynchronous data movement operations to and from specific processing devices and/or memory devices. Please note that determining whether the request will alternatively be executed asynchronously corresponds to Applicant’s returning an indication of whether asynchronous data movement hardware is to be used to perform the one or more asynchronous data transactions in response to an API call, as the data coordination engine 133 must return an indication in order to trigger the asynchronous execution, which include the execution of asynchronous data movement operations.).
Regarding Claim 20, Zhao-Kahle as disclosed in Claim 14 discloses the method of Claim 14, as stated above.
Zhao further discloses A non-transitory computer-readable medium having stored thereon a set of instructions (Col. 9, Lines 35-36 non-volatile memory which is utilized to store application program instructions), which if performed by one or more processors, cause the one or more processors to at least perform (Col. 9, Lines 35-37- application program instructions that are read and processed by the central processing units 202. Please note that this corresponds to Applicant’s instructions causing processors to perform the method if performed by the processors.)
Response to Arguments
Applicant's arguments filed 03/05/2026 have been fully considered but they are not persuasive.
Applicant’s arguments are summarized as follows:
A) Regarding the rejection of independent Claim 1 under 35 U.S.C. 103, Zhao does not teach “wherein the API provides one or more functions to receive tracking information for the one or more memory transactions and cause manual transaction accounting to be performed based, at least in part, on the received tracking information”. The deficiencies of Zhao are not cured by Aharoni, which also does not teach “wherein the API provides one or more functions to receive tracking information for the one or more memory transactions and cause manual transaction accounting to be performed based, at least in part, on the received tracking information”. Therefore Claim 1 is allowable.
B) Independent Claims 8 and 14 are allowable for reasons similar to Claim 1, and the rejections under 35 U.S.C. 103 should be withdrawn.
C) Since Dependent Claims 2-7, 9-13, and 15-20 depend on allowable Independent claims, they are allowable, and the rejections under 35 U.S.C. 103 should be withdrawn.
Regarding A), the examiner respectfully disagrees. The Applicant’s arguments are moot, as the rejections of the Claim now relies on a new grounds of rejection, Zhao-Kahle, which discloses the limitations stated by the Applicant via the combination of references, as stated above. Therefore, the recited features can be found in the cited combination of references, and independent Claim 1 remains rejected under 35 U.S.C. 103 for the reasons stated above, and the combinations cited would have been obvious to a person of ordinary skill in the art prior to the effective filing date of the application. The rejections under 35 U.S.C. 103 are maintained.
Regarding B), the examiner respectfully disagrees. The Independent claims 8 and 14 contain similar limitations to rejected Independent Claim 1 and do not add limitations that overcome the rejection; therefore, they likewise remain rejected, and the application is not in condition for allowance. The rejections under 35 U.S.C. 103 are maintained.
Regarding C), the examiner respectfully disagrees. The dependent claims 2-7, 9-13, and 15-20 depend on unpatentable claims and do not add limitations that overcome the rejection; therefore, they likewise remain rejected, and the application is not in condition for allowance. The rejections under 35 U.S.C. 103 are maintained.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Johns et al. (US20200183854) discloses tracking the state of shared memory when entering a transaction processing state in systems with GPUs, asynchronous copying in memory, global memory, and APIs for the memory architecture (see [0055, 0071, 0074, 0079-0080, 0167]).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FARAZ T AKBARI whose telephone number is (571)272-4166. The examiner can normally be reached Monday-Thursday 9:30am-7:30pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, April Blair can be reached at (571)270-1014. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FARAZ T AKBARI/Examiner, Art Unit 2196
/APRIL Y BLAIR/Supervisory Patent Examiner, Art Unit 2196
Prosecution Insights