DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/06/2026 was filed after the mailing date of the application on 12/16/2022. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant's arguments filed 05/19/2026 regarding the rejection of claims 1-5, 8, 10, 21-25 and 27 under 35 U.S.C. 103, see pages 6-9 of Remarks, have been fully considered but they are not persuasive.
Regarding claim 1; the examiner respectfully disagrees with the argument that using Iguchi et al, US 20220069186 A1 (Iguchi) in view of Leng, US 20220165993 A1 (Leng) fails to establish a prima facie case for the rejections detailed in the Non-Final Rejection of 02/19/2026, see the Applicant’s argument on pages 6-9 of the Remarks, for the following reasons:
Claim 1 of the instant application recites the limitation: “… wherein the first molding layer is no higher than a portion of the first electrode covering the first surface of each of the plurality of light emitting devices….”. By examining Figure (3) of Leng, an annotated copy of which is provided below to illustrate the examiner’s point, one can see that the first molding layer 170 has portions that are indeed not higher than several of the portions of the first electrode 123 covering the first surface of each of the light emitting devices 120. Thus, it is within the broadest reasonable interpretation of the language used to recite the limitations of the claim, that this limitation is obvious in light of using Iguchi in view of Leng.
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Regarding claim 21; the Applicant presents arguments similar to the arguments presented regarding the rejection of claim 1. Thus, the reasoning presented by the examiner, detailed above, should be applicable to the arguments against the rejection of claim 21.
Given the arguments detailed above, the examiner sees it fit to maintain the rejections provided in the Non-Final Rejection of 02/19/2026. These rejections will be detailed again below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claims 1-5, 8, 21-25 and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Iguchi et al, US 20220069186 A1 (Iguchi) in view of Leng, US 20220165993 A1 (Leng).
Regarding claim 1; Iguchi teaches a light emitting module (Iguchi: Fig (8): 200e) comprising:
a circuit board (Fig (1A): 50);
a plurality of light emitting devices (Fig (8): 100B, 100R, 100G) disposed on the circuit board (Fig (1A): 50);
a first molding layer (Fig (8): 24+15c) surrounding side surfaces of the plurality of light emitting devices (100B, 100R, 100G);
a second molding layer disposed on the first molding layer; and
a first electrode (30c);
wherein each of the plurality of light emitting devices (100B, 100R, 100G) comprises a first semiconductor layer (13), a second semiconductor layer (11), and an active layer (12) disposed between the first semiconductor layer (13) and the second semiconductor layer (11),
wherein a first surface of the first semiconductor layer (13) corresponds to a light exit surface of each of the plurality of light emitting devices (100B, 100R, 100G), wherein the first electrode (30c) covers the first surface of each of the plurality of light emitting devices (100B, 100R, 100G) and a plurality of openings of the first molding layer (24+15c),
wherein the first molding layer is no higher than a portion of the first electrode covering the first surface of each of the plurality of light emitting devices, and
wherein the second molding layer covers the first electrode.
Iguchi does not teach a second molding layer disposed on the first molding layer, wherein the first molding layer is no higher than a portion of the first electrode covering the first surface of each of the plurality of light emitting devices, and wherein the second molding layer covers the first electrode.
However, Leng teaches a second molding layer (160) disposed on the first molding layer (170), wherein the first molding layer (170) is no higher than a portion of the first electrode (123) covering the first surface of each of the plurality of light emitting devices (120), and wherein the second molding layer (160) covers the first electrode (123). Iguchi and Leng are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Iguchi by incorporating a second molding layer such as disclosed in Leng to improve the protection of the device against external elements leading to a more reliable device.
Regarding claim 2; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 1.
Further, Iguchi teaches wherein each of the light emitting devices (Iguchi: Fig (8): 100B, 100R, 100G) comprises a second electrode (23N) electrically connected to the second semiconductor layer (11), the first electrode (30c) and the second electrode (23N) being disposed to face the circuit board (Fig (1A): 50).
Regarding claim 3; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 2.
Further, Iguchi teaches wherein the first electrode (Iguchi: Fig (8): 30C) and the second electrode (23N) of each of the plurality of light emitting devices (100B, 100R, 100G) are electrically connected to the circuit board (Fig (1A): 50).
Regarding claim 4; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 2.
Further, Iguchi teaches wherein the first electrode (Iguchi: Fig (8): 30c) overlaps with an interface between the side surfaces of the plurality of light emitting devices (100B, 100R, 100G) and the first molding layer (24+15c).
Regarding claim 5; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 1.
Further, Iguchi teaches wherein each of the plurality of light emitting devices (Iguchi: Fig (8): 100B, 100R, 100G) comprises a second electrode (23N) electrically connected to the second semiconductor layer (11), the second electrode (23N) being disposed to face the circuit board (Fig (1A): 50).
Regarding claim 8; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 1.
Further, Iguchi teaches wherein the first molding layer (Iguchi: Fig (8): 24+15c) has an upper surface, having a periphery (upper surface of 15c) flush with the first surface of the first semiconductor (13).
Regarding claim 21; Iguchi teaches a light emitting module (Iguchi: Fig (8): 200e) comprising:
a circuit board (Fig (1A): 50);
a plurality of light emitting devices (Fig (8): 100B, 100R, 100G) disposed on the circuit board (Fig (1A): 50);
a first molding layer (Fig (8): 24+15c) surrounding side surfaces of the plurality of light emitting devices (100B, 100R, 100G);
a second molding layer disposed on the first molding layer; and
a first electrode (30c);
wherein each of the plurality of light emitting devices (100B, 100R, 100G) comprises a first semiconductor layer (13), a second semiconductor layer (11), and an active layer (12) disposed between the first semiconductor layer (13) and the second semiconductor layer (11),
wherein a first surface (top surface) of the first semiconductor layer (13) corresponds to a light exit surface of each of the plurality of light emitting devices (100B, 100R, 100G),
wherein the first electrode (30c) contacts the first surface of each of the plurality of light emitting devices (100B, 100R, 100G) and a plurality of openings of the first molding layer (24+15c),
wherein the first molding layer is no higher than a portion of the first electrode contacting the first surface of each of the plurality of light emitting devices, and
wherein the second molding layer covers the first electrode.
Iguchi does not teach a second molding layer disposed on the first molding layer, wherein the first molding layer is no higher than a portion of the first electrode contacting the first surface of each of the plurality of light emitting devices, and wherein the second molding layer covers the first electrode.
However, Leng teaches a second molding layer (160) disposed on the first molding layer (170), wherein the first molding layer (170) is no higher than a portion of the first electrode (123) covering the first surface of each of the plurality of light emitting devices (120), and wherein the second molding layer (160) covers the first electrode (123). Iguchi and Leng are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Iguchi by incorporating a second molding layer such as disclosed in Leng to improve the protection of the device against external elements leading to a more reliable device.
Regarding claim 22; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 21.
Further, Iguchi teaches wherein each of the plurality of light emitting devices (Iguchi: Fig (8): 100B, 100R, 100G) comprises a second electrode (23N) electrically connected to the second semiconductor layer (11), the first electrode (30c) and the second electrode (23N) being disposed to face the circuit board (Fig (1A): 50).
Regarding claim 23; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 22.
Further, Iguchi teaches wherein the first electrode (Iguchi: Fig (8): 30c) and the second electrode (23N) of the light emitting device (100B, 100R, 100G) are electrically connected to the circuit board (Fig (1A): 50).
Regarding case 24; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 21.
Further, Iguchi teaches wherein the first electrode (Iguchi: Fig (8): 30c) overlaps with an interface between the side surfaces of the plurality of light emitting devices (100B, 100R, 100G) and the first molding layer (24+15c).
Regarding claim 25; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 21.
Further, Iguchi teaches wherein each of the plurality of light emitting devices (Iguchi: Fig (8): 100B, 100R, 100G) comprises a second electrode (23N) electrically connected to the second semiconductor layer (11), the second electrode (23N) being disposed to face the circuit board (Fig (1A): 50).
Regarding claim 27; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 21.
Further, Iguchi teaches wherein the upper surface of the first molding layer (Iguchi: Fig (8): 24+15c) includes a periphery (upper surface of 15c) flush with the first surface of the first semiconductor layer (13).
Claims 10 and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Iguchi et al, US 20220069186 A1 (Iguchi) in view of Leng, US 20220165993 A1 (Leng) in further view of Choe, US 20210074770 A1 (Choe).
Regarding claim 10; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 1.
However, Iguchi in view of Leng does not teach wherein the second molding layer includes a plurality of openings corresponding to the plurality of openings of the first molding layer.
Choe teaches wherein the second molding layer (Choe: Fig (14): MB3) includes a plurality of openings corresponding to the plurality of openings of the first molding layer (119).
Iguchi in view of Leng and Choe are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application to modify Iguchi in view of Leng by using the openings in the second molding layer that correspond to the openings in the first molding layer as disclosed in Choe to improve the resolution of the device.
Regarding claim 28; Iguchi in view of Leng discloses all the limitations of the light emitting module according to claim 21.
However, Iguchi in view of Leng does not teach wherein the second molding layer includes a plurality of openings corresponding to the plurality of openings of the first molding layer.
Choe teaches wherein the second molding layer (Choe: Fig (14): MB3) includes a plurality of openings corresponding to the plurality of openings of the first molding layer (119).
Iguchi in view of Leng and Choe are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application to modify Iguchi in view of Leng by using the openings in the second molding layer that correspond to the openings in the first molding layer as disclosed in Choe to improve the resolution of the device.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Moataz Khalifa whose telephone number is (703)756-1770. The examiner can normally be reached Monday - Friday (8:30 am - 5:00).
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/M.K./Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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