DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
The Amendment filed on 11/12/2025, responding to the Office action mailed
on 8/11/2025, has been entered into the record. The present Office action is made
with all the suggested amendments being fully considered. Accordingly, claims 12-17 and 19-20 are pending in this application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/12/2025 is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 12-17, 19, 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 12 introduces a “dispersion medium”, but the claim set does not integrate the “dispersion medium” into the method of building an LED assembly. The “dispersion medium” is not mentioned in the specification.
For compact prosecution the examiner interprets the “dispersion medium” to be the same element as the ink composition/LED structures.
Claims 12 and 20 state, “…a first face that is an upper surface and a second face that is a lower surface each face each other in the first direction…” It is unclear how the faces can be on opposite sides of structure and still face each other.
For compact prosecution the examiner interprets, “…a first face that is an upper surface and a second face that is a lower surface each face each other in the first direction…” to read, “…a first face that is an upper surface and a second face that is a lower surface with each face facing away from each other in opposite directions…” in claims 12 and 20.
Claims 13-17, 19 are rejected as being dependent on claim 12.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12-17 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20200185368 A1) in view of Do et al. (US 20140124802 A1, IDS) and Lu et al. (US 20160172340 A1).
Re Claim 12 Park teaches a method of manufacturing a direct-current-drivable light- emitting diode (LED) electrode assembly (FIG. 8) [0042], the method comprising:
operation (1) of preparing an ink composition (FIG. 3A, process can be repeated for multiple structures, multiple LED structures can count as an ink composition) for a printing apparatus including the plurality of LED structures (FIG. 3A, repeat process for multiple LED structures) and a dispersion medium (use ink composition/LED structures taught in FIG. 3A as dispersion medium), wherein each of the plurality of LED structures comprises an asymmetric face (FIG. 3A, top of 21, the surface is a non-rectangle/parallelogram as shown in FIG. 3A and therefore has no symmetry axis), in which layers including a first conductive semiconductor layer (11) [0055], a photoactive layer (12), and a second conductive semiconductor layer (13) are stacked in a first direction (vertical), and a first face (top of 21, FIG. 4C) that is an upper surface and a second face (bottom surface of 21, FIG. 4C) that is a lower surface with each face facing away from each other in opposite directions, wherein the first face and the second face have a congruent shape (FIG. 3A, the top and bottom surfaces are congruent), and have an asymmetric shape in which a symmetrical axis does not exist (FIG. 3A, top of 21), a first face that is an upper surface (21, upper surface) [0065] and a second face (bottom of 21 on top surface of 16 and 17) that is a lower surface each face each other in the first direction, wherein the first face and the second face have a congruent shape (FIG. 3A),
operation (2) of forming an alignment guide member (51, FIG. 9) having a plurality of holes (61) each passing therethrough so as to have the same shape as the first face (top of structure, FIG. 3A) of the LED structure on one or more lower electrodes (41) [0042];
operation (3) of discharging the ink composition (201) for a printing apparatus on the alignment guide member (51) through the printing apparatus (FIG. 10);
operation (4) of aligning the plurality of LED structures by inserting a second face side (bottom of 21, 201 in FIG. 10 is inserted to 61 in this manner) end portion of each of the LED structures (process can be repeated) placed on the alignment guide member (51) into the hole (61) of the alignment guide member (FIG. 10);
operation (5) of forming one or more upper electrodes (17) [0026] on the plurality of aligned LED structures (21, FIG. 3A) so as to be in contact with the first face of the LED structure (The electrode 17 is directly on the second face, but the first and second faces are on the same structure, therefore 17 is mechanically in contact with all faces of 21).
Park does not teach a thickness that is a vertical distance between the first face and the second face is in a range of 0.3 um to 3.5 um;
wherein a chemical bonding linker is provided on any one or more of the second face of the LED structure, an inner surface of the hole, and a bottom surface of the hole, so that each of the LED structures aligned by being inserted into the hole is not separated from the hole.
Do teaches layer 28 is 5 nm to 100 nm, and FIG. 2E shows LED element 30 [0099] is roughly 10x thicker than 28. Using the top surface of 30 and the bottom surface of 30 directly on top surface of 28 leave a top/first face of 30 and the bottom/second face of to be separated by a vertical distance of about 50 nm to 1,000 nm which is .05 um to 1 um.
Do also teaches a chemical bonding linker (22, [0096] “At this time, the first coupling linker may employ any material capable of being coupled to the pixel site 13 without limitation…”) is provided on any one or more of the second face (bottom) of the LED structure (30) [0098], so that each of the LED structures aligned by being inserted into the hole is not separated from the hole (FIG. 2C).
It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching as taught by Do into the structure of Park since Do teaches a method of forming an LED structure with multiple LEDs in an alignment guide.
The ordinary artisan would have been motivated to modify Do in combination with Park in the above manner for the motivation of finding optimal distance between the first and second face and also integrating a chemical bonding layer to ensure the LED structures stay placed in their respective grooves to form a highly efficient LED device. [0004] states, “Therefore, it will be easily understood that directly manufacturing a full-color display by using high-efficiency LED is the most suitable method in aspect of light emission efficiency, in comparison to manufacturing a display by using high-efficiency LED as the LCD backlight.”
Furthermore, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. In the instant case, process optimization will allow one of ordinary skill in the art to reach optimal LED structure thickness, the distance between the first and second faces.
Park in view of Do does not explicitly teach a chemical bonding linker is provided on an inner surface of the hole, and a bottom surface of the hole.
Park in view of Do does teach a hole (Park, 61) with a bottom surface and inner surfaces, and a bonding material (Do, 22) is applied of the bottom surface of the pixel site. Applying the bonding layer from Do into the Park structure on the bottom surfaces would cause some of the material to be on the sidewalls when the LED is inserted in the LED hole as Do FIG. 2C shows the bonding material is applied across the entire bottom surface.
The ordinary artisan would have been motivated to modify Do in combination with Park in view of Do in the above manner for the motivation of applying the bonding material to the hole’s bottom surface and allowing for a stronger more stable bond to allow the bonding material to also be on the hole’s sidewalls.
Park in view of Do does not teach applying any one or more of sound waves and vibrations.
Lu teaches applying any one or more of sound waves ([0059] states, “The gold balls are subjected to fusion welding using ultrasonic waves, and a pressure welding device welds the LED chip 210 on the LED display screen substrate 200 in a pressing manner.”) and vibrations (FIG. 9).
It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching as taught by Lu into the structure of Park in view of Do since Lu teaches a method of forming an LED structure.
The ordinary artisan would have been motivated to modify Lu in combination with Park in view of Do in the above manner for the motivation of using sound waves to align and attach an LED structure to a display board since the fusion welding uses sound waves, and the process it critical for device optimization. [0004] states, “Besides, an LED chip and a bonding pad are generally connected by a metal wire according to a wire bonding technique of a conventional encapsulated lamp bead, thus the quality of the lamp bead is directly affected by the welding quality of the metal wire. While a dot pitch of an LED display screen is reduced constantly, the conventional wire bonding technique also limits the development of LED display screens.”
Re Claim 13 Park in view of Do and Lu teaches the method of claim 12, but does not explicitly teach in operation (2), an area of each of the plurality of holes provided in the alignment guide member is formed to be 1.01 to 1.50 times larger than an area of a second face of each of the LED structures.
Park teaches each of the plurality of holes (61) provided in the alignment guide member is formed slightly larger than the second face of the LED structures (203, Fig 10, [0044])
The ordinary artisan would have been motivated to modify Park in combination with Park in view of Do and Lu in the above manner for the motivation of finding optimal hole size in the alignment guide compared to the size of the LED structure.
Furthermore, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. In the instant case, process optimization will allow one of ordinary skill in the art to reach ideal alignment guide groove size.
Re Claim 14 Park in view of Do and Lu teaches the method of claim 12, wherein in operation (2), a partition wall (Park, a wall is formed in 51 between holes 61) is further formed on the alignment guide (51) member so as to surround a region in which the plurality of holes (61) are formed, or to surround regions obtained by dividing the region into two or more regions (Fig 10).
Re Claim 15 Park in view of Do and Lu teaches the method of claim 12, wherein in operation (2), the hole (Park, 61) is formed in a region of the alignment guide member (51) corresponding to a main surface of one lower electrode (41, FIG. 8 & 9).
Re Claim 16 Park in view of Do and Lu teaches the method of claim 12, wherein in operation (1), the LED structure (Park, 21) having an asymmetric face (top of 21) is a rod-type structure elongated in a second direction perpendicular to the first direction with an aspect ratio of a major axis and a minor axis of roughly 2:1 or more in each of the first face and the second face (FIG. 3A),
in operation (2), the lower electrode includes a first lower electrode (Park, 41) and a second lower electrode (42) [0042] formed to be spaced apart from each other in a main surface direction by a predetermined interval (FIG. 8),
in operation (2), one hole (Park, 61) provided in the alignment guide member (51) is formed through the alignment guide member so that a front-end second face portion and a rear-end second face portion of the LED structure (201) are respectively disposed on the main surfaces of the adjacent first (41) and second lower electrodes (42, FIG. 8-10), and
operation (4) is performed by applying power (applying power to electrodes is inherent in the art) to the first and second lower electrodes.
Re Claim 17 Park in view of Do and Lu teaches the method of claim 12, wherein operation (4) is performed by radiating a sound wave one time or multiple times (Lu, FIG. 9, [0059] states, “The gold balls are subjected to fusion welding using ultrasonic waves, and a pressure welding device welds the LED chip 210 on the LED display screen substrate 200 in a pressing manner.”).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20200185368 A1) in view of Do et al. (US 20140124802 A1, IDS) and Lu et al. (US 20160172340 A1) and further in view of Keates (US 20200411717 A1).
Re Claim 19 Park in view of Do and Lu teaches the method of claim 12, further comprising: between operation (4) and operation (5),
heat-treating (Do, [0099] states, “In addition, the soldering process may be performed in a common way, preferably by partially heating the pixel sites 13 at a temperature capable of selectively melting only the metal micro powder 23 without giving an impact to the substrate and the subminiature blue LED element.”) to improve electrical contact between the second face (bottom of 30) of the LED structure and the lower electrode (11, [0100], FIG. 2E).
Park in view of Do and Lu does not teach depositing an insulating material to fill a space between each LED structure and the hole into which the LED structure is inserted and to planarize a space between the plurality of aligned LED structures.
Keates teaches depositing an insulating material (2650) [0181] to fill a space between each LED structure (3614 and 2616) [0180] and the hole into which the LED structure is inserted and to planarize a space between the plurality of aligned LED structures ([0181] states, “Referring to FIG. 26B, a planarization oxide layer 2650 is formed over the structure of FIG. 26A.”).
It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching as taught by Lu into the structure of Park in view of Do since Lu teaches a method of forming an LED structure.
The ordinary artisan would have been motivated to modify Lu in combination with Park in view of Do in the above manner for the motivation of LED pixels are the basic building block of a display, and it is critical to integrate the pixels with the LED’s being electrically isolated from one another to avoid shorting between adjacent LED structures. [0003] states, “Pixels may be the basic building blocks of a display or digital image and with geometric coordinates.”
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20200185368 A1) in view of Do et al. (US 20140124802 A1, IDS).
Re Claim 20 Park teaches a direct-current-drivable light-emitting diode (LED) electrode assembly (FIG. 8) [0042] comprising:
a plurality of LED structures (21, process can be repeated to form many) [0065] having an asymmetric shape (as shown in FIG. 3A, the top face of 21 is a non-rectangle/parallelogram, so there is no axis of symmetry), in which layers including a first conductive semiconductor layer (11) [0055], a photoactive layer (12), and a second conductive semiconductor layer (13) are stacked in a first direction (vertical, FIG. 2), and a first face (top of 21, FIG. 4C) that is an upper surface and a second face (bottom surface of 21, FIG. 4C) that is a lower surface with each face facing away from each other in opposite directions, wherein the first face and the second face have a congruent shape (FIG. 3A shows 2nd face shape, 1st face shape is the same only hidden), that is an asymmetric shape (as shown in FIG. 3A, the top face of 21 is a non-rectangle/parallelogram, so there is no axis of symmetry) in which a symmetrical axis does not exist;
one or more lower electrodes (41) [0026] which is spaced apart from each other and one or more upper electrodes (16, [0026], FIG. 4C); and
an alignment guide member (51, FIG. 9) disposed on the one or more lower electrodes (41) and having a plurality of holes (61) each passing therethrough so as to have the same shape as the first face of the LED structure (FIG. 8-10),
wherein each of the plurality of LED structures (201, 21 is FIG. 3A, 201 in FIG. 10) is aligned on the lower electrodes (41) so that the second face (bottom) thereof is in contact with a main surface of each of the one or more lower electrodes (41), by inserting a second face side end (bottom) portion thereof into the hole (61) of the alignment guide member (51, FIG. 8-10).
and the one or more upper electrodes (16) are disposed on a first face side (top of 21) end portion of each of the plurality of aligned LED structures (FIG. 4C, process can be repeated for a plurality of LED structures).
Park does not teach a chemical bonding linker is provided on any one or more of the second face of the LED structure, an inner surface of the hole, and a bottom surface of the hole, so that a plurality of LED structures aligned by being inserted in the hole are not separated from the hole.
Do teaches a chemical bonding linker (22, [0096] “At this time, the first coupling linker may employ any material capable of being coupled to the pixel site 13 without limitation…”) is provided on any one or more of the second face (bottom) of the LED structure (30) [0098], so that a plurality of LED structures aligned by being inserted in the hole are not separated from the hole (FIG. 2C).
It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching as taught by Do into the structure of Park since Do teaches a method of forming an LED structure with multiple LEDs in an alignment guide.
The ordinary artisan would have been motivated to modify Do in combination with Park in the above manner for the motivation of finding optimal distance between the first and second face and also integrating a chemical bonding layer to ensure the LED structures stay placed in their respective grooves to form a highly efficient LED device. [0004] states, “Therefore, it will be easily understood that directly manufacturing a full-color display by using high-efficiency LED is the most suitable method in aspect of light emission efficiency, in comparison to manufacturing a display by using high-efficiency LED as the LCD backlight.”
Park in view of Do does not explicitly teach a chemical bonding linker is provided on an inner surface of the hole, and a bottom surface of the hole.
Park in view of Do does teach a hole (Park, 61) with a bottom surface and inner surfaces, and a bonding material (Do, 22) is applied of the bottom surface of the pixel site. Applying the bonding layer from Do into the Park structure on the bottom surfaces would cause some of the material to be on the sidewalls when the LED is inserted in the LED hole as Do FIG. 2C shows the bonding material is applied across the entire bottom surface.
The ordinary artisan would have been motivated to modify Do in combination with Park in view of Do in the above manner for the motivation of applying the bonding material to the hole’s bottom surface and allowing for a stronger more stable bond to allow the bonding material to also be on the hole’s sidewalls.
Response to Arguments
Applicant’s arguments with respect to claims 12-17 and 19-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH MARK SIPLING whose telephone number is (571)272-3269. The examiner can normally be reached 10 AM - 6 PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KENNETH MARK SIPLING/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 2/20/26