DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-14 are rejected under 35 U.S.C. 103 as being unpatentable over US 20200286799 (Masumoto), US 20160049351 (McCann), and US 20170301609 (Menon et al).
As to Claim 1, Masumoto teaches an electronic device (Fig 9) comprising:
a dielectric substrate (comprising case 10 and insulating layer 2 ¶0022) and a plurality of bond wire pads on an upper surface thereof (pads 4, 5 on 2);
an integrated circuit (IC) mounted to the upper surface of the dielectric substrate (chip 7 on 2);
a plurality of bond wires coupling the IC to respective bond wire pads (16 bonds 7 to 5);
a rigid lid mounted to the upper surface of the dielectric substrate (lid 20 mounted to 10, and specifically disclosed to have rigidity ¶0035) to define an air cavity surrounding an upper surface of the IC and surrounding the plurality of bond wires (cavity 22 surrounds upper surface of 7 and of 16 from the top side. Note examiner’s BRI of “surround” as being adjacent to a single side, as applicant’s upper surface of the IC has the air cavity on one side and bulk of the IC on the opposite side); and
a thermoset polymer layer over the rigid lid (portion of sealing resin 21 above lid 20, which may be a thermosetting compound ¶0028).
Masumoto does not explicitly teach the IC being a radio frequency (RF) IC, nor does it teach the lid is a rigid dielectric lid.
McCann teaches a device similar to that of Masumoto, and specifically teaches interchangeability between a general IC device and a monolithic microwave integrated circuit (MMIC) (McCann ¶0031).
It would have been obvious to one of ordinary skill in the art at the time of filing to combine the semiconductor device having a general IC taught by Masumoto with the IC being an MMIC taught by McCann in order to allow for more types of ICs in the assembly, increasing the functionality of the assembly.
Still, the combination of Masumoto and McCann does not explicitly teach the rigid lid being dielectric.
Menon teaches a device similar to that of Masumoto and specifically teaches a lid over the IC being dielectric (Menon Fig 1, cover 8 may be dielectric ¶0037).
It would have been obvious to one of ordinary skill in the art at the time of filing to combine the semiconductor device having a rigid cover taught by Masumoto and McCann with the cover being made of a dielectric taught by Menon in order to provide for further electrical isolation, protecting the covered IC and reducing possible device failure (¶0037).
As to Claim 2, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. McCann, as applied to claim 1, teaches the IC comprises a monolithic microwave integrated circuit (McCann ¶0031).
As to Claim 3, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. While Masumoto does not explicitly disclose the rigid dielectric lid having a melting temperature above a curing temperature of the thermoset polymer layer, Masumoto discloses the thermoset layer curing on the lid (¶0028). It is therefore inherent to Masumoto’s disclosure that the melting temperature of the lid be higher than the curing temperature of the thermoset layer, as the opposite would cause the lid to melt, destroying the device.
As to Claim 4, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. Masumoto further teaches wherein the rigid dielectric lid comprises a top and a plurality of sidewalls depending from the top (Masumoto Fig 9, lid 20 has a top surface and side surfaces shown).
As to Claim 5, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. Masumoto further teaches wherein the plurality of bond wire pads is spaced inwardly from a perimeter of the dielectric substrate and outwardly from the RF IC (15, 16 spaced outward from ICs 6, 7 towards perimeter of 2).
As to Claim 6, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. Masumoto further teaches wherein the thermoset polymer layer has a conformal shape with the rigid dielectric lid (layer 21 conforms to shape of lid 20).
As to Claim 7, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. Masumoto further teaches wherein the thermoset polymer layer and the rigid dielectric lid define a seal with the dielectric substrate (sealing resin 21 discloses to seal the components therein ¶0029).
As to Claim 8, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 1. Masumoto further teaches the device comprising an adhesive securing the rigid dielectric lid to the upper surface of the dielectric substrate (adhesive 25 secures 20 to 10).
As to Claim 9, Masumoto teaches an electronic device comprising:
a dielectric substrate (comprising case 10 and insulating layer 2 ¶0022) and a plurality of bond wire pads on an upper surface thereof (pads 4, 5 on 2);
an integrated circuit (IC) mounted to the upper surface of the dielectric substrate (chip 7 on 2);
a plurality of bond wires coupling the IC to respective bond wire pads (16 bonds 7 to 5);
a rigid lid mounted to the upper surface of the dielectric substrate (lid 20 mounted to 10, and specifically disclosed to have rigidity ¶0035) to define an air cavity surrounding an upper surface of the IC and surrounding the plurality of bond wires (cavity 22 surrounds upper surface of 7 and of 16 from the top side; see note from claim 1 rejection on the BRI of “surround”); and
an adhesive securing the rigid lid to the upper surface of the dielectric substrate (adhesive 25 secures 20 to 10); and
a thermoset polymer layer over the rigid lid (portion of sealing resin 21 above lid 20, which may be a thermosetting compound ¶0028).
Masumoto does not explicitly teach the IC being a monolithic microwave integrated circuit (MMIC), nor does it teach the lid is a rigid dielectric lid.
McCann teaches a device similar to that of Masumoto, and specifically teaches interchangeability between a general IC device and a monolithic microwave integrated circuit (MMIC) (McCann ¶0031).
It would have been obvious to one of ordinary skill in the art at the time of filing to combine the semiconductor device having a general IC taught by Masumoto with the IC being an MMIC taught by McCann in order to allow for more types of ICs in the assembly, increasing the functionality of the assembly.
Still, the combination of Masumoto and McCann does not explicitly teach the rigid lid being dielectric.
Menon teaches a device similar to that of Masumoto and specifically teaches a lid over the IC being dielectric (Menon Fig 1, cover 8 may be dielectric ¶0037).
It would have been obvious to one of ordinary skill in the art at the time of filing to combine the semiconductor device having a rigid cover taught by Masumoto and McCann with the cover being made of a dielectric taught by Menon in order to provide for further electrical isolation, protecting the covered IC and reducing possible device failure (¶0037).
As to Claim 10, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 9. While Masumoto does not explicitly disclose the rigid dielectric lid having a melting temperature above a curing temperature of the thermoset polymer layer, Masumoto discloses the thermoset layer curing on the lid (¶0028). It is therefore inherent to Masumoto’s disclosure that the melting temperature of the lid be higher than the curing temperature of the thermoset layer, as the opposite would cause the lid to melt, destroying the device.
As to Claim 11, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 9. Masumoto further teaches wherein the rigid dielectric lid comprises a top and a plurality of sidewalls depending from the top (Masumoto Fig 9, lid 20 has a top surface and side surfaces shown).
As to Claim 12, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 9. Masumoto further teaches wherein the plurality of bond wire pads is spaced inwardly from a perimeter of the dielectric substrate and outwardly from the RF IC (15, 16 spaced outward from ICs 6, 7 towards perimeter of 2).
As to Claim 13, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 9. Masumoto further teaches wherein the thermoset polymer layer has a conformal shape with the rigid dielectric lid (layer 21 conforms to shape of lid 20).
As to Claim 14, the combination of Masumoto, McCann, and Menon teaches the electronic device of claim 9. Masumoto further teaches wherein the thermoset polymer layer and the rigid dielectric lid define a seal with the dielectric substrate (sealing resin 21 discloses to seal the components therein ¶0029).
Response to Arguments
Applicant's arguments filed 10 October 2025 have been fully considered but they are not persuasive.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., the upper surface of the IC and the plurality of bond wires being in direct contact with the air cavity) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Applicant’s argument that prior art teaches away from their inventive concept is also not considered persuasive. While prior art Masumoto teaches the IC and plurality of bond wires being contained within sealing resin, this art (nor any of the other cited art) does not explicitly teach that a device without such sealing resin suffers performance above a frequency of 5 GHz.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Corbyn D Mellinger whose telephone number is (703)756-5683. The examiner can normally be reached M-F 8-5 Eastern.
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/Corbyn D Mellinger/Examiner, Art Unit 2899
/EVAN G CLINTON/Primary Examiner, Art Unit 2899