DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/05/2025 and 11/12/2025 was filed after the mailing date of the Non-Final on 06/11/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant’s arguments, see pages 13-15 filed 09/05/2025, with respect to the rejection(s) of claims 1-5, 7-15 and 17-20 under 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Choung et al. (US 20220077251 A1).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 5, 7, 13, 21-36 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20160124557 A1) in view of Choung et al. (US 20220077251 A1).
Regarding claim 1, Choi discloses a display device comprising: a substrate (111); a pixel circuit (20) above the substrate (111); an insulating layer (30) which covers the pixel circuit (20) and includes a contact hole (31); a lower electrode (32) above the insulating layer (30) and connected to the pixel circuit (20) via the contact hole (31); an upper electrode (34) opposing the lower electrode (32), an organic layer (33) between the lower electrode (32) and the upper electrode (34) and including a light-emitting layer (33); ([0043], Fig. 1A)
the partition (35) overlaps an entirety of the contact hole (31) in plan view (Fig. 1A)
Choi does not disclose:
a rib formed of an inorganic material and including an aperture which overlaps the lower electrode; and a partition above the rib and including: a lower portion on the rib and having a lower surface in direct contact with the rib, and an upper surface opposing the lower surface and an upper portion on the lower portion and having a lower surface in direct contact with the upper surface of the lower portion and extending beyond a side surface of the lower portion, wherein the organic layer includes: a first organic layer in contact with the lower electrode via the aperture and a second organic layer located on the partition and spaced apart from the first organic layer,
the rib, the lower portion of the partition, and the upper portion of the partition are stacked in a third direction, and the rib and the upper portion of the partition are spaced apart from each other in the third direction.
However, Choung discloses:
a rib (126) formed of an inorganic material (per [0028]) and including an aperture (annotated below) which overlaps the lower electrode (104); and a partition (110A/110B) above the rib (126) and including: a lower portion (110A) on the rib (126) and having a lower surface (103) in direct contact with the rib (126), and an upper surface (105) opposing the lower surface (103) and an upper portion (110B) on the lower portion (110A) and having a lower surface (107) in direct contact with the upper surface (105) of the lower portion (110A) and extending beyond a side surface of the lower portion (110A), wherein the organic layer (112) includes: a first organic layer (lower 112) in contact with the lower electrode (104) via the aperture (annotated below) and a second organic layer (112 on sidewall 113) located on the partition (110A/110B) and spaced apart from the first organic layer (lower 112)
, the rib (126), the lower portion of the partition (110A), and the upper portion of the partition (110B) are stacked in a third direction (z-direction), and the rib (126) and the upper portion of the partition (110B) are spaced apart from each other in the third direction (z-direction). (Fig. 1A-2)
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It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung to arrive at the claimed invention in order to “increase pixel-per-inch and provide improved OLED performance.” (Choung, [0004])
Regarding claim 5, Choung discloses the display device of claim 1, wherein the upper electrode (114) includes a first upper electrode (lower 114) which covers the first organic layer (lower 112) and a second upper electrode (114 on sidewall 113) which covers the second organic layer (112 on sidewall 113) and is spaced apart from the first upper electrode (lower 114), ([0033], Fig. 1A) the first upper electrode (lower 114) is in direct contact with the side surface (113) of the lower portion of the partition (110A), and the lower portion of the partition (110A) has conductivity (per [0030]). ([0030], Fig. 1A)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Regarding claim 7, Choung discloses the display device of claim 5, further comprising a sealing layer (116) formed of an inorganic material (per [0034]) and covering the first upper electrode (lower 114), the side surface (113) of the lower portion of the partition (110A),and the second upper electrode (114 on sidewall 113), wherein the sealing layer (116) is in direct contact with the side surface (113) of the lower portion of the partition (110A) and the lower surface of the upper portion of the partition (110B). (Fig. 1A-2)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Regarding claim 13, Choi discloses the display device of claim 1 further comprising: a first sub-pixel (R or annotated below), a second sub-pixel (G or annotated below), and a third sub-pixel (B or annotated below) each including the pixel circuit (20), the contact hole (31), the lower electrode (32), the upper electrode (34), the organic layer (33), and the aperture (annotated below), ([0054]-[0056], Fig. 1A)
wherein the first sub-pixel (R) and the third sub-pixel (B) are aligned in a first direction (x-direction going into the page as annotated below), the first sub-pixel (R) and the second sub-pixel (G) are aligned in a second direction (y-direction annotated below) which intersects the first direction (x-direction), and the partition (35) includes a first partition (35 left) disposed between the aperture (annotated below) of the first sub-pixel and the aperture of the second sub-pixel (annotated below), and a second partition (35 right) dispose between the aperture of the first sub-pixel (annotated below) and the aperture of the third sub-pixel (annotated below). (Fig. 1A and 1B)
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Regarding claim 21, Choi discloses the display device of claim 13, wherein the lower electrode (32) of the first sub-pixel (annotated above) includes: a first side between the contact hole (31) of the first sub-pixel (R) and the aperture of the first sub-pixel (R) in the second direction (y-direction) in plan view, and a protruding portion protruding (annotated below) from the first side of the lower electrode (32) of the first sub-pixel (R) toward the second sub-pixel (G) in the second direction (y-direction) and overlapping the contact hole (31) of the first sub-pixel in plan view, ([0052], Fig. 1B) the lower electrode (32) of the second sub-pixel (G) includes: a first side between the contact hole (31) of the second sub-pixel (G) and the aperture (annotated above) of the second sub-pixel (G) in the second direction (y-direction) in plan view, and a protruding portion (annotated below) protruding from the first side of the lower electrode (32) of the second sub-pixel (G) toward the first sub-pixel (R) in the second direction (y-direction) and overlapping the contact hole (31) of the second sub-pixel (G) in plan view, and
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the protruding portion (annotated below) of the lower electrode (32) of the first sub-pixel (R) is between the protruding portion (annotated below) of the lower electrode (32) of the second sub-pixel (G) and the lower electrode (32) of the third sub-pixel (B) in the first direction in plan view. (Fig, 1B)
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Regarding claim 22, Choi discloses the display device of claim 13, wherein the side surface of the lower portion of the partition (35) includes a first side surface (left) and a second side surface (right), the first side surface (left) of the lower portion of the partition (annotated 35 above) is between the aperture of the first sub-pixel (annotated above) and the second side surface (103 right) of the lower portion of the partition (annotated 35 above) in the second direction (y-direction), the second side surface (right) of the lower portion of the partition (annotated 35 above) is between the aperture of the second sub-pixel (annotated above) and the first side surface (left) of the lower portion of the partition (annotated 35 above) in the second direction (y-direction), the first side surface (left) of the lower portion of the partition (annotated 35 above) is between the aperture of the first sub-pixel (annotated above) and the contact hole (31) of the first sub-pixel in the second direction (y-direction), and the second side surface (right) of the lower portion of the partition (annotated 35 above) is between the aperture of the second sub-pixel (annotated above) and the contact hole (31) of the first sub-pixel in the second direction (y-direction). (Fig. 1A)
Regarding claim 23, Choi discloses the display device of claim 22, wherein each of the first sub-pixel (annotated above) and the second sub-pixel (annotated above) comprises a sealing layer (50) which covers the upper electrode (34) ([0060], Fig. 1A)
Choi does not disclose:
the sealing layer of the first sub-pixel is in direct contact with the first side surface of the lower portion of the partition and the lower surface of the upper portion of the partition, and the sealing layer of the second sub-pixel is in direct contact with the second side surface of the lower portion of the partition and the lower surface of the upper portion of the partition.
However, Choung discloses:
the sealing layer (116) of the first sub-pixel (108a) is in direct contact with the first side surface (103 left) of the lower portion of the partition (110A) and the lower surface (107) of the upper portion of the partition (110B), and the sealing layer (116) of the second sub-pixel (108B) is in direct contact with the second side surface (103 right) of the lower portion of the partition (110A) and the lower surface (107) of the upper portion of the partition (110B). ([0034], Fig. 1A and 2)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for the sealing layer of the first sub-pixel is in direct contact with the first side surface of the lower portion of the partition and the lower surface of the upper portion of the partition, and the sealing layer of the second sub-pixel is in direct contact with the second side surface of the lower portion of the partition and the lower surface of the upper portion of the partition in order to protect the subpixels from external/environmental factors so as to “provide improved OLED performance.” (Choung, [0004])
Regarding claim 24, Choi discloses the display device of claim 22, wherein each of the first sub-pixel (annotated above) and the second sub-pixel (annotated above) comprises a sealing layer (50) which covers the upper electrode (34) ([0060], Fig. 1A)
Choi does not disclose:
the sealing layer of the first sub-pixel includes an end portion on the upper portion of the partition, the sealing layer of the second sub-pixel includes an end portion on the upper portion of the partition, and the end portion of the sealing layer of the first sub-pixel and the end portion of the sealing layer of the second sub-pixel face each other in the second direction.
However, Choung discloses:
the sealing layer (116) of the first sub-pixel (108A) includes an end portion (annotated below) on the upper portion of the partition (110B), the sealing layer (116) of the second sub-pixel (108B) includes an end portion (annotated below) on the upper portion of the partition (110B), and the end portion(annotated below) of the sealing layer (116) of the first sub-pixel (108A) and the end portion (annotated below) of the sealing layer (116) of the second sub-pixel (108B) face each other in the second direction (y-direction). (Fig. 1A)
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It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for the sealing layer of the first sub-pixel includes an end portion on the upper portion of the partition, the sealing layer of the second sub-pixel includes an end portion on the upper portion of the partition, and the end portion of the sealing layer of the first sub-pixel and the end portion of the sealing layer of the second sub-pixel face each other in the second direction in order to protect the subpixels from external/environmental factors so as to “provide improved OLED performance.” (Choung, [0004])
Regarding claim 25, Choung discloses the display device of claim 24, wherein the end portion (annotated above) of the sealing layer (116) of the first sub-pixel (108A) is between the first side surface (113 left) of the lower portion of the partition (110A) and
Choung does not disclose
the contact hole of the first sub-pixel in the second direction.
However, Choi shows the contact hole (31) of the first sub-pixel (left pixel of Fig. 1A) in the second direction (y-direction) in Fig. 1A.
Therefore, it would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung to have the contact hole of the first sub-pixel in the second direction in order to provide connection to the pixel circuit.
Regarding claim 26, Choung discloses the display device of claim 25, wherein the end portion (annotated above) of the sealing layer (116) of the second sub-pixel (108B) is between the second side surface (113 right) of the lower portion of the partition (100A) and
Choung does not disclose
the contact hole of the first sub-pixel in the second direction.
However, Choi shows the contact hole (31) of the first sub-pixel (left pixel of Fig. 1A) in the second direction (y-direction) (Fig. 1A).
Therefore, it would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung to have the contact hole of the first sub-pixel in the second direction in order to provide connection to the pixel circuit.
Regarding claim 27, Choi discloses the display device of claim 13, wherein the contact hole (31) of the first sub-pixel (left pixel of Fig. 1A) includes a contact area (31) where the lower electrode (32) of the first sub-pixel (left pixel of Fig. 1A) is in electrical contact with the pixel circuit (20) of the first sub-pixel (left pixel of Fig. 1A), and the lower portion of the partition (annotated 35 above) overlaps an entirety of the contact area (31) of the contact hole (31) of the first sub-pixel (left pixel of Fig. 1A). (Fig. 1A and 1B)
Regarding claim 28, Choi discloses the display device of claim 27, wherein a distance between the first side surface (left) of the lower portion of the partition (annotated 35 below) and the contact area of the contact hole (31) of the first sub-pixel (annotated below) in the second direction (y-direction) is less than a width of the contact area of the contact hole (31) of the first sub-pixel in the second direction (y-direction), and the width of the contact area of the contact hole (31) of the first sub-pixel (annotated below) in the second direction (y-direction) is less than a distance between the second side surface (right) of the lower portion of the partition (annotated 35 below) and the contact area of the contact hole (31) of the first sub-pixel (annotated below) in the second direction (y-direction). (Fig. 1A)
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Regarding claim 29, Choi discloses the display device of claim 1, wherein a thickness of the lower portion of the partition (annotated 35 in Fig. 1A of claim 13) is greater than a thickness of the upper portion of the partition (annotated 35 in Fig. 1A of claim 13). (Fig. 1A)
Regarding claim 30, Choung discloses the display device of claim 5, wherein the upper portion of the partition (110A) has conductivity (per [0030]).
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Regarding claim 31, Choi discloses a display device comprising: a substrate (111); a pixel circuit (20) above the substrate (111); an insulating layer (30) which covers the pixel circuit (20) and includes a contact hole (31); a lower electrode (32) above the insulating layer (30) and connected to the pixel circuit (20) via the contact hole (31); an upper electrode (34) opposing the lower electrode (32), an organic layer (33) between the lower electrode (32) and the upper electrode (34) and including a light-emitting layer (33); ([0043], Fig. 1A)
the partition (35) overlaps an entirety of the contact hole (31) in plan view (Fig. 1A)
and a thickness of the lower portion (annotated below) of the partition (35) in the third direction (z-direction) is greater than a thickness of the upper portion of the partition (annotated below) in the third direction (z-direction).
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Choi does not disclose:
a rib formed of an inorganic material and including an aperture which overlaps the lower electrode; and a partition above the rib and including: a lower portion on the rib and having a lower surface in direct contact with the rib, and an upper surface opposing the lower surface. and an upper portion on the lower portion and having a lower surface in direct contact with the upper surface of the lower portion and extending beyond a side surface of the lower portion, wherein the organic layer includes: a first organic layer in contact with the lower electrode via the aperture and a second organic layer located on the partition and spaced apart from the first organic layer
the rib, the lower portion of the partition, and the upper portion of the partition are stacked in a third direction, and the rib and the upper portion of the partition are spaced apart from each other in the third direction.
However, Choung discloses:
a rib (126) formed of an inorganic material (per [0028]) and including an aperture (annotated below) which overlaps the lower electrode (104); and a partition (110A/110B) above the rib (126) and including: a lower portion (110A) on the rib (126) and having a lower surface (103) in direct contact with the rib (126), and an upper surface (105) opposing the lower surface (103) and an upper portion (110B) on the lower portion (110A) and having a lower surface (107) in direct contact with the upper surface (105) of the lower portion (110A) and extending beyond a side surface of the lower portion (110A), wherein the organic layer (112) includes: a first organic layer (lower 112) in contact with the lower electrode (104) via the aperture (annotated below) and a second organic layer (112 on sidewall 113) located on the partition (110A/110B) and spaced apart from the first organic layer (lower 112)
the rib (126), the lower portion of the partition (110A), and the upper portion of the partition (110B) are stacked in a third direction (z-direction), and the rib (126) and the upper portion of the partition (110B) are spaced apart from each other in the third direction (vertically).
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It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung to arrive at the claimed invention in order to “increase pixel-per-inch and provide improved OLED performance.” (Choung, [0004])
Regarding claim 32, Choung discloses the display device of claim 31, wherein the upper electrode (114) includes a first upper electrode (lower 114) which covers the first organic layer (112) and a second upper electrode (114 on sidewall 113) which covers the second organic layer (112 on sidewall 113) and is spaced apart from the first upper electrode (lower 114), the first upper electrode (lower 114) is in direct contact with the side surface of the lower portion of the partition (110A), and the lower portion of the partition (110A) has conductivity (per [0030]). ([0033], Fig. 1A)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Regarding claim 33, Choung discloses the display device of claim 32, wherein the upper portion of the partition (110B) has conductivity (per [0030]).
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Regarding claim 34, Choi discloses a display device comprising: Choi discloses a display device comprising: a substrate (111); a pixel circuit (20) above the substrate (111); an insulating layer (30) which covers the pixel circuit (20) and includes a contact hole (31); a lower electrode (32) above the insulating layer (30) and connected to the pixel circuit (20) via the contact hole (31); an upper electrode (34) opposing the lower electrode (32), an organic layer (33) between the lower electrode (32) and the upper electrode (34) and including a light-emitting layer (33); ([0043], Fig. 1A)
the partition (35) overlaps an entirety of the contact hole (31) in plan view (Fig. 1A)
Choi does not disclose:
a rib formed of an inorganic material and including an aperture which overlaps the lower electrode; a partition including: lower portion on the rib and having a lower surface in direct contact with the rib, an upper surface opposing the lower surface, and a side surface connecting the lower surface and the upper surface, and an upper portion on the lower portion and having a lower surface in direct contact with the upper surface of the lower portion and extending beyond the side surface of the lower portion; Anda sealing layer formed of an inorganic material and covering the upper electrode and a portion of the partition, wherein the sealing layer is in direct contact with the side surface of the lower portion of the partition and the lower surface of the upper portion of the partition, the organic layer includes: a first organic layer in contact with the lower electrode via the aperture and a second organic layer on the partition and spaced apart from the first organic layer
However, Choung discloses:
a rib (126) formed of an inorganic material (per [0028]) and including an aperture (annotated below) which overlaps the lower electrode (104); ([0027], Fig. 1A) and a partition (110A/110B) including: a lower portion (110A) on the rib (126) and having a lower surface (103) in direct contact with the rib (126), and an upper surface (105) opposing the lower surface (103) and a side surface (111) connecting the lower surface (103) and the upper surface (105), and an upper portion (110B) on the lower portion (110A) and having a lower surface (105) in direct contact with the upper surface (107) of the lower portion (110A) and extending beyond the side surface of the lower portion (110B); ([0030], Fig. 1A) and a sealing layer (116) formed of an inorganic material (per [0034]) and covering the upper electrode (114) and a portion of the partition (110A/110B), wherein the sealing layer (116) is in direct contact with the side surface (113) of the lower portion of the partition (110A) and the lower surface (107) of the upper portion of the partition (110B), the organic layer (112) includes: a first organic layer (lower 112) in contact with the lower electrode (104) via the aperture (annotated below) and a second organic layer (112 on sidewall 113) on the partition (110A/110B) and spaced apart from the first organic layer (lower 112). ([0029]-[0034], Fig. 1A)
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It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung to arrive at the claimed invention in order to “increase pixel-per-inch and provide improved OLED performance.” (Choung, [0004])
Regarding claim 35, Choung discloses the display device of claim 34, wherein the upper electrode (114) includes a first upper electrode (lower 114) which covers the first organic layer (112) and a second upper electrode (114 on sidewall 113) which covers the second organic layer (112 on sidewall 113) and is spaced apart from the first upper electrode (lower 114), the first upper electrode (lower 114) is in direct contact with the side surface of the lower portion of the partition (110A), and the lower portion of the partition (110A) has conductivity (per [0030]). ([0033], Fig. 1A)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Regarding claim 36, Choung discloses the display device of claim 35, wherein the upper portion of the partition (110B) has conductivity (per [0030]).
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Choung for similar reasons as stated above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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