Prosecution Insights
Last updated: July 17, 2026
Application No. 18/085,987

MICRO LIGHT-EMITTING DIODE DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME

Non-Final OA §103
Filed
Dec 21, 2022
Priority
Nov 28, 2022 — TW 111145511
Examiner
OH, JIYOUNG
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
PlayNitride Display Co., Ltd.
OA Round
3 (Non-Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
30 granted / 39 resolved
+8.9% vs TC avg
Strong +24% interview lift
Without
With
+24.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
30 currently pending
Career history
90
Total Applications
across all art units

Statute-Specific Performance

§103
87.6%
+47.6% vs TC avg
§102
6.8%
-33.2% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 39 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/26/2026 has been entered. Status of the Application Acknowledgement is made of the amendment received on 2/26/2026. Claims 1-4 and 6-15 are pending in this application. Claim 1 is amended. Claims 12-15 remain withdrawn. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1-4, 6, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Yeon et al. (US 2021/0366981; hereinafter ‘Yeon’) in view of Lim (US 2021/0033926) and Wu et al. (US 2017/0162091; hereinafter ‘Wu’). Regarding claim 1, Yeon teaches a micro light-emitting diode display device (FIG. 9D, [0106]) comprising: a circuit substrate (300, [0046]) having a top surface (300 having a top surface; hereinafter referred to as ‘T300’); a pixel structure layer (LS, [0058]) disposed on the top surface of the circuit substrate (LS disposed on T300), wherein the pixel structure layer has a plurality of micro light-emitting diode units (122, 125, 127; hereinafter ‘µ-LED’) disposed separately (shown in FIG. 9D), the micro light-emitting diode units face the top surface of the circuit substrate (µ-LED faces T300) and are electrically connected with the circuit substrate (µ-LED electrically connected to 300 using 145 and 151, [0065-0066]), and the pixel structure layer further includes a side surface (LS includes a side surface); a support structure (a support structures includes 131, 135, and 141 which are located at the lateral boundaries of PM, [0063-0064]; hereinafter referred to as ‘SS’) disposed on the top surface of the circuit substrate, extending from the top surface of the circuit substrate to the pixel structure layer and connected with the side surface of the pixel structure layer (SS disposed on T300, extending from T300 to LS and connected with the side surface of LS), wherein the support structure protrudes from a surface of the pixel structure layer away from the circuit substrate (SS protrudes from a surface of LS away from 300), and the support structure and the surface of the pixel structure layer PNG media_image1.png 288 801 media_image1.png Greyscale form an accommodating space (SS and the surface of LS form S, see the annotated FIG. 9D); a connection layer (a partition structure 160P, FIGS. 9C-9D, [0112]), being a transparent structure (160P includes a light-transmitting material such as SOG, [0113]), disposed in the accommodating space (160P disposed in S); and a protection layer disposed on the connection layer (195 disposed on 160P, [0062]), wherein, each of the micro light-emitting diode units (µ-LED) comprises a first type semiconductor layer (122), a light-emitting layer (125) and a second type semiconductor layer (127), which are stacked in order (shown in FIG. 11), the light-emitting layer (125) is sandwiched between the first type semiconductor layer (122) and the second type semiconductor layer (127). Yeon does not teach the micro light-emitting diode display device comprising a connection layer, being a single continuous transparent structure. Lim teaches a micro light-emitting diode display device (100, FIG. 1, [0054]) comprising a connection layer (260, FIG. 3D, [0085]), being a single continuous transparent structure (260 being a single continuous transparent structure). As taught by Lim, one of ordinary skill in the art would utilize and modify the above teaching into Yeon to obtain and achieve the micro light-emitting diode display device comprising a connection layer, being a single continuous transparent structure as claimed, because it provides a continuous transparent connection structure that maintains the positional relationship of the optical layers relative to the underlying micro-light-emitting-diode units while permitting transmission of light through the connection structure [0085, 0114]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lim in combination with Yeon due to above reason. Yeon in view of Lim does not teach the micro light-emitting diode display device wherein the first type semiconductor layers of the micro light-emitting diode units are formed as a common layer. Wu teaches a micro light-emitting diode display device (100, FIG. 1, [0020]) wherein the first type semiconductor layers (122-1, [0025]) of the micro light-emitting diode units (122a and 122b are µ-LED, [0021, 0029]) are formed as a common layer (122-1 are formed as a common layer). As taught by Wu, one of ordinary skill in the art would utilize and modify the above teaching into Yeon in view of Lim to obtain and achieve the micro light-emitting diode display device wherein the first type semiconductor layers of the micro light-emitting diode units are formed as a common layer as claimed, because forming a plurality of LED elements on the same epitaxial structure avoids repeated epitaxial growth and is consistent with a mass-production approach [0033-0034, 0038]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Wu in combination with Yeon in view of Lim due to above reason. Regarding claim 2, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, wherein the circuit substrate further includes a display area and a non-display area (Yeon: 300 includes PM area (hereinafter referred to as ‘APM’) and 160E/160G area (hereinafter referred to as ‘A160), FIG. 2, [0051]), the non-display area is arranged around a periphery of the display area (A160 is arranged around a periphery of APM), and the support structure is configured in the non-display area (160G is configured in A160). PNG media_image2.png 476 955 media_image2.png Greyscale Regarding claim 3, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, further comprising: a filling layer (Yeon: the portion of 131, 135 and 141 between adjacent LS, see the annotated FIG. 9D; hereinafter referred to as ‘FL’) disposed between the pixel structure layer and the top surface of the circuit substrate (FL disposed between LS and T300). Regarding claim 4, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 3, wherein the support structure and the filling layer are integrally formed as one piece (Yeon: SS and FL are integrally formed as one piece, FIG. 6A, [0083]). Regarding claim 6, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, wherein the protection layer is arranged on the support structure and the connection layer (Yeon: 195 is arranged on SS and 160P, FIG. 9D), and a projection of the protection layer on the circuit substrate is within a projection of the support structure on the circuit substrate (the lateral width of 195 is within that of 300). Regarding claim 9, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, Yeon in view of Wu does not teach the micro light-emitting diode display device wherein a projection of the protection layer on the circuit substrate is less than or equal to a projection of the connection layer on the circuit substrate. Lim teaches the micro light-emitting diode display device comprising a protection layer (300, FIG. 3D, [0085]) on the circuit substrate (220, [0059]). Lim does not explicitly teach the micro light-emitting diode display device wherein a projection of the protection layer on the circuit substrate is less than or equal to a projection of the connection layer on the circuit substrate. Lim, however, depicts the protection layer 300 and the connection layer 260 as having substantially coextensive lateral extents in FIG. 3D. Therefore, the projection of the protection 300 on the circuit substrate 220 reasonably reads on being less than or equal to the projection of the connection layer 260. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ and modify the teachings of Lim to obtain and achieve the micro light-emitting diode display device wherein a projection of the protection layer on the circuit substrate is less than or equal to a projection of the connection layer on the circuit substrate as claimed, because the connection layer 260 functions to bond the protection layer 300 to the support structure 250, and providing sufficient overlapping area between the connection layer 260 and the protection layer 300 improves bonding reliability and mechanical support [0085, 0114]. Claims 1, 7, and 8 are, alternatively, rejected under 35 U.S.C. 103 as being unpatentable over Yeon (US 2021/0366981) in view of Lim (US 2021/0033926) and Wu (US 2017/0162091). Regarding claim 1, Yeon teaches a micro light-emitting diode display device (in alternative view of FIG. 11, [0005, 0132]) comprising: a circuit substrate (300, [0046]) having a top surface (300 having a top surface; hereinafter referred to as ‘T300’); PNG media_image3.png 342 952 media_image3.png Greyscale a pixel structure layer (LS, [0058]) disposed on the top surface of the circuit substrate (LS disposed on T300), wherein the pixel structure layer has a plurality of micro light-emitting diode units (122, 125, 127; hereinafter ‘µ-LED’) disposed separately (shown in FIG. 11), the micro light-emitting diode units face the top surface of the circuit substrate (µ-LED faces T300) and are electrically connected with the circuit substrate (µ-LED electrically connected to 300 using 145 and 151, [0065-0066]), and the pixel structure layer further includes a side surface (LS includes a side surface); a support structure (a support structures includes 160G, 131, 135, and 141 which are located at the lateral boundaries of PM, [0050-0051, 0063-0064]; hereinafter referred to as ‘SSR’) disposed on the top surface of the circuit substrate, extending from the top surface of the circuit substrate to the pixel structure layer and connected with the side surface of the pixel structure layer (SSR disposed on T300, extending from T300 to LS and connected with the side surface of LS), wherein the support structure protrudes from a surface of the pixel structure layer away from the circuit substrate (SSR protrudes from a surface of LS away from 300), and the support structure and the surface of the pixel structure layer form an accommodating space (SSR and the surface of LS form SR, see the annotated FIG. 11); a connection layer (110P, [0057, 0122]) disposed in the accommodating space (110P disposed in SR); and a protection layer disposed on the connection layer (195 disposed on 110P, [0062]), wherein, each of the micro light-emitting diode units (µ-LED) comprises a first type semiconductor layer (122), a light-emitting layer (125) and a second type semiconductor layer (127), which are stacked in order (shown in FIG. 11), the light-emitting layer (125) is sandwiched between the first type semiconductor layer (122) and the second type semiconductor layer (127). Yeon does not explicitly teach that the connection layer 110P is a transparent structure. Yeon, however, discloses in FIGS. 9A-9D that the partition structure 110P corresponding to the claimed connection layer may alternatively be formed from a material layer 160’ that may include a light-transmitting material such as SOG [0113]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teachings of Yeon to obtain and achieve the micro light-emitting diode display device comprising a connection layer being a transparent structure as claimed, because it permits selection of materials having desired optical properties, including light-transmitting properties [0113]. Yeon does not teach the micro light-emitting diode display device comprising a connection layer, being a single continuous transparent structure. Lim teaches a micro light-emitting diode display device (100, FIG. 1, [0054]) comprising a connection layer (260, FIG. 3D, [0085]), being a single continuous transparent structure (260 being a single continuous transparent structure). As taught by Lim, one of ordinary skill in the art would utilize and modify the above teaching into Yeon to obtain and achieve the micro light-emitting diode display device comprising a connection layer, being a single continuous transparent structure as claimed, because it provides a continuous transparent connection structure that maintains the positional relationship of the optical layers relative to the underlying micro-light-emitting-diode units while permitting transmission of light through the connection structure [0085, 0114]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lim in combination with Yeon due to above reason. Yeon in view of Lim does not teach the micro light-emitting diode display device wherein the first type semiconductor layers of the micro light-emitting diode units are formed as a common layer. Wu teaches a micro light-emitting diode display device (100, FIG. 1, [0020]) wherein the first type semiconductor layers (122-1, [0025]) of the micro light-emitting diode units (122a and 122b are µ-LED, [0021, 0029]) are formed as a common layer (122-1 are formed as a common layer). As taught by Wu, one of ordinary skill in the art would utilize and modify the above teaching into Yeon in view of Lim to obtain and achieve the micro light-emitting diode display device wherein the first type semiconductor layers of the micro light-emitting diode units are formed as a common layer as claimed, because forming a plurality of LED elements on the same epitaxial structure avoids repeated epitaxial growth and is consistent with a mass-production approach [0033-0034, 0038]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Wu in combination with Yeon in view of Lim due to above reason. PNG media_image4.png 342 948 media_image4.png Greyscale Regarding claim 7, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, wherein the support structure protrudes from the surface of the pixel structure layer to form a retaining wall (Yeon: SR protrudes from the surface of LS to form a retaining wall, FIG. 11), the retaining wall has a stepped shape and at least comprises a first stage and a second stage, the first stage is arranged around a periphery of the connection layer, and the second stage is located on the first stage and arranged around a periphery of the protection layer (the retaining wall has a stepped shape and comprises L1 and L2, see the annotated FIG. 11). Regarding claim 8, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, wherein the protection layer and the connection layer are located in the accommodating space (Yeon: 195 and 110P located in SR). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Yeon (US 2021/0366981) in view of Lim (US 2021/0033926) and Wu (US 2017/0162091), and further in view of Akimoto (US 2022/0262782). Regarding claim 10, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 9, but does not teach the micro light-emitting diode display device wherein a part of the connection layer is located between the support structure and a side surface of the protection layer. Akimoto teaches a micro light-emitting diode display device (FIG. 29, [0339]) wherein a part of the connection layer is located between the support structure and a side surface of the protection layer (159 is located between 156 and 170, [0087, 0089]). As taught by Akimoto, one of ordinary skill in the art would utilize and modify the above teaching into Yeon in view of Lim and Wu to obtain and achieve the micro light-emitting diode display device wherein a part of the connection layer is located between the support structure and a side surface of the protection layer as claimed, because this configuration enhances the environmental sealing of the sidewalls and increases the contact area for enhance mechanical bonding. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Akimoto in combination with Yeon in view of Lim and Wu due to above reason. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Yeon (US 2021/0366981) in view of Lim (US 2021/0033926) and Wu (US 2017/0162091), and further in view of Cha et al. (US 2021/0367124; hereinafter ‘Cha’). Regarding claim 11, Yeon in view of Lim and Wu teaches the micro light-emitting diode display device of claim 1, but does not teach the micro light-emitting diode display device wherein Young's modulus of the protection layer is greater than that of the support structure, and the Young's modulus of the protection layer is greater than that of the connection layer. Cha teaches a micro light-emitting diode display device (10000, FIG. 1, [0070]) wherein Young's modulus of the protection layer is greater than that of the support structure (Young’s modulus of 121 is greater than that of 131, since 121 is a light transmissive substrate such as glass substrate, quartz, sapphire substrate and 131 is formed black epoxy, FIG. 3B, [0097, 0120]), and the Young's modulus of the protection layer is greater than that of the connection layer (Young’s modulus of 121 is greater than that of 125, since 121 is a light transmissive substrate such as glass substrate, quartz, sapphire substrate and 125 is formed using a transparent epoxy, [0107]). As taught by Cha, one of ordinary skill in the art would utilize and modify the above teaching into Yeon in view of Lim and Wu to obtain and achieve the micro light-emitting diode display device wherein Young's modulus of the protection layer is greater than that of the support structure, and the Young's modulus of the protection layer is greater than that of the connection layer as claimed, because rigid transparent substrates and epoxy-based interface materials are well-known and widely used in the art for their specific functions. Rigidity is functionally necessary, as such substrates are selected not only for transparency but also for mechanical robustness. Epoxy enables precise thickness control and provides a balance of mechanical cushioning and processability. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Cha in combination with Yeon in view of Lim and Wu due to above reason. Response to Arguments Applicant’s arguments with respect to claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIYOUNG OH whose telephone number is (703)756-5687. The examiner can normally be reached Monday-Friday, 9AM-5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JIYOUNG OH/Examiner, Art Unit 2818 /DUY T NGUYEN/Primary Examiner, Art Unit 2818 7/6/26
Read full office action

Prosecution Timeline

Dec 21, 2022
Application Filed
Jul 01, 2025
Non-Final Rejection mailed — §103
Sep 29, 2025
Response Filed
Dec 11, 2025
Final Rejection mailed — §103
Feb 26, 2026
Request for Continued Examination
Mar 06, 2026
Response after Non-Final Action
Jul 08, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+24.5%)
3y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 39 resolved cases by this examiner. Grant probability derived from career allowance rate.

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