DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
In the communication filed on 12/16/2025 claims 1-4, 6, and 8-19 are pending. The applicant has amended independent claims 1 and 15 by integrating new limitations not presented before but found in ¶[81], ¶[85], and ¶[88], and by including limitations from claims 6, 11, and 12. The applicant has cancelled claims 5 and 7. Claims 16-19 are newly added.
Response to Arguments/Amendments
Applicant’s arguments and amendments, filed 12/16/2025, with respect to the rejection of independent claims 1 and 15 under 35 U.S.C. § 102/103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new grounds of rejection is made in view of newly found prior art applied in combination with the previously cited prior art references.
The drawing objections, the specification objections, and the claim objections are withdrawn due to the amendments made by the applicant.
The remaining arguments are moot as the applicant’s arguments for the remaining claims were based on dependency of the independent claims.
This Office Action is made Final due to the amendments.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4, 10, and 15-19 are rejected under 35 U.S.C. 103 as being unpatentable over Imanaka (Japanese Patent JP-2021021580-A) and further in view of Shimizu et al. (USPGPN 20100085022).
First, the examiner notes a voltage generator includes shunt resistors as disclosed by the applicant in ¶ [14-15] of the disclosure. For examination purposes a voltage generator will be interpreted as a device that generates voltage and not limited to shunt resistors.
With respect to independent claims 1 and 15, Imanaka teaches Imanaka teaches a battery charger (¶ [22]; a battery is charged by an alternator (not illustrated). One of ordinary skill understands Imanaka comprises a battery charger).
Imanaka teaches a terminal configured to be electrically connected to a battery (Fig. 2; a positive electrode and a negative electrode of a battery pack 30, see ¶ [25]).
Imanaka teaches a power-supply circuit configured to generate a charge current (¶ [22]; “the amount of power generated by the alternator is greater than the power consumption of the vehicle load, the battery 20 is charged by the alternator” is understood by one of ordinary skill to be a power-supply circuit configured to generate a charge current).
Imanaka teaches a charge current path configured to deliver the charge current between the power-supply circuit and the terminal (Fig. 2; power lines 33P and 33N are the current path X of the battery pack 30, see ¶ [24-25]. One of ordinary skill understands the current path X delivers the charge current between the alternator and the positive/negative electrodes of the battery pack 30).
Imanaka teaches a measurement circuit including a voltage generator on the charge current path and configured to receive the charge current to thereby generate one or more voltages, the one or more voltages corresponding to a magnitude of the charge current flowing through the charge current path (Fig. 2; a current measuring device 50 including a resistance circuit 51 (i.e., voltage generator) on the current path X and configured to receive the charge current to thereby generate one or more voltages, the one or more voltages corresponding to a magnitude of the charge current flowing through the charge current path. One of ordinary skill understands that using Ohm’s Law V=IR one or more voltages are generated by the flow of current through a resistance circuit).
Imanaka teaches an amplifier circuit configured to amplify the one or more voltages to thereby output at least a first amplified voltage and a second amplified voltage (Fig. 2; a current detection circuit 70 configured to amplify the one or more voltages to thereby output at least a first amplified voltage and a second amplified voltage).
Imanaka teaches further comprising a feedback circuit connected to the first amplifier and to the power-supply circuit (Fig. 2; a feedback circuit as illustrated by the input and output of the current detection circuit 70 comprising the first amplifier 73 through bus 87 into the management unit 90 to control the current cutoff device 35 from the power-supply).
Imanaka teaches a control circuit configured to cyclically obtain at least the first amplified voltage and the second amplified voltage (Fig. 2; a management unit 90 configured to cyclically obtain at least the first amplified voltage and the second amplified voltage. One of ordinary skill understands a management unit 90 comprising a CPU 91 and a memory 93 function on a clock cycle (i.e., cyclical)).
Imanaka teaches detect that the measurement circuit is in a fault condition based on the difference (¶ [88]; abnormalities or failures are diagnosed (i.e., a fault condition) in the current measuring device 50 based on the outputs of the first detection circuit 71 and the second detection circuit 81 (i.e., the first amplified voltage and the second amplified voltage). The first detection circuit 71 and the second detection circuit 81 are part of the current detection circuit 70 as illustrated in Fig. 2).
Or in the alternative, to advance prosecution, Imanaka is silent that the components are housed within a battery charger. It would have been obvious to one having ordinary skill in the art at the time the invention was made to house the cited components of Imanaka within a battery charger, since it has been held that rearranging parts of an invention involves only routine skill in the art.
However, Imanaka fails to explicitly teach configured to control the power-supply circuit so as to maintain the magnitude of the charge current at a desired current, based on a first difference between the first amplified voltage and a desired voltage, the desired voltage corresponding to the desired current, the desired current corresponding to a desired value of the charge current and varying in response to a state of the battery.
Shimizu teaches control the power-supply circuit so as to maintain the magnitude of the charge current at a desired current, based on a first difference between the first voltage and a desired voltage, the desired voltage corresponding to the desired current, the desired current corresponding to a desired value of the charge current and varying in response to a state of the battery (Fig. 3; ¶[98-99]; charging voltage (i.e., charging current) is controlled to be maintained at a desired level based on the difference between the voltages inputted into OP1. The non-inverting input into OP1 is the desired voltage which corresponds to the desired current, which corresponds to a desired value of the charging current which varies in response to the state of the battery, see ¶[104-106]).
Therefore, it would have been obvious for one of ordinary skill in the art to have adapted Shimizu’s battery charging control via feedback mechanism to Imanaka’s battery charging apparatus in order to have the ability to control the charging current using a responsive feedback method. The advantage to this modification being that the duty ratio of PWM signal can be adjusted based on target reference voltage, so that the reference voltage can be accurately reached to the target reference voltage. Hence, the charging voltage can be reached to target charging voltage accurately and battery can be charged at appropriate charging voltage (see ¶[28] of Shimizu).
With respect to claim 2, Imanaka teaches the invention as discussed above in claim 1. Further, Imanaka teaches wherein the voltage generator has a single shunt resistor having a first end and a second end (Fig. 6; a resistor 60 with a pair of electrodes 65A and 65B).
Imanaka teaches being on the charge current path so as to receive the charge current, and wherein the one or more voltages include a voltage between the first end and the second end (¶ [64]; on the current path X in which it is well known by one of ordinary skill the one or more voltages include a voltage between the pair of electrodes 65A and 65B).
With respect to claim 3, Imanaka teaches the invention as discussed above in claim 1. Further, Imanaka teaches wherein the voltage generator includes a first shunt resistor having a first end and a second end and being on the charge current path so as to receive the charge current (Fig. 8B; the resistance circuit 51 comprises a first resistor R1 having a first end and a second end and being on the current path X so as to receive the charge current).
Imanaka teaches a second shunt resistor having a third end and a fourth end and connected to the first shunt resistor in series so as to receive the charge current (Fig. 8B; the resistance circuit 51 comprises a second resistor R2 having a third end and a fourth end and connected to the first resistor R1 in series so as to receive the charge current).
Imanaka teaches wherein the one or more voltages include a first voltage between the first end and the second end of the first shunt resistor and a second voltage between the third end and the fourth end of the second shunt resistor (Fig. 8B; the one or more voltages include a first voltage Vr1 between the first end and the second end of the first resistor R1 and a second voltage Vr2 between the third end and the fourth end of the second resistor R2).
Imanaka teaches wherein the amplifier circuit is configured to amplify the first voltage to thereby generate and output the first amplified voltage and amplify the second voltage to thereby generate and output the second amplified voltage (Fig. 8B; the current detection circuit 70 is configured to amplify the first voltage Vr1 to thereby generate and output the first amplified voltage by amplifier 73 and amplify the second voltage Vr2 to thereby generate and output the second amplified voltage by amplifier 83).
With respect to claim 4, Imanaka teaches the invention as discussed above in claim 3. Further, Imanaka teaches wherein the amplifier circuit includes a first amplifier configured to amplify the first voltage to thereby generate and output the first amplified voltage (Fig. 8B; the current detection circuit 70 includes an amplifier 73 configured to amplify the first voltage Vr1 to thereby generate and output the first amplified voltage).
Imanaka teaches and a second amplifier being an electronic component independent from the first amplifier and configured to amplify the second voltage to thereby generate and output the second amplified voltage (Fig. 8B; the current detection circuit 70 includes an amplifier 83 being an electronic component independent from the amplifier 73 and configured to amplify the second voltage Vr2 to thereby generate and output the second amplified voltage).
With respect to claim 10, Imanaka teaches the invention as discussed above in claim 1. Further, Imanaka teaches wherein the one or more voltages include a first voltage and a second voltage, the second voltage being distinctive from the first voltage (Fig. 2; a first voltage Vr1 and a second voltage Vr12, the second voltage Vr12 being distinctive from the first voltage Vr1).
Imanaka teaches wherein the amplifier circuit includes a first amplifier configured to amplify the first voltage at a first accuracy and a second amplifier configured to amplify the second voltage at a second accuracy, the second accuracy being distinctive from the first accuracy (Fig. 2; ¶ [45-47]; the current detection circuit 70 includes an amplifier 73 configured to amplify the first voltage Vr1 at a first accuracy and an amplifier 83 configured to amplify the second voltage Vr12 at a second accuracy, the second accuracy being distinctive from the first accuracy).
With respect to claim 16, Imanaka teaches the invention as discussed above in claim 1. However, Imanaka fails to explicitly teach the limitations of claim 16.
Shimizu teaches wherein the feedback circuit includes a switching circuit configured to receive an input of a differential signal corresponding to the first difference to thereby generate a pulse-width modulation signal and output the pulse-width modulation signal to the power supply circuit (Fig. 3; ¶[104-106]; switching circuit 111 receives an input of a differential signal corresponding to the difference of OP1 to thereby generate a PWM modulation signal and output the signal to the power supply).
Therefore, it would have been obvious for one of ordinary skill in the art to have adapted Shimizu’s battery charging control via feedback mechanism to Imanaka’s battery charging apparatus in order to have the ability to control the charging current using a responsive feedback method. The advantage to this modification being that the duty ratio of PWM signal can be adjusted based on target reference voltage, so that the reference voltage can be accurately reached to the target reference voltage. Hence, the charging voltage can be reached to target charging voltage accurately and battery can be charged at appropriate charging voltage (see ¶[28] of Shimizu).
With respect to claim 17, Imanaka teaches the invention as discussed above in claim 1. However, Imanaka fails to explicitly teach the limitations of claim 17.
Shimizu teaches wherein the feedback circuit includes a photocoupler configured to transmit a differential signal corresponding to the first difference (Fig. 3; photocoupler 185 transmits a differential signal corresponding to the difference of OP1).
Therefore, it would have been obvious for one of ordinary skill in the art to have adapted Shimizu’s battery charging control via feedback mechanism to Imanaka’s battery charging apparatus in order to have the ability to control the charging current using a responsive feedback method. The advantage to this modification being that the duty ratio of PWM signal can be adjusted based on target reference voltage, so that the reference voltage can be accurately reached to the target reference voltage. Hence, the charging voltage can be reached to target charging voltage accurately and battery can be charged at appropriate charging voltage (see ¶[28] of Shimizu).
With respect to claim 18, Imanaka teaches the invention as discussed above in claim 1. However, Imanaka fails to explicitly teach the limitations of claim 18.
Shimizu teaches wherein the feedback circuit includes a comparator configured to receive an input of a measurement signal from the voltage generator and receive an input of a desired signal from the control circuit, and output a differential signal corresponding to the first difference, the measurement signal corresponding to the first amplified voltage, the desired signal corresponding to the desired voltage (Fig. 3; a comparator OP1 configured to receive an input of a measurement signal from the charging voltage detection circuit 183 and receive an input of a desired signal from the control unit 17, and output a differential signal corresponding to the first difference, the measurement signal corresponding to the first voltage, the desired signal corresponding to the desired voltage).
Therefore, it would have been obvious for one of ordinary skill in the art to have adapted Shimizu’s battery charging control via feedback mechanism to Imanaka’s battery charging apparatus in order to have the ability to control the charging current using a responsive feedback method. The advantage to this modification being that the duty ratio of PWM signal can be adjusted based on target reference voltage, so that the reference voltage can be accurately reached to the target reference voltage. Hence, the charging voltage can be reached to target charging voltage accurately and battery can be charged at appropriate charging voltage (see ¶[28] of Shimizu).
With respect to claim 19, Imanaka teaches the invention as discussed above in claim 1. However, Imanaka fails to explicitly teach the limitations of claim 19.
Shimizu teaches wherein the feedback circuit includes a comparator configured to receive an input of a measurement signal from the voltage generator and receive an input of a desired signal from the control circuit to thereby output a difference signal corresponding to the first difference, the measurement signal corresponding to the first amplified voltage, the desired signal corresponding to the desired voltage (Fig. 3; a comparator OP1 configured to receive an input of a measurement signal from the charging voltage detection circuit 183 and receive an input of a desired signal from the control unit 17, and output a differential signal corresponding to the first difference, the measurement signal corresponding to the first voltage, the desired signal corresponding to the desired voltage).
Shimizu teaches a photocoupler configured to receive the input of the difference signal from the comparator to thereby output the difference signal (Fig. 3; photocoupler 185 transmits a differential signal corresponding to the difference of OP1).
Shimizu teaches switching circuit configured to receive the input of the difference signal from the photocoupler to thereby generate a pulse-modulated signal and output the pulse-modulated signal to the power supply circuit (Fig. 3; ¶[104-106]; switching circuit 111 receives an input of a differential signal corresponding to the difference of OP1 to thereby generate a PWM modulation signal and output the signal to the power supply).
Therefore, it would have been obvious for one of ordinary skill in the art to have adapted Shimizu’s battery charging control via feedback mechanism to Imanaka’s battery charging apparatus in order to have the ability to control the charging current using a responsive feedback method. The advantage to this modification being that the duty ratio of PWM signal can be adjusted based on target reference voltage, so that the reference voltage can be accurately reached to the target reference voltage. Hence, the charging voltage can be reached to target charging voltage accurately and battery can be charged at appropriate charging voltage (see ¶[28] of Shimizu).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Imanaka in view of Shimizu, and further in view of Kikuchi (Japanese Patent JP-2000162249-A).
With respect to claim 6, Imanaka teaches the invention as discussed above in claim 5. Further, Imanaka teaches wherein the control circuit is configured to detect that the measurement circuit is in the fault condition (¶ [88]; the current detection circuit 70 is determined to be abnormal (i.e., in a fault condition) based on the first amplified voltage and the second amplified voltage not matching. One of ordinary skill understands the amplified voltages are out of the preset permissible ranges).
However, Imanaka fails to explicitly teach detect that the measurement circuit is in the fault condition based on the first difference being out of a preset third permissible range and/or the second difference being out of a preset fourth permissible range.
Kikuchi teaches detect that the measurement circuit is in the fault condition based on the first difference being out of a preset third permissible range and/or the second difference being out of a preset fourth permissible range (¶ [16-19]; one of ordinary skill understands the abnormality detection unit 30 detects whether an abnormality has occurred in the sensor 12 and the A/D converters 22/26 (i.e., the measurement circuit) based on the comparison of the differences with the reference output value to be within predetermined normal ranges).
Imanaka discloses the claimed invention except for calculating differences between the amplified voltages and the desired voltage and comparing these with permissible ranges to detect that the measurement circuit is in the fault condition. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s apparatus by adding Kikuchi’s fault condition detection method, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Imanaka in view of Shimizu, and further in view of Kobayakawa et al. (USPGPN 20140300366).
With respect to claim 8, Imanaka teaches the invention as discussed above in claim 1. However, Imanaka fails to explicitly teach wherein the control circuit is configured to, during the battery charger charging the battery, control the power-supply circuit to stop supply of the charge current therefrom based on the control circuit detecting that the measurement circuit is in the fault condition.
Kobayakawa teaches wherein the control circuit is configured to, during the battery charger charging the battery, control the power-supply circuit to stop supply of the charge current therefrom based on the control circuit detecting that the measurement circuit is in the fault condition (¶ [117]; if the current detecting unit 26 has failed during charging of the battery 10 as illustrated in Fig. 4 then the charge to the battery 10 from the charging device 80 is prohibited).
Imanaka discloses the claimed invention except for stopping supply of the charge current. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s apparatus by adding Kobayakawa’s power supply stopping method when the measurement circuit is in a faulted condition, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious.
Claims 9 and 11-14 are rejected under 35 U.S.C. 103 as being unpatentable over Imanaka in view of Shimizu, and further in view of Osawa et al. (Japanese Patent JP-5072561-B2).
With respect to claim 9, Imanaka teaches the invention as discussed above in claim 1. Further, Imanaka teaches wherein the one or more voltages include a first voltage, wherein the amplifier circuit includes a first amplifier configured to amplify the first voltage at a first accuracy and a second amplifier configured to amplify a second voltage at a second accuracy, the second accuracy being distinctive from the first accuracy (Fig. 2; ¶ [45-47]; the current detection circuit 70 includes an amplifier 73 configured to amplify the first voltage Vr1 at a first accuracy and an amplifier 83 configured to amplify the second voltage Vr12 at a second accuracy, the second accuracy being distinctive from the first accuracy).
However, Imanaka fails to explicitly teach a second amplifier configured to amplify the first voltage.
Osawa teaches a second amplifier configured to amplify the first voltage (Fig. 3; a second differential amplifier 2B is configured to amplify the voltage across resistor R. One of ordinary skill understands this is the same voltage amplified by the first differential amplifier 2A).
Imanaka discloses the claimed invention except for the second amplifier configured to amplify the first voltage. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s apparatus by adding Osawa’s second amplifier configured to amplify the first voltage, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious.
With respect to claim 11, Imanaka teaches the invention as discussed above in claim 9. Further, Imanaka teaches wherein the first amplifier is configured to input the first amplified voltage to the feedback circuit (Fig. 2; a feedback circuit as illustrated by the input and output of the current detection circuit 70 comprising the first amplifier 73 through bus 87 into the management unit 90 to control the current cutoff device 35 from the power-supply).
However, Imanaka fails to explicitly teach wherein the first accuracy is higher than the second accuracy.
Imanaka discloses the claimed invention except for wherein the first accuracy is higher than the second accuracy. It would have been obvious to one having ordinary skill in the art at the time the invention was made to make the first accuracy higher than the second accuracy, since it has been held that a mere reversal of the essential working parts of a device involves only routine skill in the art.
With respect to claim 12, Imanaka teaches the invention as discussed above in claim 10. Further, Imanaka teaches wherein the first amplifier is configured to input the first amplified voltage to the feedback circuit (Fig. 2; a feedback circuit as illustrated by the input and output of the current detection circuit 70 comprising the first amplifier 73 through bus 87 into the management unit 90 to control the current cutoff device 35 from the power-supply).
However, Imanaka fails to explicitly teach wherein the first accuracy is higher than the second accuracy.
Imanaka discloses the claimed invention except for wherein the first accuracy is higher than the second accuracy. It would have been obvious to one having ordinary skill in the art at the time the invention was made to make the first accuracy higher than the second accuracy, since it has been held that a mere reversal of the essential working parts of a device involves only routine skill in the art.
With respect to claim 13, Imanaka teaches the invention as discussed above in claim 9. Further, Imanaka teaches wherein the first voltage is lower than the second voltage (Fig. 2; the first voltage Vr1 is smaller than the second voltage Vr12. One of ordinary skill may apply Ohm’s Law to understand that if the current is the same and the resistance increases then the voltage drop across the resistances increases).
However, Imanaka fails to explicitly teach wherein the first amplifier includes a first differential amplifier having a first offset voltage, wherein the second amplifier includes a second differential amplifier having a second offset voltage, and wherein the first offset voltage is lower than the second offset voltage.
Osawa teaches wherein the first amplifier includes a first differential amplifier having a first offset voltage, wherein the second amplifier includes a second differential amplifier having a second offset voltage (¶ [13]; the first differential amplifier 2A has a first offset voltage and the second differential amplifier 2B has a second offset voltage).
Imanaka discloses the claimed invention except for the second amplifier configured to amplify the first voltage. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s apparatus by adding Osawa’s first and second differential amplifiers with a first and second offset voltage, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious.
Imanaka discloses the claimed invention except for wherein the first offset voltage is lower than the second offset voltage. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s voltage inputs by considering the offset voltages of the differential amplifiers in Osaka to have the first offset voltage lower than the second offset voltage, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art.
With respect to claim 14, Imanaka teaches the invention as discussed above in claim 10. Further, Imanaka teaches wherein the first voltage is lower than the second voltage (Fig. 2; the first voltage Vr1 is smaller than the second voltage Vr12. One of ordinary skill may apply Ohm’s Law to understand that if the current is the same and the resistance increases then the voltage drop across the resistances increases).
However, Imanaka fails to explicitly teach wherein the first amplifier includes a first differential amplifier having a first offset voltage, wherein the second amplifier includes a second differential amplifier having a second offset voltage, and wherein the first offset voltage is lower than the second offset voltage.
Osawa teaches wherein the first amplifier includes a first differential amplifier having a first offset voltage, wherein the second amplifier includes a second differential amplifier having a second offset voltage (¶ [13]; the first differential amplifier 2A has a first offset voltage and the second differential amplifier 2B has a second offset voltage).
Imanaka discloses the claimed invention except for the second amplifier configured to amplify the first voltage. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s apparatus by adding Osawa’s first and second differential amplifiers with a first and second offset voltage, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious.
Imanaka discloses the claimed invention except for wherein the first offset voltage is lower than the second offset voltage. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imanaka’s voltage inputs by considering the offset voltages of the differential amplifiers in Osaka to have the first offset voltage lower than the second offset voltage, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art.
Relevant Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
The following were identified by the applicant in the Information Disclosure Statement (IDS) and/or were cited in Foreign Office actions, however, were not relied upon by the examiner for citation purposes:
WO 2016047010 A1
JP 2014204571 A
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Frank A Silva whose telephone number is (703)756-1698. The examiner can normally be reached Monday - Friday 09:30 am -06:30 pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FRANK ALEXIS SILVA/Examiner, Art Unit 2859
/DREW A DUNN/Supervisory Patent Examiner, Art Unit 2859