Prosecution Insights
Last updated: July 17, 2026
Application No. 18/086,225

THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY MODULE COMPRISING SAME

Final Rejection §102§103
Filed
Dec 21, 2022
Priority
Jun 25, 2020 — RE 10-2020-0078041 +2 more
Examiner
DEGRASSE, IAN ISAAC
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
4 (Final)
77%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
74%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
17 granted / 22 resolved
+9.3% vs TC avg
Minimal -4% lift
Without
With
+-3.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
42 currently pending
Career history
74
Total Applications
across all art units

Statute-Specific Performance

§103
75.5%
+35.5% vs TC avg
§102
20.5%
-19.5% vs TC avg
§112
4.1%
-35.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 22 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5, 7-11 and 13-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2019/0295475 A1 to Lee et al. (hereinafter “Lee” – previously cited reference). Regarding claim 1, Lee discloses a thin film transistor (TFT) substrate comprising: a substrate (TFT having glass substrate SUB; Figs. 2, 4 and 17; paragraphs [0052], [0060], [0087]); a first inorganic insulating layer provided on the substrate (gate insulating area GI made from inorganic material and disposed on SUB; Figs. 2, 4 and 17; paragraphs [0090], [0092]); a second inorganic insulating layer provided on the first inorganic insulating layer (interlayer insulating layer IL made from inorganic material and disposed on GI; Figs. 2, 4 and 17; paragraph [0096]); a first metal layer provided between the first inorganic insulating layer and the second inorganic insulating layer (lower electrode LE made from metal and disposed between GI and IL; Figs. 2, 4 and 17; paragraph [0094]); a second metal layer provided on the second inorganic insulating layer (upper electrode UE made from metal and disposed on IL; Figs. 2, 4 and 17; paragraph [0097]); a first organic insulating layer provided on the second inorganic insulating layer (first insulating layer INS1 made from organic material and disposed on IL; Figs. 2, 4 and 17; paragraph [0099]); a second organic insulating layer provided on the first organic insulating layer (second insulating layer INS2 made from organic material and disposed on INS1; Figs. 2, 4 and 17; paragraphs [0103]-[0104]); a third organic insulating layer provided on the second organic insulating layer (pixel defining layer PDL made from organic material and disposed on INS2; Figs. 2, 4 and 17; paragraphs [0107], [0114]); a third metal layer formed between the first organic insulating layer and the second organic insulating layer (source electrode SE made from metal and disposed between INS1 and INS2; Figs. 2, 4 and 17; paragraphs [0100]-[0101]); and a fourth metal layer provided between the second organic insulating layer and the third organic insulating layer (first electrode EL1 made from metal and disposed between INS2 and PDL; Figs. 2, 4 and 17; paragraphs [0105], [0111]-[0112]), wherein at least one of the second organic insulating layer and the third organic insulating layer is configured to absorb light (INS2 and PDL may be made from polyimide resins which are known to be light absorptive; paragraphs [0104], [0114]), wherein a portion of the second inorganic insulating layer covers the first metal layer, wherein the portion of the second inorganic insulating layer comprises a first protrusion protruding substantially corresponding to a thickness of the first metal layer (interlayer insulating layer IL disposed over lower electrode LE and having a vertical protrusion having dimensions directly corresponding to the thickness of the electrode LE; Fig. 17), wherein the first protrusion protrudes further toward the first organic insulating layer than an interface between the second inorganic insulating layer and the first organic insulating layer, and wherein the interface includes a flat portion horizontally extended from a first end of the first protrusion of the second inorganic insulating layer to a first end of the second metal layer (vertical protrusion situated toward layer INS1 more than a flat planar portion of layer IL that interfaces with layer INS1 from first end of vertical protrusion to a first end of upper electrode UE; Figs. 4 and 17). Regarding claim 2, Lee discloses the TFT substrate of claim 1, wherein each of the second organic insulating layer and the third organic insulating layer has a black-based color that absorbs light (INS2 and PDL may be made from polyimide resins which are known to have a dark color and to comprise carbon; paragraphs [0104], [0114]). Regarding claim 3, Lee discloses the TFT substrate of claim 1, wherein the third organic insulating layer comprises carbon (INS2 and PDL may be made from polyimide resins which are known to comprise carbon; paragraphs [0104], [0114]). Regarding claim 4, Lee discloses the TFT substrate of claim 3, wherein the second organic insulating layer comprises carbon (INS2 and PDL may be made from polyimide resins which are known to comprise carbon; paragraphs [0104], [0114]). Regarding claim 5, Lee discloses the TFT substrate of claim 1, wherein the substrate is a glass substrate, a synthetic resin-based substrate having a flexible material, or a ceramic substrate (glass substrate SUB; paragraph [0087]). Regarding claim 7, Lee discloses a display module comprising: a substrate (display device having glass substrate SUB; Figs. 2, 4 and 17; paragraphs [0052], [0087]); and a plurality of self-luminous devices provided on the substrate (display device having plurality of OLED pixels on SUB; paragraphs [0052], [0058]); wherein the substrate comprises: a glass substrate, a first inorganic insulating layer, a second inorganic insulating layer, a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer sequentially stacked on the glass substrate (gate insulating area GI, interlayer insulating layer IL, first organic insulating layer INS1, second organic insulating layer INS2, and third organic insulating layer INS3 disposed in order on glass substrate SUB; Figs. 2, 4 and 17; paragraphs [0087], [0099], [0103]-[0104], [0200]), and a first metal layer provided between the first inorganic insulating layer and the second inorganic insulating layer (lower electrode LE made from metal and disposed between GI and IL; Figs. 2, 4 and 17; paragraph [0094]), a second metal layer provided on the second inorganic insulating layer (upper electrode UE made from metal and disposed on IL; Figs. 2, 4 and 17; paragraph [0097]); and a fourth metal layer provided between the second organic insulating layer and the third organic insulating layer (connection pattern CNP made from metal and disposed between INS2 and INS3; Figs. 2, 4 and 17; paragraph [0201]), wherein at least one of the second organic insulating layer and the third organic insulating layer is configured to absorb light (INS2 and INS3 may be made from polyimide resins which are known to be light absorptive; paragraphs [0104], [0200]), wherein a portion of the second inorganic insulating layer covers the first metal layer, wherein the portion of the second inorganic insulating layer comprises a first protrusion protruding substantially corresponding to a thickness of the first metal layer (interlayer insulating layer IL disposed over lower electrode LE and having a vertical protrusion having dimensions directly corresponding to the thickness of the electrode LE; Fig. 17), wherein the first protrusion protrudes further toward the first organic insulating layer than an interface between the second inorganic insulating layer and the first organic insulating layer, and wherein the interface includes a flat portion horizontally extended from a first end of the first protrusion of the second inorganic insulating layer to a first end of the second metal layer (vertical protrusion situated toward layer INS1 more than a flat planar portion of layer IL that interfaces with layer INS1 from first end of vertical protrusion to a first end of upper electrode UE; Figs. 4 and 17). Regarding claim 8, Lee discloses the display module of claim 7, wherein each of the second organic insulating layer and the third organic insulating layer has a black-based color (INS2 and INS3 may be made from polyimide resins which are known to have a dark color and to comprise carbon; paragraphs [0104], [0200]). Regarding claim 9, Lee discloses the display module of claim 7, wherein the third organic insulating layer comprises carbon (INS2 and INS3 may be made from polyimide resins which are known to have a dark color and to comprise carbon; paragraphs [0104], [0200]). Regarding claim 10, Lee discloses the display module of claim 9, wherein the second organic insulating layer comprises carbon (INS2 and INS3 may be made from polyimide resins which are known to have a dark color and to comprise carbon; paragraphs [0104], [0200]). Regarding claim 11, Lee discloses the display module of claim 7, wherein each of the second organic insulating layer and the third organic insulating layer is configured to absorb light (INS2 and INS3 may be made from polyimide resins which are known to have a dark color and to comprise carbon; paragraphs [0104], [0200]). Regarding claim 13, Lee discloses the display module of claim 7, wherein the third organic insulating layer has a second protrusion that protrudes further than a surface of the third organic insulating layer due to the first protrusion (INS3 comprises first bottom surface defined by CNP protrusion that protrudes below second bottom surface of INS3; Figs. 2, 4 and 17). Regarding claim 14, Lee discloses the display module of claim 7, wherein the substrate is provided with a plurality of thin film transistor (TFT) electrode pads to which a chip electrode pad of each self-luminous device of the plurality of self-luminous devices is connected (each OLED pixel PXL comprises a TFT having scan driver chip with second electrode EL2 connected to first electrode EL1; Figs. 2, 4 and 17; paragraphs [0060], [0073]-[0074], [0195], [0198]), and a length of each TFT electrode pad is longer than a length of each self-luminous device of the plurality of self-luminous devices (second electrode EL2 has a length longer than that of the pixel PXL; Figs. 2, 4 and 17). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in further view of US 2015/0101919 A1 to Bae et al (hereinafter “Bae” – previously cited reference). Regarding claims 6 and 12, Lee discloses the TFT substrate of claim 1 and the display module of claim 7. Lee fails to disclose wherein the third organic insulating layer has a rough surface formed by a plasma surface treatment. However, Bae discloses wherein the third organic insulating layer has a rough surface formed by a plasma surface treatment (insulating interlayer 140 may be made from organic acryl-based resin and roughened by plasma treatment; paragraphs [0074], [0076], [0078]). Lee and Bae are both considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee to incorporate the teaching of Bae in order to potentially provide improved adhesion of subsequent layers, enhanced wettability and coating uniformity, and improved electrical insulation and charge control. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in further view of US 2016/0189644 A1 to So et al. (hereinafter “So” – previously cited reference). Regarding claim 15, Lee discloses the display module of claim 7. Lee further discloses wherein the substrate is provided with a plurality of thin film transistor (TFT) electrode pads to which a chip electrode pad of each self-luminous device of the plurality of self-luminous devices is connected (each OLED pixel PXL comprises a TFT having scan driver chip with second electrode EL2 connected to first electrode EL1; Figs. 2, 4 and 17; paragraphs [0060], [0073]-[0074], [0195], [0198]). Lee fails to disclose wherein at least one of the plurality of TFT electrode pads comprises a mounting area and a redundancy area extending from the mounting area to allow the self-luminous device for repair to be mounted thereon. However, Bae discloses wherein at least one of the plurality of TFT electrode pads comprises a mounting area and a redundancy area extending from the mounting area to allow the self-luminous device for repair to be mounted thereon (electrode pad PAD of TFT pixel circuit C11 using connection area 220 with dummy area DA extending therefrom which is capable of allowing an OLED pixel to be repaired thereon; Fig. 2; paragraphs [0007], [0072], [0075]-[0076], [0079]). Lee and Bae are both considered to be analogous to the claimed invention because they are in the same field of display devices. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee to incorporate the teaching of Bae in order to potentially provide more efficient repairability, improved manufacturing yield, and increased device reliability. Response to Arguments Applicant's arguments filed March 30, 2026 have been fully considered. Applicant presents amendments and related arguments with respect to amended claims 1 and 7 relative to Lee. Applicant asserts that there is no flat portion horizontally extended from a first end of the protrusion to a first end of the upper electrode, but Applicant ignores the flat portion horizontally extending from the left side of the ‘protrusion’ of layer IL in Applicant’s reproduced annotated Fig. 17 (on labeled page 9 of the arguments) to the right side of the upper electrode UE portion adjacent the protrusion (not the distant portion of UE circled by Applicant). Therefore, amended claims 1 and 7 do not overcome the 35 USC 102 rejection using Lee. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF NATALINI can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IAN DEGRASSE/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

Show 5 earlier events
Aug 07, 2025
Response Filed
Sep 03, 2025
Final Rejection mailed — §102, §103
Oct 30, 2025
Response after Non-Final Action
Dec 02, 2025
Request for Continued Examination
Dec 10, 2025
Response after Non-Final Action
Jan 13, 2026
Non-Final Rejection mailed — §102, §103
Mar 30, 2026
Response Filed
Jun 15, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
77%
Grant Probability
74%
With Interview (-3.6%)
3y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 22 resolved cases by this examiner. Grant probability derived from career allowance rate.

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