Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species II, Figure 1B in the reply filed on 11/07/2025 is acknowledged.
Examiner contacted applicant’s representative, Justin Brask (Reg. No. 61080), on December 23, 2025 to clarify the species election as Species I is directed to Figure 1B and Species II is directed to Figure 1C. Mr. Brask clarified that the election is for Species II, Figure 1C.
Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/7/2025.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takemae et al (US 2012/0235210 and Takemae hereinafter).
As to claims 1-5: Takemae discloses [claim 1] an integrated circuit structure (Fig. 15B; [0156]), comprising: a layer (Fig. 11A; 68; [0157]) comprising gallium and nitrogen (GaN; [0157]), the layer (68) comprising gallium and nitrogen above a silicon substrate (64; [0157]); a gate structure (Fig. 15B; 54; [0156]) over the layer (68) comprising gallium and nitrogen; a source region (S1; [0156]) on a first side (left side) of the gate structure (54); a drain region (D1; [0156]) on a second side (right side) of the gate structure (54); and a source field plate (FP4 is connected to the source and is interpreted to be a source field plate; [0156]) laterally between the gate structure (54) and the drain region (D1), the source field plate (FP4) laterally separated (by a gap) from the gate structure (54); [claim 2] wherein a voltage associated with the source field plate (FP4 is connected to the source voltage, which can be 0 V; [0156] and [0060]-[0062]) is different from a gate voltage (positive voltage; [0062]) associated with the gate structure; [claim 3] wherein the source field plate (FP4) has a top surface (uppermost surface), wherein the top surface (uppermost surface) of the source field plate (FP4) is substantially coplanar with a top surface (uppermost surface) of the gate structure (54); [claim 4] wherein the gate structure (54) has a T-shaped gate structure (structure 54 shown in Fig. 15B shows a horizontal portion connected to a vertical portion that is interpreted to be “T” shaped); [claim 5] further comprising: a layer (66; [0157]) comprising aluminum and nitrogen (AlN; [0157]), the layer (66) comprising aluminum and nitrogen between the layer (68) comprising gallium and nitrogen and the silicon substrate (64).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over Sihu et al (CN 113241378 and Sihu hereinafter; a machine translation is used as an English language equivalent) in view of Takemae.
As to claims 6-10: Sihu discloses [claim 6] a computing device (Fig. 8; 1000; [0151]), comprising: a board (1002; [0151]); and a component (integrated circuit structure formed within 1006; [0155]) coupled to the board (1002), the component including an integrated circuit structure (integrated circuit structure; [0155]); [claim 7] further comprising: a memory (DRAM; [0152]) coupled to the board (1002); [claim 8] further comprising: a power delivery chip (power amplifier will deliver amplified power to components; [0152]) coupled to the board (1002); [claim 9] further comprising: a camera (camera; [0152]) coupled to the board (1002); [claim 10] wherein the component (integrated circuit structure) is a packaged integrated circuit die ([0155]).
Sihu fails to expressly disclose where the integrated circuit structure comprises [claim 6] a layer comprising gallium and nitrogen, the layer comprising gallium and nitrogen above a silicon substrate; a gate structure over the layer comprising gallium and nitrogen; a source region on a first side of the gate structure; a drain region on a second side of the gate structure; and a source field plate laterally between the gate structure and the drain region, the source field plate laterally separated from the gate structure.
Sihu discloses that the integrated circuit structure can comprise a HEMT ([0105]).
Takemae discloses a HEMT that comprises [claim 6] a layer (Fig. 11A; 68; [0157]) comprising gallium and nitrogen (GaN; [0157]), the layer (68) comprising gallium and nitrogen above a silicon substrate (64; [0157]); a gate structure (Fig. 15B; 54; [0156]) over the layer (68) comprising gallium and nitrogen; a source region (S1; [0156]) on a first side (left side) of the gate structure (54); a drain region (D1; [0156]) on a second side (right side) of the gate structure (54); and a source field plate (FP4 is connected to the source and is interpreted to be a source field plate; [0156]) laterally between the gate structure (54) and the drain region (D1), the source field plate (FP4) laterally separated (by a gap) from the gate structure (54).
Given the teachings of Then, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Sihu by employing the well-known or conventional features of HEMT fabrication, such as displayed by Takemae, by employing a gallium nitride based HEMT with a source field plate laterally separated from the gate structure and placed between the gate and the drain region in order to provide a device with a high withstand voltage ([0174]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH C NICELY whose telephone number is (571)270-3834. The examiner can normally be reached Monday-Friday 7:30 am - 4 pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at (571) 270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JOSEPH C. NICELY
Primary Examiner
Art Unit 2813
/JOSEPH C. NICELY/Primary Examiner, Art Unit 2813
12/27/2025