Prosecution Insights
Last updated: October 02, 2026

Examiner: NICELY, JOSEPH C

Tech Center 2800 • Art Units: 2813

This examiner grants 78% of resolved cases

Analysis

Joseph C Nicely is an examiner in Tech Center 2800 and Art Unit 2813. The examiner has 804 resolved cases. The data shows an allowance rate of 77.6 percent, which indicates the frequency of patent grants for applications in this unit. The median days to allowance for these cases is 875. This timeframe provides a clear expectation for the duration of the prosecution process.

The interview lift is 20.0 percent. This figure suggests that conducting an interview has a significant impact on the probability of success compared to the 77.6 percent allowance rate. Applicants may find that verbal communication is a highly effective strategy. The 804 resolved cases provide a stable basis for these observations.

In Art Unit 2813, the 875 median days to allowance reflects the typical speed of the examination cycle. The 20.0 percent interview lift represents a substantial improvement in outcomes. Practitioners should prioritize an interview when developing their strategy for Tech Center 2800.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

77.7%
Allow Rate
+9.7% vs TC avg
839
Total Applications
+19.8%
Interview Lift
876
Avg Prosecution Days
Based on 808 resolved cases, 2023–2026

Rejection Statute Breakdown

1.3%
§101 Eligibility
18.2%
§102 Novelty
51.9%
§103 Obviousness
20.4%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18412778 MAGNETIC MEMORY DEVICE Non-Final OA Samsung Electronics Co., Ltd.
18502702 SEMICONDUCTOR PACKAGE Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18302905 DISPLAY DEVICE AND METHOD OF PROVIDING THE SAME Non-Final OA Samsung Display Co., LTD.
18115617 SEMICONDUCTOR DEVICE Non-Final OA Toshiba Electronic Devices & Storage Corporation
18179197 SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE Final Rejection HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
18671908 ELECTRONIC APPARATUS AND MANUFACTURING METHOD THEREOF Non-Final OA Innolux Corporation
18088546 GALLIUM NITRIDE (GAN) TRANSISTORS WITH LATERAL DRAIN DEPLETION Final Rejection Intel Corporation
18567162 III-V, II-VI IN-SITU COMPLIANT SUBSTRATE FORMATION Final Rejection The Regents of the University of California
18975715 SiC UV PHOTODETECTOR Non-Final OA BAE SYSTEMS Information and Electronic Systems Integration Inc.
18497409 SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SAME Final Rejection Infineon Technologies Austria AG
17502692 FIELD PLATE ARRANGEMENT FOR TRENCH GATE FET Final Rejection TEXAS INSTRUMENTS INCORPORATED
18511007 TWIN CHANNEL ACCESS DEVICE FOR VERTICAL THREE-DIMENSIONAL MEMORY Non-Final OA Micron Technology, Inc.
18156120 WIDE BAND GAP TRANSISTOR WITH NANOLAMINATED INSULATING GATE STRUCTURE AND PROCESS FOR MANUFACTURING A WIDE BAND GAP TRANSISTOR Final Rejection STMICROELECTRONICS S.r.l.
18603046 Semiconductor Structure with Gate Isolation Layer and Manufacturing Method Thereof Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18063787 TRANSISTOR DEVICES INCLUDING SELF-ALIGNED OHMIC CONTACTS AND CONTACT REGIONS AND RELATED FABRICATION METHODS Non-Final OA Wolfspeed, Inc.
18360555 SEMICONDUCTOR DIE STACKING ARCHITECTURE AND CONNECTION METHOD THEREFORE Final Rejection Sandisk Technologies, Inc.
18502103 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Final Rejection UNITED MICROELECTRONICS CORP.
18201163 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Final Rejection United Semiconductor (Xiamen) Co., Ltd.
18513678 DISPLAY MODULE Non-Final OA South China University of Technology
18228713 FIELD-EFFECT TRANSISTORS WITH A GATE DIELECTRIC LAYER FORMED ON A SURFACE TREATED BY ATOMIC LAYER ETCHING Final Rejection GlobalFoundries U.S. Inc.
18602879 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR Non-Final OA ENKRIS SEMICONDUCTOR, INC.
18522920 COMMON DRAIN BIDIRECTIONAL SWITCH Non-Final OA Infineon Technologies Canada Inc.

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