Prosecution Insights
Last updated: July 17, 2026
Application No. 18/089,476

THIN FILM CAPACITORS (TFCS) IN ETCHED BACK DEEP VIA

Non-Final OA §102§103
Filed
Dec 27, 2022
Examiner
LOPEZ, JORGE ANDRES
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
97%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 97% — above average
97%
Career Allowance Rate
29 granted / 30 resolved
+28.7% vs TC avg
Minimal +4% lift
Without
With
+4.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
34 currently pending
Career history
65
Total Applications
across all art units

Statute-Specific Performance

§103
93.3%
+53.3% vs TC avg
§102
6.7%
-33.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 30 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election without traverse of “Group I and Species C (Claims 1-6 and 8-11)” in the reply filed on 04/16/2026, is acknowledged. Claims 7 and 12-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected group or species, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 102 (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2,6, and 10-11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2022/0285480 A1; Kalnitsky et al.; 09/2022; (“480”). Regarding Claim 1. 480 teaches in Fig. 1 about an electronic package comprising: a package substrate (item 100), wherein the package substrate comprises a plurality of stacked dielectric layers (dielectric stack item 108); an opening into the package substrate (opening item 109), wherein the opening passes through at least two of the plurality of dielectric layers (opening item 109 passes through the dielectric stack item 108); a first pad at the bottom of the opening (item 106 at the bottom of opening item 109); a capacitor disposed in the opening (structure of capacitor item 118 is disposed within opening item 109); and a second pad over the capacitor (top horizontal section of item 130). Regarding Claim 2. 480 teaches in Fig. 1 about an electronic package comprising: a first electrode that lines the opening (item 126 lines item 109); a capacitor dielectric that lines the first electrode (item 128 lines item 126); and a second electrode that at least partially fills a remainder of the opening (item 130 at least partially fills a remainder of opening item 109). Regarding Claim 6. 480 teaches in Fig. 1 about an electronic package, wherein the capacitor has a saw tooth profile (saw tooth profile of capacitor structure item 118). Regarding Claim 10. 480 teaches in Fig. 1 about an electronic package, wherein a cavity (item 114) is provided along a sidewall of the opening (item 114 is provided along sidewall of opening 109), and wherein the capacitor lines the cavity (capacitor protrusion item 120 lines cavity item 114). Regarding Claim 11. 480 teaches in Fig. 1 about an electronic package, wherein the electronic package is part of a computing system for a personal computer, a server, a mobile device, a tablet, or an automobile (“integrated chips also comprise passive devices, such as capacitors”, [0002], Ln. 6-7). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-4 are rejected under 35 U.S.C. 103 as being obvious over US 2022/0285480 A1; Kalnitsky et al.; 09/2022; (“480”). Regarding Claim 3. 480 teaches in Fig. 1 about an electronic package, wherein a thickness range of the first electrode is thinner than a thickness range of the capacitor dielectric (“the first electrode 126 … thickness that is in a range of between approximately 10 Angstroms (Å) and approximately 200 Å … the capacitor dielectric 128 may have a thickness that is in a range of between approximately 5 Angstroms (Å) and approximately 500 Å”, [0029], Ln. 8-22). 480 does not teach about an electronic package, wherein a thickness of the first electrode is thinner than a thickness of the capacitor dielectric. It would have been an obvious matter of design choice to choose a thinner first electrode compared to the thickness of the capacitor dielectric, since such a modification would have involved a mere change in the size of component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP 2144.04. Regarding Claim 4. 480 teaches in Fig. 1 about an electronic package, wherein a resistivity of the first electrode is not compared to the resistivity of the second electrode. 480 does not teach about an electronic package, wherein a resistivity of the first electrode is higher than a resistivity of the second electrode. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to try different materials with low resistivity (specially for cases where the plates of a capacitor are asymmetrical from each other), with routine experiment and optimization. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). Claim 8 is rejected under 35 U.S.C. 103 as being obvious over US 2022/0285480 A1; Kalnitsky et al.; 09/2022; (“480”) in view of US 12,635,539 B2; Jang et al.; 05/2026; (“539”). Regarding Claim 8. 480 teaches in Fig. 1 about an electronic package, wherein the opening has sawtooth profile sidewalls with a top end that is the same width than a bottom end. 480 does not teach about an electronic package, wherein the opening has tapered sidewalls with a top end that is wider than a bottom end. 539 teaches in Fig. 2 about an electronic package, wherein the opening (item 150T) has tapered sidewalls with a top end that is wider than a bottom end (top end of opening 150T is wider than bottom end). Thus, it would have been obvious to try by one of ordinary skill in the art, at the time the invention was made, to consider utilizing the tapered sidewalls of the opening for the molding of the entrenched capacitor of 539 to house the capacitor withing a vertically tapered structure in 480 in order to provide a top and a bottom pad for the entrenched capacitor as taught by 539 in Fig. 2 and Col. 4, Ln. 1-13. Allowable Subject Matter Claims 5 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art does not teach or suggest the claimed limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORGE ANDRES LOPEZ whose telephone number is (571)272-5763. The examiner can normally be reached M-F (8:30am to 5:00pm). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached on 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897 /JORGE ANDRES LOPEZ/Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Dec 27, 2022
Application Filed
Aug 02, 2023
Response after Non-Final Action
Jun 29, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
97%
Grant Probability
99%
With Interview (+4.5%)
3y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 30 resolved cases by this examiner. Grant probability derived from career allowance rate.

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