DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
2. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Dory et al (US 7,371,975; hereinafter Dory).
Regarding claim 1, Dory discloses a package core (see figure 3), comprising: a substrate (202) with a first surface and a second surface opposite from the first surface (see figures 2 and 3), wherein the substrate (202) comprise glass (column 4 lines 27-38); a via (221, 225) through the substrate (202), wherein the via (221, 225) is electrically conductive (see figure 3); a recess (see figures 2 and 3) into the first surface of the substrate (202); and a trace (222, 224) embedded in the recess (see figure 3), wherein the trace (222, 224) is electrically conductive (column 6 lines 40-45).
Regarding claim 2, Dory discloses the package core (see figure 3), wherein the trace (222, 224) is electrically coupled to the via (221, 225).
Regarding claim 3, Dory discloses the package core (see figure 3), wherein the trace (222, 224) and the via (221, 225) comprise copper (column 6 lines 40-45).
Regarding claim 4, Dory discloses the package core (see figure 3), wherein the recess (see figure 3) has tapered sidewalls (column 6 lines 4-20; different geometries).
Regarding claim 5, Dory discloses the package core (see figure 3), wherein the via (221,225) has tapered sidewalls (column 6 lines 4-20; different geometries).
Regarding claim 6, Dory discloses the package core (see figure 3), wherein the via (221,225) has an hourglass shaped cross- section(column 6 lines 4-20; different geometries).
Regarding claim 7, Dory discloses the package core (see figure 3), further comprising: a recess (242; see figures 2 and 3) in the second surface of the substrate (202); and a second trace in the recess in the second surface of the substrate (see figures 2 and 3).
Regarding claim 8, Dory discloses the package core (see figure 3), further comprising: a blind hole (see figure 3) into the first surface of the substrate (202), wherein the blind hole is filled with an electrically conductive material (see figure 3; column 6 lines 40-45) .
Regarding claim 9, Dory discloses the package core (see figure 3), wherein the substrate (202) comprises substantially all glass (column 4 lines 27-38).
Regarding claim 10, Dory discloses the package core (see figure 3), further comprising: organic buildup layers (302; column 4 lines 27-38) over and under the substrate (202).
Regarding claim 11, Dory discloses the package core (see figure 3), wherein the substrate (202) is coupled to a processor of a computing system, and wherein the computing system is part of a personal computer, a server, a mobile device, a tablet, or an automobile (column 1 lines 26-62 and column 3 lines 48-64).
Regarding claim 12, Dory discloses a package substrate (see figure 3), comprising: a core (202); buildup layers above (302) and below (see figure 1) the core (202); conductive routing through the core (202) and the buildup layers (see figure 1), wherein a first end of the conductive routing has first pads (see figure 3) with a first pitch and a second end of the conductive routing has second pads (see figure 3) with a second pitch that is smaller than the first pitch (see figure 3), and wherein the conductive routing comprises at least one trace (221,225) on the core and a via (222, 224) through the core (see figure 3).
Regarding claim 13, Dory discloses the package substrate (see figure 3), wherein the at least one trace (222,224) is embedded in the core (see figure 3).
Regarding claim 14, Dory discloses the package substrate (see figure 3), wherein the at least one trace (221,224) has sloped sidewalls (column 6 lines 4-20; different geometries).
Regarding claim 15, Dory discloses the package substrate (see figure 3), wherein the via (221,225) has tapered sidewalls (column 6 lines 4-20; different geometries).
Regarding claim 16, Dory discloses the package core (see figure 3), wherein the via (221,225) has an hourglass shaped cross-section(column 6 lines 4-20; different geometries).
Regarding claim 17, Dory discloses the package substrate (see figure 3), wherein the first pads are coupled to a board (24; column 4 lines 7-16), and wherein the second pads are coupled to a die (10; see figure 1).
Regarding claim 18, Dory discloses a computing system (see figure 1), comprising: a board (24); a package substrate (see figure 1) coupled to the board (24), wherein the package substrate (see figure 2) comprises: a core (202), wherein the core (202) comprises glass (column 4 lines 27-38); a via (221,225) through the core (202); a trace (222, 224) embedded in the core (202); and buildup layers over and under the core (see figures 1-3); and a die (10) coupled to the package substrate (see figure 1).
Regarding claim 19, Dory discloses the computing system (see figure 1), wherein the die (10) is a processor, a system on a chip (SoC), an XPU, a graphics processor, a communication chip, or an ASIC (column 3 lines 48-64; integrated circuit).
Regarding claim 20, Dory discloses the computing system (see figure 1), wherein the computing system is part of a personal computer, a server, a mobile device, a tablet, or an automobile (column 1 lines 26-62 and column 3 lines 48-64).
Conclusion
3. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Ryu et al (US 12,089,329), Pietambaram et al (US 11,791,269), Park et al (US 11,627,659), Maeda et al (US 8,847,082), Ma et al (US 8,207,453), Chia (US 8,058,723), Iijima et al (US 6,783,652) and Furutani et al (US 8,975,742) disclose a package substrate.
4. Any inquiry concerning this communication should be directed to Angel R. Estrada at telephone number (571) 272-1973. The Examiner can normally be reached on Monday-Friday (8:30am -5:00pm).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Imani N. Hayman can be reached on (571) 270-5528. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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March 2, 2026
/ANGEL R ESTRADA/Primary Examiner, Art Unit 2841
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