Prosecution Insights
Last updated: October 01, 2026
Application No. 18/089,838

MEMORY DEVICE AND METHOD OF FORMING THE SAME

Final Rejection §102§112
Filed
Dec 28, 2022
Priority
Dec 22, 2022 — CN 202211659427.3
Examiner
MILLER, JAMI VALENTINE
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Yangtze Memory Technologies Co., Ltd.
OA Round
2 (Final)
95%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
1040 granted / 1096 resolved
+26.9% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 12m
Avg Prosecution
34 currently pending
Career history
1111
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
31.1%
-8.9% vs TC avg
§102
41.6%
+1.6% vs TC avg
§112
25.3%
-14.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1096 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Application Acknowledgement is made of the amendment received 7/1/26. Claims 1-12 and 21-28 are pending in this application. Claims 1, 5-6, 8, 10, 21, 25 and 28 were amended, claims 13-20 were cancelled in the amendment received 7/1/26. Response to Arguments Applicant's arguments filed 7/1/26 have been fully considered but they are not persuasive. Applicant’s arguments (pages 8-9) with respect to the rejection under 35 U.S.C. 112, second paragraph are persuasive. The rejection has been withdrawn. Applicant argues (pages 9-10) that the amendment incorporates the layer ordering limitation from original claim 4, which the Examiner indicated would be allowable if rewritten in independent form including all of the limitations of the base claim. The examiner respectfully disagrees. The Examiner noted that original claim 4 was objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Original claim 4 depended on claim 3 which depended on claim 1. The limitations from original claim 3 have not been incorporated in the amendment. The claims remain properly rejected by the Nitin reference (see below). Status of Claims Claims 1-12 and 21-28 are pending in this application. Acknowledgement is made of the amendment received 3/6/26 cancelling claims 13-20 and adding new claims 21-28. Information Disclosure Statement An information disclosure statement has not been received. If the applicant is aware of any prior art or any other co-pending applications not already of record, he/she is reminded of his/her duty under 37 CFR 1.56 to disclose the same. Specification The objection to the specification has been withdrawn in light of the amendment received 7/1/26. Claim Rejections - 35 USC § 112 The rejection under 35 U.S.C. 112, second paragraph has been withdrawn in light of the amendment received 7/1/26. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-3, 11, 12 and 21-23 are rejected under pre-AIA 35 U.S.C. 102(a)(1) as being anticipated by Nikitin et al. (US Patent Application Publication No 2019/0273202) hereinafter referred to as Nikitin. Per Claim 1 Nikitin discloses a memory device, comprising (see figs 7A-B and 15-16) a semiconductor layer (132) (polysilicon, [0052]); a stack structure over the semiconductor layer, the stack structure including a cell array region (e.g. 210A, 210B, 400A 400B), (see figures 10-12 and 15-16) wherein the cell array region includes multiple vertical levels of stacked 1-transistor-1 magnetic tunnel junction (1T1MTJ) elements (412, 414) and a plurality of channel structures (411) vertically extending through the stack structure; (see figures 15-16) and at least one channel structure includes a vertical core (130G/411), a vertical magnetic reference layer (116), and a vertical tunnel barrier layer (114), arranged according to an order from the vertical core towards an edge of the at least one channel structure (as clearly shown in figure 1A-C) which are shared by a set of magnetic tunnel junction (MTJ) elements associated with the at least one channel structure (100G), the set of MTJ elements located at different vertical levels ( see figures 15-16) of the stack structure (see [0076] which teaches that 412 are analogous to the magnetic junction(s) 110, 110A, 110B, 110C, 110D, 110E, 110F, 110G, 110H and/or another vertical magnetic junction; see figure 7A-B for 100G) Per Claim 2 Nikitin discloses the device of claim 1 including where (see figs 16) an MTJ element included in the set of MTJ elements includes an individual vertical magnetic free layer (112) that is not shared with another MTJ element included in the set of MTJ elements. (as in figures 15-16) Per Claim 3 Nikitin discloses the device of claim 1 including where (see figs 16) the at least one channel structure further includes a vertical word line layer shared by the set of MTJ elements. (described in [0061]) Per Claim 11 Nikitin discloses the device of claim 1 including where (see figs 16) the vertical core comprises a bit line layer that serves as a bit line for the set of MTJ elements. (described in [0054]) Per Claim 12 Nikitin discloses the device of claim 1 including where (see figs 16) the vertical core, the vertical magnetic reference layer, and the vertical tunnel barrier layer have a same shape of a circle, an eclipse, or a rectangular. (as shown in figure 7B) Per Claim 21 Nikitin discloses a memory device, comprising (see figs 7A-B and 15-16) forming a semiconductor layer (132) (polysilicon, [0052]); forming a stack structure over the semiconductor layer, the stack structure including a cell array region (e.g. 210A, 210B, 400A 400B), (see figures 10-12 and 15-16) wherein forming the stack structure includes: forming multiple vertical levels of stacked 1-transistor-i-magnetic tunnel junction (1T1MTJ) elements (412, 414) and a plurality of channel structures (411) vertically extending through the stack structure; (see fig. 15-16) and forming a vertical core (130G/411), a vertical magnetic reference layer (116), and a vertical tunnel barrier layer (114), arranged according to an order from the vertical core towards an edge of the at least one channel structure (as clearly shown in figure 1A-C), which are shared by a set of magnetic tunnel junction (MTJ) elements associated with at least one channel structure (100G), the set of MTJ elements located at different vertical levels of the stack structure (see figures 15-16) (see [0076] which teaches that 412 are analogous to the magnetic junction(s) 110, 110A, 110B, 110C, 110D, 110E, 110F, 110G, 110H and/or another vertical magnetic junction; see figure 7A-B for 100G) Per Claim 22 Nikitin discloses the device of claim 21 including where (see figs 16) forming an individual vertical magnetic free layer (112) that is not shared with another MTJ element included in the set of MTJ elements. (as in figures 15-16) Per Claim 23 Nikitin discloses the device of claim 21 (see figs 16) further including forming a vertical word line layer shared by the set of MTJ elements. (described in [0061]) Allowable Subject Matter Claims 4-10 and 24-28 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMI VALENTINE MILLER whose telephone number is (571)272-9786. The examiner can normally be reached on Monday-Thursday 7am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jami Valentine Miller/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Dec 28, 2022
Application Filed
Apr 01, 2026
Non-Final Rejection mailed — §102, §112
Jul 01, 2026
Response Filed
Sep 01, 2026
Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+3.9%)
1y 12m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1096 resolved cases by this examiner. Grant probability derived from career allowance rate.

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