DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Species A, represented by figures 1A-1B and claims 1-6 in the reply filed on April 2, 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Information Disclosure Statement
As of April 13, 2026, no information disclosure statement has been made of record.
Drawing Objections
The drawings are objected to because:
Figure 1B contains a plurality of unlabeled elements. These elements are shown below.
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Response to arguments dated July 24, 2026
Applicant’s argument is that one of ordinary skill in the art would properly understand the invention based upon structural detail.
Examiner’s response is no they will not. They will be confused as to all the extra detail shown and not discussed. Examiner counts thirteen (13) different elements where were placed their by Applicant with no, zero, explanation. That is confusing. Why are they there? Are they important? Why are they not discussed? Is there something about these elements that may impact one trying to recreate the device? These are but some of the standard questions one of ordinary skill in the art may raise when looking at Applicant’s figure 1B.
Applicant is required to either remove the unlabled material from the drawings or add it to the specification. Applicant should not add any new material. Examiner’s note: it was Applicant’s choice to add the unlabled material to the drawings and not discuss them when filing the current application.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2018/0012868 A1), in view of Wong et al. (US 2015/0123170 A1) (“Wong”), in view of linking reference Wu et al. (US 2001/0023964 A1) (“Wu”), in view Raring et al. (US 9,666,677 A1) (“Raring”), in view of:
Brewer et al. (US 2003/0140317 A1) (“Brewer”);
Song et al. (US 9,257,407 B2) (“Song”); and/or
Lin et al. (US 9,704,880 B2) (“Lin”).
Regarding claim 1, Huang teaches at least in figure 1-2f:
A III-V material (200);
a first gate (204) over the III-V material (200);
an material (103) beneath the III-V material (200); and
a second gate (104) beneath the material (103).
Huang does not teach:
The III-V material is GaN.
a first material on the GaN material,
wherein the first material is at a first side of the first gate;
a second material on the GaN material,
wherein the second material is at a second side of the first gate opposite the first side of the first gate;
wherein the body includes a first wide band gap material, and
wherein the first material and the second material are doped GaN regions,
wherein the GaN material is vertically intervening between the first gate and the SiC material;
the material is a SiC material.
In regards to the material.
Huang teaches the material 103 is an insulating material.
However, Huang does not teach the insulating material comprises SiC.
Huang teaches the insulating material 103 silicon oxide. ¶ 0013.
Wong teaches at least in figure 1:
That SICO can replace silicon oxide as an interlayer dielectric material (e.g. they cover transistors), ¶ 0022, as they are art recognized equivalents for the same purpose of being an interlayer dielectric material, MPEP 2144.06, and are art recognized as being suitable for the same intended purpose of being an interlayer dielectric material, MPEP 2144.07. Thus, the substitution of the silicon carbide material, SiCO, for silicon oxide would have been obvious to one of ordinary skill in the art.
Huang and Wong do not teach:
The III-V material is GaN.
a first material on the GaN material,
wherein the first material is at a first side of the first gate;
a second material on the GaN material,
wherein the second material is at a second side of the first gate opposite the first side of the first gate;
wherein the body includes a first wide band gap material, and
wherein the first material and the second material are doped GaN regions,
wherein the GaN material is vertically intervening between the first gate and the SiC material;
This is because Huang teaches:
The III-V material can be GaAs, InAs, InP, etc.
Linking reference Wu teaches:
That the wide bandgap III-V material GaN is superior to other III-V materials such as GaAs as a device using GaN can produce ten times the power of GaAs devices. ¶ 0008. Therefore, it would have been obvious to one of ordinary skill in the art to replace the III-V material of Huang with a GaN device in order to obtain this increase in power.
Raring teaches such a GaN device in at least in figures 11A, 11g, 11j:
The III-V material is GaN (the figures call this GaN).
a first material on the GaN material (figure 11g n-GaN source),
wherein the first material is at a first side of the first gate (Gate);
a second material on the GaN material (figure 11g a second n-GaN drain),
wherein the second material is at a second side of the first gate opposite the first side of the first gate (both source and drain are on opposite sides of gate) ; and
wherein the first material and the second material are doped GaN regions (both source and drain are doped are indicated by the use of “n-“. Where if they were not doped they would have just been called GaN).
As stated above with respect to Wu, it would have been obvious to one of ordinary skill in the art to replace the III-V material of Huang with the III-V GaN material as it would have allowed one to increase the power of the III-V transistors.
The above prior art does not teach:
wherein the GaN material is vertically intervening between the first gate and the SiC material;
This is because Huang teaches the top device structure is flipped so that the top substrate faces the top of the entire device shown in figure 1.
However, it is obvious that one need not stack the devices on top of each other as shown in Huang. The other option is to stack them in the opposite manner. This is shown in:
Brewer figure 1; Song figure 3; and Lin figure 1.
Therefore, while not shown in the previous prior art it would have been obvious to one of ordinary skill in the art to stack the devices in the manner illustrated in the above references as this is an obvious way to stack the devices. Therefore, with the limited options in stacking wafers to make a monolithic integrated vertical device it would have been obvious to try to stack the devices in the manner illustrated by Brewer, Song, and Lin.
Thus, the limitation “wherein the GaN material is vertically intervening between the first gate and the SiC material” is obvious as the manner of stacking the device is obvious for the reasons stated above.
Regarding claim 3,
wherein the first material has a first level of doping concentration and wherein the second material has a second level of doping concentration (it would have been obvious to one of ordinary skill in the art that the source would have a different level of doping than the drain because of standard process variations one would not expect the source and drain to have the exact same, e.g. identical, doping down to the same dopant atom. There will obviously be some doping variation between the source and drain. All the claim requires is one atom of dopant difference. This is obvious).
Regarding claim 4, Raring teaches such a GaN device in at least in figures 11A, 11g, 11j:
a first electrical contact on the first material; and a second electrical contact on the second material (Col. 50 at lines 30-34, where there are electrical contacts on the source and drain).
Regarding claim 5, Huang teaches at least in figure 1-2f:
a third electrical contact laterally spaced apart from the second gate (this would be the source or drain region of the transistors 104. Where the third electrical contact could be the source/drain contact connecting to 108).
Regarding claim 6, Huang teaches at least in figure 1-2f:
wherein the first electrical contact is vertically overlapping with third electrical contact (As can be seen in the figures of Huang there are a plurality of source/drain contacts for transistor 204 which overlap with a plurality of source/drain contacts for transistors 104.).
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang, in view of Wong, in view of linking reference Wu, in view Raring, in view of:
Brewer, Song, and/or Lin,
in view of Koester (US 2005/0104092 A1) (“Koester”).
Regarding claim 2, Huang does not teach:
The material of the second gate.
Raring teaches:
The material of the first gate can be Ni/AU, Pt, Pd, Au, etc. Col. 50 at lines 34-37.
Koester teaches at least in figure 1(a):
That silicon mosfet gates, such as the one of Huang, can be made out of “polysilicon, polysilicon germanium, or the metals: Mo, Pt, Ir, W, Pd, Al, Au, Ni, Cu, Ti…” ¶ 0024.
It would have been obvious to one of ordinary skill in the art that the second gate could be made out of the materials described by Koester as they are well-known gate materials to use in the second gate of Huang.
Based upon the materials described by Koester and Raring it would have been obvious to one of ordinary skill in the art that the materials of the first gate can be different from the materials of the second gate.
Response to Arguments
Applicant’s amendments have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Brewer, Song, and/or Lin. See the rejection above, where it is obvious to flip the device layers of Huang.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT WALL whose telephone number is (571)272-9567. The examiner can normally be reached Monday to Thursday at 7:30am to 2:30pm PST. Interviews can be scheduled on Tuesday thru Thursday at 10am PST or 2pm PST.
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/VINCENT WALL/Primary Examiner, Art Unit 2898
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