DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on November 17, 2025 has been entered.
Response to Arguments
Applicant’s arguments and amendments have been considered but are moot as further search and consideration prompted the new grounds of rejection presented herein.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-7, 9, 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over WO2020255558A1 to Iida et al. (hereinafter “Iida”; using US20220345049A1 as an English language equivalent), in view US20080158824A1 (“Aoki”).
RE: Claim 1, Iida discloses A semiconductor device (10 in FIG. 1; FIGs. 1-4 and 5A-5B illustrate the same power conversion device 10, [0031]-[0035], [0038]), comprising:
a support (20 in FIGs. 1, 2, [0040]);
a semiconductor module (combination of 12 and 31, 12 and 32, and/or 12 and 33, [0039]) mounted on the support, the semiconductor module including a semiconductor chip (31, 32, and/or 33) and a member (12 is an encapsulation member in the gel shape, [0064]) that seals the semiconductor chip;
a heat transfer medium (portion of 42 between grooves 61, 62 as shown in FIG. 3 which corresponds to portion of 42 delineated by the dashed line in FIG. 1; heat dissipator 40 includes 42, [0043], [0049]) disposed between the support and the semiconductor module; and
a first frame member (combination of 52 and 54, [0044]; optionally 55, [0044]; Note: 50 includes 52, 54, [0044]) disposed on the semiconductor module, the first frame member being fixed to the support (20; 52, 54 are fixed to 20 by screws 16, [0046], see also FIG. 2).
Iida does not explicitly disclose that 31, 32, 33 are semiconductor chips.
However, Iida discloses Provided according to a first example embodiment of the present disclosure is a power conversion device that includes: a semiconductor element, [0011]-[0012]. Iida further discloses A description will be given of a process of encapsulating the semiconductor element [0007]. Iida discloses an encapsulation member 12 that encapsulates the first semiconductor 31 to the third semiconductor 33, [0039].
Iida further discloses With reference to FIG. 1 and FIG. 2, the power module 11 includes a generator 31 (will be referred to as a first semiconductor 31 below) for taking out electric power from an engine, a voltage control unit 32 (will be referred to as a second semiconductor 32 below), a traction controller 33 (will be referred to as a third semiconductor 33 below), [0039].
Iida discloses The circuit board 13 and the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other by terminals 14 provided on the casing 30, [0039].
Thus, 31, 32, 33 are considered to include semiconductor material as Iida refers to them as first semiconductor, second semiconductor, and third semiconductor, and since Iida describes that the process includes encapsulating a semiconductor element and 31, 32, and 33 are encapsulated. Hence, 31, 32, and 33 are each considered semiconductor elements. Further, 31, 32, and 33 are considered to have at least one electrical connection each since Iida teaches that the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other. Accordingly, as they each include semiconductor material, each has at least one electrical connection, and each are part of an electrical circuit, they are each considered a semiconductor chip under the broadest reasonable interpretation.
Iida does not explicitly disclose:
the encapsulation member 12 in the gel shape is a resin member;
the first frame member having:
a first frame portion that covers an edge portion of an upper surface of the resin member in a top view of the semiconductor device,
the first frame member being fixed to the support to thereby press the edge portion of the upper surface of the resin member toward the support; and
a first opening portion that is formed in the first frame portion and is smaller than the upper surface of the resin member in the top view, and the resin member being partially exposed through the first opening portion.
In the same field of endeavor, Aoki discloses in FIG. 4A:
a semiconductor module (53, resin R, [0043], [0048], [0082]; resin R is labeled in FIG. 3 and included in FIG. 4A) including a semiconductor chip (power semiconductor elements IGBT 53, [0043]) and a resin member (resin R, [0048]) that seals the semiconductor chip;
a first frame member (3 including 3a, 3b, 3c, [0034], [0039]) having:
a first frame portion (3a and upper left protruding portion of 3c) that covers an edge portion of an upper surface of the resin member in a top view of the semiconductor device (the upper left protruding portion of 3c would cover an edge portion of an upper surface of the resin member R in a top view; FIGs. 1, 5 shows 3a extending across openings; 3a would at least partially cover an edge portion of an upper surface of the resin member R in a top view),
the first frame member being fixed to a support (base plate 4) to thereby press the edge portion of the upper surface of the resin member toward the support (case 3 is positionally fixed to base plate 4, [0032]; the lower side of the support frame is filled with the resin. However, positioning the support frame over the resin in a hardened state makes it possible to press the resin serving as the filling material from the upper side, and also press the solder provided on the lower-side substrate. As a consequence, issues such as solder cracks that were a problem in the related art can be reduced, [0082]; As 3a and portion of 3c are positioned over edge portions of resin member R, 3a and 3c would press the resin member R toward 4); and
a first opening portion (first opening portion defined by 3a, 3c in Annotated FIG. 4A below, see also FIGs. 1, 5) that is formed in the first frame portion and is smaller than the upper surface of the resin member in the top view, and the resin member being partially exposed through the first opening portion (Annotated FIG. 4A shows first opening portion would be smaller than the upper surface of the resin member in the top view, and the resin member R would be partially exposed in the top view; Note the term “surface” is defined as “the outer or top part or layer of something,” see definition by Cambridge Dictionary at <https://dictionary.cambridge.org/us/dictionary/english/surface>; Accordingly, the top part of the resin member R as shown in Annotated FIG. 4A below is considered an upper surface of the resin member R).
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Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the encapsulation member 12 to have the configuration of resin R and modify the frame member 52, 54, 55 to have at least a first opening portion, and a first frame portion that presses an edge portion of the resin toward the support 20 as taught by Aoki in order to more firmly secure the resin to the support 20.
RE: Claim 2, modified Iida discloses The semiconductor device according to claim 1, wherein the support has a screw hole (24 in 20 in FIG. 2 in Iida, [0041]), which is formed outside the resin member of the semiconductor module in the top view of the semiconductor device,
wherein the first frame member has a first insertion hole (56 in FIG. 2, [0046]) which is formed to face the screw hole, and
wherein the semiconductor device further includes a screw that is inserted into the first insertion hole and screwed into the screw hole, to thereby fix the first frame member to the support (Fastening members like screws 16 pass completely through the respective fastening holes 56 and 45, and are fastened with the respective screw holes 24. Hence, the heat dissipator 40 and the casing 50 are fastened to the top surface 20 a of the casing 20, [0046]).
RE: Claim 3, modified Iida discloses The semiconductor device according to claim 1, further comprising
a second frame member (remaining portion of 40 in FIG. 1 in Iida, including portion of 42 outside grooves 61, 62 in FIG. 3, including portion of 40 under grooves 61, 62, including 44 under 42, and further including 55, [0039], [0043]-[0044], [0049]) disposed between the support and the semiconductor module,
the second frame member having a second frame portion (remaining portion of 40, including portion of 42 outside grooves 61, 62 in FIG. 3, including portion of 40 under grooves 61, 62, including 44 under 42) on which the semiconductor module is mounted, and
a second opening portion (opening of 40 defined between grooves 61, 62 in FIG. 3), which is formed in the second frame portion and in which the heat transfer medium is disposed (portion of 42 is between grooves 61, 62), wherein the first frame member is fixed to the support via the second frame member (FIG. 1 shows 52 is fixed to 20 via portion of 42 outside grooves).
RE: Claim 4, modified Iida discloses The semiconductor device according to claim 3, wherein the support has a screw hole (24 in 20 in FIG. 2 in Iida, [0041]), which is formed outside the resin member of the semiconductor module in the top view of the semiconductor device (As modified, the screw hole 24 would still be formed outside the resin member R),
wherein the first frame member has a first insertion hole (56 in FIG. 2, [0046]) which is formed to face the screw hole, and
wherein the second frame member has a second insertion hole (45, [0046]) which is formed to face the screw hole and the first insertion hole, and
wherein the semiconductor device further includes a screw (16, [0046]) that is inserted into the first insertion hole and the second insertion hole and screwed into the screw hole, to thereby fix the first frame member to the support via the second frame member (Fastening members like screws 16 pass completely through the respective fastening holes 56 and 45, and are fastened with the respective screw holes 24. Hence, the heat dissipator 40 and the casing 50 are fastened to the top surface 20 a of the casing 20, [0046]).
RE: Claim 5, modified Iida discloses The semiconductor device according to claim 3, wherein the second frame member further has a terminal block (55 in FIG. 1, [0044]) formed outside the second frame portion in the top view of the semiconductor device (55 is outside 40, 42, 44 in any view), and
wherein the semiconductor module further includes an external connection terminal (14, [0039]) which is electrically connected to the semiconductor chip (The circuit board 13 and the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other by terminals 14 provided on the casing 30, [0039]; casing 30 is considered to be a typographical error of “casing 50”), which extends from the resin member toward an outside of the second frame portion in the top view (14 extends from 12 in FIG. 1 and toward an outside of 40, 42, 44), and which is connected to the terminal block (14 is shown connected to 55 in FIG. 1).
RE: Claim 6, modified Iida discloses The semiconductor device according to claim 3, wherein the second frame portion has a depressed portion (44 is depressed relative to portion of 42 outside grooves 61, 62 in FIG. 1 Iida) for accommodating a part of the semiconductor module mounted thereon (In FIG. 1, 44 accommodates 31, 32, 33 mounted thereon).
RE: Claim 7, modified Iida discloses The semiconductor device according to claim 3, wherein one of the first frame member and the second frame member has a convex portion (52 has a convex portion to the right of the left screw 16 in FIG. 1; shown in better detail as 71, 72 in FIGs. 5A and 5B, [0053], [0055]) which protrudes toward the other of the first frame member and the second frame member, said the other frame member having a concave portion which is depressed and is fitted with the convex portion (FIG. 1 shows 42 or 40 has concave portion to the right of the screw 16 which receives the convex portion of 52; shown in better detail as 61, 62 in FIGs. 5A-5B; the mount surface 41 of the heat dissipator 40 and the intimate-contact surface 51 of the casing 50 which can intimately contact with the mount surface 41 are fitted with each other by a fitting structure 18 in a concavo-convex shape. The fitting structure 18 includes a continuous annular groove portion 60 (a first surrounding portion) formed in the mount surface 41 of the top plate portion 42 of the heat dissipator 40, and an annular protrusion 70 (a second surrounding portion) which is formed on the intimate-contact surface 51 of the heat dissipator 40, and which can be fitted with the groove portion 60, [0048]).
RE: Claim 9, modified Iida discloses The semiconductor device according to claim 1, further comprising
a circuit board (13 in FIG. 1, [0039]) disposed on a surface of the first frame member, the surface and the support being on opposite sides of the first frame member (In FIG. 1, 13 and 20 are on opposite sides of 52, 54), the circuit board being electrically connected to the semiconductor module (The circuit board 13 and the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other by terminals 14 provided on the casing 30, [0039]).
RE: Claim 11, Iida discloses A semiconductor device (10 in FIG. 1; FIGs. 1-4 and 5A-5B illustrate the same power conversion device 10, [0031]-[0035], [0038]) manufacturing method, comprising:
mounting a semiconductor module (combination of 12 and 31, 12 and 32, and/or 12 and 33, [0039]) which has a semiconductor chip (31, 32, and/or 33) and a member (12 is an encapsulation member in the gel shape, [0064]) that seals the semiconductor chip on a support (20 in FIG. 1, [0040]) via a heat transfer medium (portion of 42 between grooves 61, 62 as shown in FIG. 3 which corresponds to portion of 42 delineated by the dashed line in FIG. 1; heat dissipator 40 includes 42, [0043], [0049]);
mounting a first frame member (combination of 52 and 54 mounted on 20, [0044]; optionally 55, [0044]; Note: 50 includes 52, 54, [0044])
fixing the first frame member to the support (52, 54 are fixed to 20 by screws 16. [0046]).
Iida does not explicitly disclose that 31, 32, 33 are semiconductor chips.
However, Iida discloses Provided according to a first example embodiment of the present disclosure is a power conversion device that includes: a semiconductor element, [0011]-[0012]. Iida further discloses A description will be given of a process of encapsulating the semiconductor element [0007]. Iida discloses an encapsulation member 12 that encapsulates the first semiconductor 31 to the third semiconductor 33, [0039].
Iida further discloses With reference to FIG. 1 and FIG. 2, the power module 11 includes a generator 31 (will be referred to as a first semiconductor 31 below) for taking out electric power from an engine, a voltage control unit 32 (will be referred to as a second semiconductor 32 below), a traction controller 33 (will be referred to as a third semiconductor 33 below), [0039].
Iida discloses The circuit board 13 and the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other by terminals 14 provided on the casing 30, [0039].
Thus, 31, 32, 33 are considered to include semiconductor material as Iida refers to them as first semiconductor, second semiconductor, and third semiconductor, and since Iida describes that the process includes encapsulating a semiconductor element and 31, 32, and 33 are encapsulated. Hence, 31, 32, and 33 are each considered semiconductor elements. Further, 31, 32, and 33 are considered to have at least one electrical connection each since Iida teaches that the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other. Accordingly, as they each include semiconductor material, each has at least one electrical connection, and each are part of an electrical circuit, they are each considered a semiconductor chip under the broadest reasonable interpretation.
Iida does not explicitly disclose:
the encapsulation member 12 in the gel shape is a resin member.
the first frame member has a first frame portion to cover an edge portion of an upper surface of the resin member in a top view of the semiconductor device,
the first frame member having a first opening portion that is formed in the first frame portion and is smaller than the upper surface of the resin member in the top view,
the resin member of the semiconductor module being partially exposed from the first opening portion;
fixing the first frame member to the support, such that the first frame member presses the edge portion of the upper surface of the resin member toward the support.
In the same field of endeavor, Aoki discloses:
a semiconductor module (53, resin R, [0043], [0048], [0082]; resin R is labeled in FIG. 3 and included in FIG. 4A) which has a semiconductor chip (power semiconductor elements IGBT 53, [0043]) and a resin member (resin R, [0048]) that seals the semiconductor chip;
a first frame member (3 including 3a, 3b, 3c, [0034], [0039]) having:
a first frame portion (3a and upper left protruding portion of 3c) to cover an edge portion of an upper surface of the resin member in a top view of the semiconductor device (the upper left protruding portion of 3c would cover an edge portion of an upper surface of the resin member R in a top view; FIGs. 1, 5 shows 3a extending across openings; 3a would at least partially cover an edge portion of an upper surface of the resin member R in a top view),
the first frame member having a first opening portion (first opening portion defined by 3a, 3c in Annotated FIG. 4A below, see also FIGs. 1, 5) that is formed in the first frame portion and is smaller than the upper surface of the resin member in the top view (Annotated FIG. 4A shows first opening portion would be smaller than the upper surface of the resin member in the top view; Note the term “surface” is defined as “the outer or top part or layer of something,” see definition by Cambridge Dictionary at <https://dictionary.cambridge.org/us/dictionary/english/surface>; Accordingly, the top part of the resin member R as shown in Annotated FIG. 4A below is considered an upper surface of the resin member R),
the resin member of the semiconductor module being partially exposed from the first opening portion (the resin member R would be partially exposed from the first opening in the top view);
fixing the first frame member to a support (base plate 4), such that the first frame member presses the edge portion of the upper surface of the resin member toward the support (case 3 is positionally fixed to base plate 4, [0032]; the lower side of the support frame is filled with the resin. However, positioning the support frame over the resin in a hardened state makes it possible to press the resin serving as the filling material from the upper side, and also press the solder provided on the lower-side substrate. As a consequence, issues such as solder cracks that were a problem in the related art can be reduced, [0082]; As 3a and portion of 3c are positioned over edge portions of resin member R, 3a and 3c would press the resin member R toward 4).
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Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the encapsulation member 12 to have the configuration of resin R and modify the frame member 52, 54, 55 to have at least a first opening portion, and a first frame portion that presses an edge portion of the resin toward the support 20 as taught by Aoki in order to more firmly secure the resin to the support 20.
RE: Claim 12, modified Iida discloses The semiconductor device manufacturing method according to claim 11, further comprising:
providing a second frame member (remaining portion of 40 in FIG. 1 in Iida, including portion of 42 outside grooves 61, 62 in FIG. 3, including portion of 40 under grooves 61, 62, including 44 under 42, and further including 55, [0039], [0043]-[0044], [0049]) having a second frame portion (remaining portion of 40, including portion of 42 outside grooves 61, 62 in FIG. 3, including portion of 40 under grooves 61, 62, including 44 under 42) and a second opening portion (opening of 40 defined between grooves 61, 62 in FIG. 3) formed in the second frame portion,
mounting the second frame member between the support and the semiconductor module (remaining portion of 40, including 44 is between 20 and each of 31, 32, and 33), such that the semiconductor module is mounted on the second frame portion (31, 32, 33, 12 are mounted on 44), and the heat transfer medium is disposed in the second opening portion (portion of 42 is between grooves 61, 62),
wherein the fixing of the first frame member to the support includes fixing the first frame member to the support via the second frame member (FIG. 1 shows 52 is fixed to 20 via portion of 42 outside grooves).
RE: Claim 13, modified Iida discloses The semiconductor device manufacturing method according to claim 12, wherein the semiconductor module further includes an external connection terminal (14 in FIGs. 1, 2, [0039]), which is electrically connected to the semiconductor chip (The circuit board 13 and the first semiconductor 31 to the third semiconductor 33 are electrically connected to each other by terminals 14 provided on the casing 30, [0039]; casing 30 is considered to be a typographical error of “casing 50”) and which extends from the resin member toward an outside of the second frame portion in the top view of the semiconductor device (14 extends from 12 in FIG. 1 and toward an outside of 40, 42, 44),
wherein the second frame member further has a terminal block (55, [0044]) formed outside the second frame portion in the top view (55 is outside 40, 42, 44 in any view), and
wherein the method further includes connecting the external connection terminal to the terminal block (14 is shown connected to 55 in FIG. 1).
Claim(s) 8, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iida in view of Aoki as applied to claim 1 or claim 11 above, and further in view of US20140291833A1 to Sato et al. (hereinafter “Sato”).
RE: Claim 8, modified Iida does not explicitly disclose The semiconductor device according to claim 1, further comprising a beam member which has:
two end portions that engage with the first frame portion, and
an intermediate portion between the two end portions, the intermediate portion being located in the first opening portion and pressing the resin member in the first opening portion toward the support.
However, in the same field of endeavor, Sato discloses In the semiconductor module 3, a semiconductor element (not shown) is covered by a synthetic resin, [0022].
Sato further discloses As shown in FIG. 1, a semiconductor device 1 according to the embodiment includes a spring 2 (a spring member) that is a coned disc spring, a flat plate-shaped semiconductor module 3, a cooler 4, struts 5, bolts 6, and a beam member 7. The cooler 4 includes an upper plate 41, a cooling fin 42, and a lower plate 43, [0021]. As the beam member 7 is connected with the struts 5, the beam member 7 is displaced in a direction towards the upper plate 41 of the cooler 4. Based on the displacement, the spring 2 is compressed, and generates pressure force P. Because of the pressure force P, the semiconductor module 3 is pressed against the upper plate 41, [0025].
Sato further discloses The arrangement form of the semiconductor module 3 and the struts 5 of the semiconductor device 1 shown in FIG. 1 stated above is described as an example related to one of the semiconductor modules 3. In consideration of packaging density, ease of configuring a beam member 7, and so on, three semiconductor modules 3 may be arranged in line with respect to one beam member 7, and a strut 5 may be arranged at four locations between and outside the semiconductor modules 3, as shown in FIG. 4, [0031]. Sato further discloses A surface of the spring 2 on a side with a larger area is mounted on the upper surface of each of the three semiconductor modules 3, and the beam member 7 is mounted on a surface of each of the three springs 2 on a side with a smaller area, [0034]. FIG. 6A is a top view of the completed semiconductor device 1 shown in FIG. 5. FIG. 6B shows a section taken along the line A-A in the top view in FIG. 6A, [0035].
Sato further discloses The aspect of the present invention improves a capability of the cooler for following pressing of the pressed part. Therefore, grease is arranged evenly and more thinly on a surface between the cooler and the semiconductor module, [0010].
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to introduce a beam member having two end portions engaging with the first frame portion 54 in Iida which is used as a support for the beam member, and springs which are pressed against the semiconductors 31, 32, 33 toward 20 and 40 to improve the capability of the cooling of the heat dissipator as taught by Sato. As a result, the beam member would have an intermediate portion, i.e., combination of the middle portion of the beam and the springs, located in the opening in 54.
RE: Claim 14, modified Iida does not explicitly disclose The semiconductor device manufacturing method according to claim 11, further comprising:
providing a beam member that has two end portions and an intermediate portion between the two end portions,
mounting the beam member so that the intermediate portion is located in the first opening portion, and
engaging the two end portions of the beam member with the first frame portion such that the intermediate portion presses the resin member in the first opening portion toward the support.
However, in the same field of endeavor, Sato discloses In the semiconductor module 3, a semiconductor element (not shown) is covered by a synthetic resin, [0022].
Sato further discloses As shown in FIG. 1, a semiconductor device 1 according to the embodiment includes a spring 2 (a spring member) that is a coned disc spring, a flat plate-shaped semiconductor module 3, a cooler 4, struts 5, bolts 6, and a beam member 7. The cooler 4 includes an upper plate 41, a cooling fin 42, and a lower plate 43, [0021]. As the beam member 7 is connected with the struts 5, the beam member 7 is displaced in a direction towards the upper plate 41 of the cooler 4. Based on the displacement, the spring 2 is compressed, and generates pressure force P. Because of the pressure force P, the semiconductor module 3 is pressed against the upper plate 41, [0025].
Sato further discloses The arrangement form of the semiconductor module 3 and the struts 5 of the semiconductor device 1 shown in FIG. 1 stated above is described as an example related to one of the semiconductor modules 3. In consideration of packaging density, ease of configuring a beam member 7, and so on, three semiconductor modules 3 may be arranged in line with respect to one beam member 7, and a strut 5 may be arranged at four locations between and outside the semiconductor modules 3, as shown in FIG. 4, [0031]. Sato further discloses A surface of the spring 2 on a side with a larger area is mounted on the upper surface of each of the three semiconductor modules 3, and the beam member 7 is mounted on a surface of each of the three springs 2 on a side with a smaller area, [0034]. FIG. 6A is a top view of the completed semiconductor device 1 shown in FIG. 5. FIG. 6B shows a section taken along the line A-A in the top view in FIG. 6A, [0035].
Sato further discloses The aspect of the present invention improves a capability of the cooler for following pressing of the pressed part. Therefore, grease is arranged evenly and more thinly on a surface between the cooler and the semiconductor module, [0010].
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a beam member having two end portions engaging with the first frame portion 54 in Iida which is used as a support for the beam member, and springs which are pressed against the semiconductors 31, 32, 33 toward 20 and 40 to improve the capability of the cooling of the heat dissipator as taught by Sato. As a result, the beam member would have an intermediate portion, i.e., combination of the middle portion of the beam and the springs, located in the opening in 54 between the two end portions of the beam member.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iida in view of Aoki as applied to claim 1, further in view of US20100176517A1 (“Miyagawa”).
RE: Claim 10, modified Iida discloses The semiconductor device according to claim 1, wherein the first opening portion of the first frame member is provided in plurality (FIG. 5 Aoki shows opening portions in 3 are provided in plurality; FIG. 1 Iida shows plurality of openings are defined in 54, 55), each first opening portion being formed in the first frame portion, and exposing one of the resin members (openings would expose 12 covering 31, 33).
Iida as modified by Aoki does not explicitly disclose:
wherein the semiconductor module is provided in plurality,
wherein the first frame portion of the first frame member covers the edge portion of the upper surface of the resin member of each of the plurality of semiconductor modules;
the one of the resin members is of the plurality of semiconductor modules.
However, in the same field of endeavor, Miyagawa discloses:
118 is a sealing resin including a first resin region 120 made up of a first resin composition and a second resin region 122 made up of a second resin composition, [0025];
FIG. 3 shows the first resin region 120 sealing a first semiconductor chip 104, and the second resin region 122 sealing a second semiconductor chip 108.
Miyagawa discloses through optimization involving differentiating the filler amount and the like of the first resin composition that makes up the first resin region 120 from that of the second resin composition that makes up the second resin region 122, warpage or strain of the semiconductor device 100 can be reduced, [0032].
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the resin member R to include a first resin region sealing 31 and a second resin region sealing 33 in Iida as taught by Miyagawa in order to reduce warpage or strain of the device.
As a result, Iida, modified by Aoki, Miyagawa discloses:
wherein the semiconductor module is provided in plurality (From Iida FIG. 1: 31 and the first resin region, 33 and the second resin region),
wherein the first frame portion of the first frame member covers the edge portion of the upper surface of the resin member of each of the plurality of semiconductor modules (In Aoki FIG. 4A, the upper left protruding portion of 3c would cover an edge portion of an upper left surface of the resin member R in a top view, and the upper right protruding portion of 3c would cover an edge portion of an upper right surface of the resin member R in a top view; Accordingly, the frame portion 52, 54, 55 would cover the edge portion of the upper surface of the first resin region and an edge portion of the second resin region of each of the plurality of semiconductor modules 31, 33), and
wherein the first opening portion of the first frame member is provided in plurality, each first opening portion being formed in the first frame portion (opening portions would be formed in 54, 55), and exposing one of the resin members of the plurality of semiconductor modules (the opening portions would expose one of the first resin region and second resin region).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ANGUIANO whose telephone number is (703)756-1226. The examiner can normally be reached Monday through Friday.
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/MICHAEL ANGUIANO/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights