DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Examiner acknowledges amended Claims 1-11, canceled Claims 13-28, and new Claims 29-33 in the response filed on 5/26/2026.
Response to Arguments
Applicant’s arguments with respect to Claims 1-12 and 29-33 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Examiner’s Comment
The Examiner has cited particular columns and line numbers or figures in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Regarding the limitation(s) "printed circuit board" in the claims, the Examiner has given the term(s) the broadest reasonable interpretation(s) consistent with the written description in Applicants' specification as it would be interpreted by one of ordinary skill in the art. In re Morris, 127 F.3d 1048, 1054-55, 44 USPQ2d 1023, 1027 (Fed. Cir. 1997); In re Donaldson Co., Inc., 16 F.3d 1190, 1192-95, 29 USPQ2d 1845, 1848-50 (Fed. Cir. 1994). See MPEP 2111. Specifically, the Examiner notes that a conventional “printed circuit board” is a substantially flat, rigid, insulating material that has thin conductive structures adhering to one side.
Claim Objections
Claim 5-7 are objected to because of the following informalities: Claim 5 recites “the upper conductive layer, the conductive layer and the first barrier is embedded in a dielectric layer of the housing” (emphasis added). Please amend “is” to “are”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 2 and 5-11 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
With regards to Claim 2, the instant claim recites subject matter from canceled Claim 27. Claim 27 was previously rejected as failing to provide support for a barrier comprising a non-conductive magnetic permeable material. The Examiner was unable to find support in Applicant’s Specification for a (first) barrier comprising a material that is both non-conducting and magnetic. While Applicant stated that POSITA would recognize that ferrite and similar materials commonly used as magnetic permeable barriers are both magnetically permeable and non-conductive, Applicant’s specification is silent on the instant teaching of a non-conductive magnetic permeable material or the teaching of a ferrite.
With regards to Claim 5, the instant claim recites that the upper conductive layer, the conductive layer and the first barrier is embedded in a dielectric. That is, all components are embedded in a dielectric layer/material. However, the instant limitation is not supported in Applicant’s Specification.
As shown in Figs. 1C, 4, and 8B (elected invention and specie), the upper conductive layer (111, 411, and 811) is not embedded in the dielectric layer/material (114, 414, and 814). In Applicant’s Specification, it recites that the barrier layer 412 (i.e. first barrier) may be embedded in the printed circuit board 41 and covered by the dielectric layer 414 (please see paragraph [0077] in Applicant’s published application). Based on the figures and instant teaching, it appears that the upper conductive layer is directly in contact with the dielectric layer.
With regards to Claim 8, the instant claim recites that a distance between the first barrier and the coil element is shorter than a distance between the coil element and the first conductive structure (i.e. the claimed lower conductive layer and an upper conductive layer).
Applicant’s Specification states that “The magnetic field lines generated from the charging element 45 may reach the barrier layer 412 before reaching the conductive layer 413 since a distance between the charging element 45 and the barrier layer 412 is shorter than a distance between the charging element 45 and the conductive layer 413” (please see paragraph [0078] in Applicant’s published application). Therefore, it appears that the distance relationship is directed to the lower conductive layer and coil element, and not necessarily to the overall first conductive structure.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 5 and 6 reciting “the conductive layer” is indefinite. Claim 1, in which Claims 5 and 6 depend from, recites “a first conductive structure including a lower conductive layer and an upper conductive layer”. Thus, it is unclear if “the conductive layer” corresponds to “the lower conductive layer” or a separate conductive layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, and 8-12 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 20170025363 (“Tsai et al.”).
With regards to Claim 1, Tsai et al. teaches an electronic device comprising an electronic component (11b), a housing comprising an EMI (electromagnetic Interference) shielding layer (23a and relevant thereof), the housing comprising a first conductive structure including a lower conductive layer (electrical connection between 11b mounted on a top surface of the substrate 10, pads (10p), and relevant thereof – Please see [0021]), and an upper conductive layer (e.g. 23a, 23c, and relevant thereof), and a first barrier (23a, 23b, and relevant thereof) configured to block an electromagnetic induction effect caused by the electromagnetic field and the EMI shielding layer, wherein the lower conductive layer comprises two separated portions with a gap defined between the two separated portions, the upper conductive layer fully covering the gap from a position above the lower conductive layer (Abstract, Figs. 1A-2B, [0003], [0005], [0006], [0008], [0009], [0022], [0023], [0026], [0030]-[0037], and [0043]).
Tsai teaches its electronic element (11b) is a passive component, for example, a resistor, a capacitor, an inductor, a filter, a diplexer, a balun, or a combination of such components [0023]. Not every passive component comprises a coil element configured to provide an electromagnetic field. However, it would have been obvious to one of ordinary skill in the art to choose an inductor, for example, which intrinsically has a coil element configured to provide an electromagnetic field, in order to have Tsai et al.’s electronic device be used in many different applications with specific tuned properties.
With regards to Claim 2, Tsai et al. teaches the first barrier (i.e. 23b) comprises a non-conductive magnetic permeable material [0031].
With regards to Claim 8, Tsai et al. teaches the housing defines an inner space in which the coil element is received, and wherein a distance between the first barrier (first 23a or 23b shown in Fig. 2B) and the coil element (11b) is shorter than a distance between the coil element (11b) and the first conductive structure (a distance combination of electrical connection between 11b mounted on a top surface of the substrate 10, pads (10p), and relevant thereof (corresponds to lower conductive layer) and second 23a or 23c shown in Fig. 2B (corresponds to upper conductive layer)).
With regards to Claim 9-11, Tsai et al. teaches the housing comprises an interposer (i.e. 23a-23c side portions that surround the coil element), and wherein the interposer has a second barrier (first 23a, 23b, or 23c shown in Fig. 2B) and an interconnection structure (second 23a, 23b, or 23c shown in Fig. 2B), and wherein the second barrier is arranged between the interconnection structure and coil element, abuts the interconnection structure, and disposed on an inner surface of the interposer, wherein the inner surface of the interposer faces the coil element (Fig. 2B).
With regards to Claim 12, Tsai et al. teaches the housing has an opening configured to receive an external device being charged by the electromagnetic field (Title, Figs. 1A, 1B and 2B, [0003], [0009], [0022], and [0023]).
Claims 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 20170025363 (“Tsai et al.”) as applied to Claim 1 above, and further in view of US Pub. No. 20180182704 (“Yeh”).
Tsai et al. teaches an electronic device as set forth above.
Tsai et al. does not teach the first barrier abutting and position below the lower conductive layer, wherein the upper conductive layer, the conductive layer and the first barrier is embedded in a dielectric layer of the housing.
However, Yeh teaches a lower conductive layer (15, 15a, 15b, or relevant thereof) comprising two separated portions with a gap defined between the two separated portions and a first barrier (13) fully covers the gap from a position below the lower conductive layer and the first barrier abuts the lower conductive layer. Yeh teaches the first barrier comprises a non-conductive magnetic permeable material. Yeh further teaches the gap and its lower conductive layer is embedded in a dielectric layer (16) (Fig. 1A and [0024]-[0026]). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate Yeh’s first barrier, lower conductive layer, and dielectric layer at a position above the coil element in Tsai et al. to provide improvement in communication quality and increased communication distance in its electronic device ([0002], [0003], and [0019]).
Claims 29-33 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 20170025363 (“Tsai et al.”) as applied to Claim 1 above, and further in view of US Pat. No. 10244640 (“Kuwako et al.”).
With regards to Claims 29 and 31, Tsai et al. teaches the housing comprises an upper printed circuit board (14 and 15) above the coil element and a lower printed circuit board (10) under the coil element, wherein the upper printed circuit board comprises the first conductive structure and the first barrier, wherein the lower printed circuit board (paper-based copper foil laminate) comprises a second conductive structure (copper foil) and a third barrier (paper) [0021]. Tsai et al. teaches in a cross-sectional view, a width of the first barrier is greater than a width of the coil element, and a width of the third barrier is greater than the width of the coil element (Fig. 1B)
Tsai et al. does not teach the third barrier is arranged between the second conductive structure and the coil element.
However, Kuwako et al. teaches a paper-based copper foil laminate comprising a barrier (4) of paper and copper layers (3) abutting on both sides of the barrier (Fig. 1A, Col. 3: Lines 52-58, and Col. 4: Lines 24-33). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have Tsai et al.’s lower printed circuit board have the structure of Kuwako et al.’s printed circuit board in view of the functional equivalence. Thus, the prior art of record teaches the third barrier (paper) is arranged between the second conductive structure (lowermost copper layer) and the coil element.
With regards to Claim 30, Tsai et al. teaches a width of the lower printed circuit board is greater than a width of the upper printed circuit board (Fig. 1A and 1B).
With regards to Claims 32 and 33, Tsai et al. teaches the second conductive structure and the third barrier fully covers the gap from a position below the coil element (Fig. 1B).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LISA CHAU whose telephone number is (571)270-5496. The examiner can normally be reached Monday-Friday 11 AM-730 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Ruthkosky can be reached at (571) 272-1291. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LC/
Lisa Chau
Art Unit 1785
/Holly Rickman/Primary Examiner, Art Unit 1785
Prosecution Insights