Prosecution Insights
Last updated: May 29, 2026
Application No. 18/090,882

THREE-DIMENSIONAL MEMORY, FABRICATING METHOD THEREOF AND MEMORY SYSTEM

Final Rejection §102§103
Filed
Dec 29, 2022
Priority
Nov 10, 2022 — CN 2022114099483
Examiner
SALERNO, SARAH KATE
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Yangtze Memory Technologies Co. Ltd.
OA Round
2 (Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
637 granted / 869 resolved
+5.3% vs TC avg
Moderate +15% lift
Without
With
+14.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
36 currently pending
Career history
901
Total Applications
across all art units

Statute-Specific Performance

§103
84.5%
+44.5% vs TC avg
§102
13.8%
-26.2% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 869 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant's amendment/arguments filed on 12/19/25 as being acknowledged and entered. By this amendment claims 6, and 11-19 are canceled, claims 20-25 have been added and claims 1-5, 7-10, and 20-25 are pending. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Choi et al. (US Patent 9,257,573). Claim 1: Choi teaches (Fig. 5Q) three-dimensional (3D) memory, comprising: a stack including alternately stacked first dielectric layers (104) and conductive layers (134); and a channel structure (120) extending through the stack and including a second dielectric layer (114) and a blocking layer (116) disposed in this order from outside to inside that cover vertical surfaces of the first dielectric layers and vertical surfaces of the conductive layers, the blocking layer further comprises: first blocking portions located on a first portion of the second dielectric layer that covers the vertical surfaces of the first dielectric layers: and second blocking portions located on a second portion of the second dielectric layer that covers the vertical surfaces of the conductive layers. wherein the first blocking portions have a thickness larger than that of the second blocking portions in the direction parallel with the first dielectric layers. Claim 3: Choi teaches (Fig. 5Q) a surface of the blocking layer away from the second dielectric layer is even. Claim 4: Choi teaches (Fig. 5Q) surfaces of the first blocking portions away from the second dielectric layer are flush with surfaces of the second blocking portions away from the second dielectric layer. Claim 5: Choi teaches (Fig. 5Q) the second dielectric layer further comprises: first dielectric portions extending in the direction of thickness of the stack; and second dielectric portions extending in the direction parallel with the first dielectric layers, wherein the first dielectric portions are in contact with respective second dielectric portions. Claim 6: Choi teaches (Fig. 5Q) the first blocking portions have a thickness larger than that of the first dielectric portions in the direction parallel with the first dielectric layers. Claim 9: Choi teaches (Fig. 11) memory system, comprising: the 3D memory of claim 1; and a memory controller coupled to the 3D memory and configured to control the 3D memory. Pairing controllers with memory structures in common in the memory art. Claim 10: Choi teaches (Col. 13) a solid state drive or a memory card. Solid state drives and memory cards are well known in the memory art. Claim 21: Choi teaches (Fig. 5Q) a surface of the blocking layer away from the second dielectric layer is even. Claim 22: Choi teaches (Fig. 5Q) the surfaces of the first blocking portions away from the second dielectric layer are flush with surfaces of the second blocking portions away from the second dielectric layer. Claim 23: Choi teaches (Fig. 5Q) the second dielectric layer further comprises: first dielectric portions extending in the direction of thickness of the stack and second dielectric portions extending in the direction parallel with the first dielectric layers, wherein the first dielectric portions are in contact with respective second dielectric portions. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2, 8, 20, and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US Patent 9,257,573), as applied to claims 1 and 9 above, and further in view of Kai et al. (US PGPub 2021/0335805). Regarding claims 2 and 20, as described above, Choi substantially reads on the invention as claimed, except Choi does not teach the second dielectric layer has a dielectric constant greater than or equal to 3.9. Kai teaches (Fig. 9E) the second dielectric layer has a dielectric constant greater than or equal to 3.9. Therefore it would have been obvious to one of ordinary skill in the art at the time the invention was made to substitute one know element for another known element resulting in the predictable result the appropriate dielectric properties needed for the application (KSR International Co. v. Teleflex Inc. (KSR), 550 U.S., 82 USPQ2d 1385 (2007)). Regarding claims 2 and 20, as described above, Choi substantially reads on the invention as claimed, except Choi does not teach the dielectric constant of the second dielectric layer is greater than or equal to 10. Therefore it would have been obvious to one of ordinary skill in the art at the time the invention was made to substitute one know element for another known element resulting in the predictable result the appropriate dielectric properties needed for the application (KSR International Co. v. Teleflex Inc. (KSR), 550 U.S., 82 USPQ2d 1385 (2007)). Allowable Subject Matter Claims 7 and 24 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claim(s) 1-5, 7-10 and 20-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARAH KATE SALERNO whose telephone number is (571)270-1266. The examiner can normally be reached M-F 6:30am-2:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at 5712721705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SARAH K SALERNO/Primary Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Dec 29, 2022
Application Filed
Oct 01, 2025
Non-Final Rejection mailed — §102, §103
Oct 05, 2025
Interview Requested
Oct 15, 2025
Examiner Interview Summary
Oct 15, 2025
Applicant Interview (Telephonic)
Dec 19, 2025
Response Filed
Mar 02, 2026
Final Rejection mailed — §102, §103
Apr 22, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
88%
With Interview (+14.8%)
2y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 869 resolved cases by this examiner. Grant probability derived from career allowance rate.

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