Prosecution Insights
Last updated: July 17, 2026
Application No. 18/091,555

APPARATUS AND METHOD FOR ATTACHING AN OPTICAL COMPONENT USING HYBRID BONDING

Non-Final OA §102§103§112
Filed
Dec 30, 2022
Examiner
TIVARUS, CRISTIAN ALEXANDRU
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
33 granted / 43 resolved
+8.7% vs TC avg
Strong +22% interview lift
Without
With
+22.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
33 currently pending
Career history
88
Total Applications
across all art units

Statute-Specific Performance

§103
90.0%
+50.0% vs TC avg
§102
6.0%
-34.0% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 43 resolved cases

Office Action

§102 §103 §112
CTNF 18/091,555 CTNF 100025 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions 08-25-01 AIA Applicant’s election without traverse of Group I, corresponding to claims 1-14 and 16-17 , in the reply filed on 02/27/2026 , is acknowledged. Claim Objections 07-29-01 AIA Claim s 2-8 and 10-13 are objected to because of the following informalities: "The substrate of claim" should read " The integrated circuit device substrate of claim" . Appropriate correction is required. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 6 recites the limitation “wherein the first glass layer and the second glass layer are independently chosen from silicon, soda-lime glass, boro-silicate glass, and alumo-silicate glass”. Silicon is a semiconductor not a glass. However, glass is primarily made of silicon oxide. For the purpose of examination claim 6 will be interpreted as: The substrate of claim 1, wherein the first glass layer and the second glass layer are independently chosen from silicon -oxide , soda-lime glass, boro-silicate glass, and alumo-silicate glass. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15 AIA Claim s 1 and 14 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Haba et al., (United States Patent Application Publication Number, US 2013/0063918 A1), hereinafter referenced as Haba . Regarding claim 1, Haba teaches an integrated circuit device substrate, comprising: a first glass layer (Fig.5B, bottom layer equivalent to element #30 in Fig.5A, paragraph [0038], rows 7-9, paragraph [0040], rows 1-2) with a redistribution layer mounting region (Fig.5B, left side of the glass layer top surface), and an integrated circuit device mounting region (Fig.5B, right side of the glass layer top surface where integrated circuit element #80B is mounted), wherein a first major surface of the first glass layer is overlain by a first dielectric layer (Fig.5B, the first major surface is top surface, overlain by dielectric layer, element #58), and wherein the first glass layer comprises a first plurality of conductive pillars (Fig.5A, element #40), a second glass layer on the redistribution layer mounting region on the first glass layer (Fig.5B, layer equivalent to element #12 in Fig.5A, paragraph [0038], rows 7-9), wherein the second glass layer comprises a second dielectric layer on a second major surface thereof (Fig.5B, element #52, located on the bottom surface of the second dielectric layer), and wherein the second dielectric layer is bonded to the first dielectric layer on the first major surface of the first glass layer (Fig.5B, element #52 and #58 are bonded, paragraph [0042], rows 20-22), the second glass layer comprising a second plurality of conductive pillars electrically interconnected with the first plurality of conductive pillars in the first glass layer (Fig.5B, element #22). Regarding claim 14, Haba teaches a method for making a glass substrate suitable for mounting an integrated circuit device, the method comprising: forming a first glass layer (Fig.5B, bottom layer, equivalent to element #30 in Fig.5A, paragraph [0038], rows 7-9, paragraph [0040], rows 1-2) with a redistribution layer mounting region (Fig.5B, left side of the glass layer top surface) and an integrated circuit device mounting region(Fig.5B, right side of the glass layer top surface, where integrated circuit element #80B is mounted), wherein a first major surface of the first glass layer is overlain by a first dielectric layer (Fig.5B, the first major surface is the top surface, overlain by dielectric layer, element #58), and wherein the first glass layer comprises a first plurality of conductive pillars (Fig.5A, element #40); forming a second glass layer (Fig.5B, layer equivalent to element #12 in Fig.5A, paragraph [0038], rows 7-9) comprising a second plurality of conductive pillars (Fig.5B, element #22), wherein the second glass layer comprises a second dielectric layer on a second major surface thereof (Fig.5B, element #52, located on the bottom surface); bonding the first dielectric layer to the second dielectric layer such that the first plurality of conductive pillars in the first glass layer are electrically interconnected with the second plurality of conductive pillars in the first glass layer (Fig.5B, element #52 and #58 are bonded, paragraph [0042], rows 20-22) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Haba, in view of Sakai et al., (United States Patent Application Publication Number, US 2017/0125359 A1) hereinafter referenced as Sakai . Regarding claim 2, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection. Haba further teaches the substrate of claim 1, further comprising solder bump mounting pads at a first major surface of the second glass layer connected to at least a portion of the plurality of second plurality of conductive pillars (Fig.1, element #28 are pads connected to pillars element #22, the first major surface is the top surface of element #12, and are Fig.5B, element #80A is attached to the second layer using solder balls element #68). Haba does not teach conductive traces connected to at least a portion of the plurality of second plurality of conductive pillars, wherein the conductive traces terminate in solder bump mounting pads at a first major surface of the second glass layer. Saki teaches conductive traces connected to at least a portion of the plurality of second plurality of conductive pillars, wherein the conductive traces terminate in solder bump mounting pads at a first major surface of the second layer (Fig.9, conductive traces, element #322, are connected to pillars, element #324, and terminate with solder bump mounting pads, element #325, at the top surface of the layer). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Sakai and disclose conductive traces connected to at least a portion of the plurality of second plurality of conductive pillars, wherein the conductive traces terminate in solder bump mounting pads at a first major surface of the second layer. As disclosed by Sakai, the conductive traces can be part of redistribution wiring layers that allow for power and/or signals redistribution to the top mounting pads, so that they match the connecting pads of devices that connect to the top surface of the second layer . 07-21-aia AIA Claim s 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Haba, in view of Chen et al., (United States Patent Application Publication Number, US 2022/0336393 A1) hereinafter referenced as Chen . Regarding claim 3, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection. Haba teaches wherein the dielectric layers can be bonded using oxide surface to surface bonding, which suggests that the two dielectric layers are oxides (paragraph [0008], rows 3-5). Haba does not teach wherein the first dielectric layer and the second dielectric layer each comprise an inorganic material chosen from Si, C, N, and mixtures and combinations thereof. Chen teaches wherein the first dielectric layer and the second dielectric layer each comprise an inorganic material chosen from Si, C, N, and mixtures and combinations thereof (Fig.2C, element #24B and #58, paragraph [0028], rows 7-11, paragraph [0037], rows 5-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Chen and have the dielectric layers comprised of inorganic material chosen from Si, C, N, and mixtures and combinations thereof. This would have been obvious to try, since using material compositions for the dielectric layers, as taught by Chen, would have had a reasonable expectation of success and would yield predictable results. A person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product is not of innovation but of ordinary skill and common sense. Regarding claim 4, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection and the combination of Haba and Chen teaches the substrate of claim 3 as set forth in the obviousness rejection. Chen further teaches the substrate of claim 3, wherein the inorganic material is SiOx (Fig.2C, element #24B and #58, paragraph [0028], rows 7-11, paragraph [0037], rows 5-9; same arguments as in the rejection of claim 3 apply). Regarding claim 5, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection. Haba does not teach the substrate of claim 1, wherein the first dielectric layer and the second dielectric layer each comprise a polymeric material chosen from polyimide, benzocyclobutene polymers, and mixtures and combinations thereof. Chen teaches, wherein the first dielectric layer and the second dielectric layer each comprise a polymeric material chosen from polyimide, benzocyclobutene polymers, and mixtures and combinations thereof (Fig.2C, element #24B and #58, paragraph [0028], rows 9-11, paragraph [0037], rows 7-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Chen and disclose wherein the first dielectric layer and the second dielectric layer each comprise a polymeric material chosen from polyimide, benzocyclobutene polymers, and mixtures and combinations thereof. Dielectric layers made of polyimide or benzocyclobutene polymers have high thermal stability, high chemical resistance and are easy to process . 07-21-aia AIA Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Haba, in view of Ma et al., (United States Patent Application Publication Number, US 2011/0147059 A1) hereinafter referenced as Ma . Regarding claim 6, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection. Haba does not teach the substrate of claim 1, wherein the first glass layer and the second glass layer are independently chosen from silicon oxide , soda-lime glass, boro-silicate glass, and alumo-silicate glass. The examiner notes that the limitation “independently chosen” is treated as a product-by-process limitation, and that “independently chosen” does not imply any additional structure beyond each glass layer being made from one of the claimed glasses. Ma teaches wherein the first glass layer and the second glass layer are independently chosen from silicon oxide, soda-lime glass, boro-silicate glass, and alumo-silicate glass (paragraph [0028], rows 3-20). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ma and make the glass layers from silicon oxide , soda-lime glass, boro-silicate glass, and alumo-silicate glass. This would have been obvious to try, since the material compositions for the glass layers as taught by Ma, would have had a reasonable expectation of success and would yield predictable results. A person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product is not of innovation but of ordinary skill and common sense . 07-21-aia AIA Claim s 7, 9 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Haba, in view of Liu et al., (United States Patent Application Publication Number, US 2023/0031430 A1) hereinafter referenced as Liu . Regarding claim 7, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection. Haba teaches the substrate of claim 1, further comprising an integrated circuit device on the first dielectric layer in the integrated circuit device mounting region on the first glass layer (Fig.5B, element #80B). Haba does not teach wherein the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer. Liu teaches wherein the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer (Fig.3, integrated circuit device, element #302 has a dielectric layer, element #313, bonded to the first dielectric layer, element #113). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Liu and disclose the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer. The two dielectric layers allow the attachment of the integrated circuit device to the glass layer using hybrid bonding, which is known in the art for high interconnect density and reliability. Regarding claim 9, an integrated circuit device substrate, comprising: a first glass layer (Fig.5B, bottom layer, equivalent to element #30 in Fig.5A, paragraph [0038], rows 7-9, paragraph [0040], rows 1-2) with a redistribution layer mounting region (Fig.5B, left side of the glass layer top surface) and an integrated circuit device mounting region (Fig.5B, right side of the glass layer top surface, where integrated circuit element #80B is mounted), wherein a first major surface of the first glass layer is overlain by a first dielectric layer (Fig.5B, the first major surface is top surface, overlain by dielectric layer, element #58), and wherein the first glass layer comprises a first plurality of conductive pillars (Fig.5A, element #40); a second glass layer on the redistribution layer mounting region on the first glass layer (Fig.5B, layer equivalent to element #12 in Fig.5A, paragraph [0038], rows 7-9), wherein the second glass layer comprises a second dielectric layer on a second major surface thereof (Fig.5B, element #52, located on the bottom surface on the second dielectric layer), and wherein the second dielectric layer is bonded to the first dielectric layer on the first major surface of the first glass layer (Fig.5B, element #52 and #58 are bonded, paragraph [0042], rows 20-22), the second glass layer comprising a second plurality of conductive pillars electrically interconnected with the first plurality of conductive pillars in the first glass layer(Fig.5B, element #22); and an integrated circuit device on the first dielectric layer in the integrated circuit device mounting region on the first glass layer (Fig.5B, element #80B). Haba does not teach wherein the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer. Liu teaches wherein the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer (Fig.3, integrated circuit device, element #302 has a dielectric layer, element #313, bonded to the first dielectric layer, element #113). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Liu and disclose the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer. The two dielectric layers allow the attachment of the integrated circuit device to the glass layer using hybrid bonding, which is known in the art for high interconnect density and reliability. Regarding claim 16, Haba teaches the method of claim 14, as set forth in the anticipation rejection. Haba teaches the method of claim 14, further comprising mounting an integrated circuit device on the first dielectric layer in the integrated circuit device mounting region on the first glass layer (Fig.5B, element #80B is mounted). Haba does not teach wherein the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer. Liu teaches wherein the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer (Fig.3, integrated circuit device, element #302 has a dielectric layer, element #313, bonded to the first dielectric layer, element #113). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Liu and disclose the integrated circuit device comprises a dielectric mounting layer bonded to the first dielectric layer. The two dielectric layers allow the attachment of the integrated circuit device to the glass layer using hybrid bonding, which is known in the art for high interconnect density and reliability . 07-21-aia AIA Claim s 8, 10 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Haba, in view of Liu and in view of Yim et al., (United States Patent Application Publication Number, US 2019/0006549 A1) hereinafter referenced as Yim . Regarding claim 8, Haba teaches the substrate of claim 1, as set forth in the anticipation rejection and the combination of Haba and Liu teaches the substrate of claim 7, as set forth in the obviousness rejection. The combination of Haba and Liu does not teach the substrate of claim 7, wherein the integrated circuit device comprises a photonic integrated circuit device. Yim teaches wherein the integrated circuit device comprises a photonic integrated circuit device (Fig.4, element #102, paragraph [0025], rows 7-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Yim and disclose the integrated circuit device comprises a photonic integrated circuit device. As disclosed by Yim, this allows the manufacture of highly integrated optical modules with a high bandwidth (paragraph [0002]). Regarding claim 10, the combination of Haba and Liu teaches the substrate of claim 9, as set forth in the obviousness rejection. The combination of Haba and Liu does not teach the substrate of claim 9, wherein the integrated circuit device is a photonic integrated circuit device. Yim teaches wherein the integrated circuit device is a photonic integrated circuit device (Fig.4, element #102, paragraph [0025], rows 7-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Yim and disclose the integrated circuit device cis a photonic integrated circuit device. As disclosed by Yim, this allows the manufacture of highly integrated optical modules with a high bandwidth (paragraph [0002]). Regarding claim 17, Haba teaches the method of claim 16, as set forth in the anticipation rejection and the combination of Haba and Liu teaches the substrate of claim 16, as set forth in the obviousness rejection. The combination of Haba and Liu does not teach the method of claim 16, wherein the integrated circuit device comprises a photonic integrated circuit device. Yim teaches wherein the integrated circuit device comprises a photonic integrated circuit device (Fig.4, element #102, paragraph [0025], rows 7-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Yim and disclose the integrated circuit device comprises a photonic integrated circuit device. As disclosed by Yim, this allows the manufacture of highly integrated optical modules with a high bandwidth (paragraph [0002]) . 07-21-aia AIA Claim s 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Haba, in view Liu and in view of Chen . Regarding claim 11, the combination of Haba and Liu teaches the substrate of claim 9, as set forth in the obviousness rejection. Haba teaches wherein the dielectric layers can be bonded using oxide surface to surface bonding (paragraph [0008], rows 3-5). The combination of Haba and Liu does not teach wherein the first dielectric layer and the second dielectric layer each comprise an inorganic material chosen from Si, C, N, and mixtures and combinations thereof. Chen teaches wherein the first dielectric layer and the second dielectric layer each comprise an inorganic material chosen from Si, C, N, and mixtures and combinations thereof (Fig.2C, element #24B and #58, paragraph [0028], rows 7-11, paragraph [0037], rows 5-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Chen and have the dielectric layers comprised of inorganic material chosen from Si, C, N, and mixtures and combinations thereof. This would have been obvious to try, since the material compositions for the dielectric layers provided by Chen, would have had a reasonable expectation of success and would yield predictable results. A person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product is not of innovation but of ordinary skill and common sense. Regarding claim 12, the combination of Haba and Liu teaches the substrate of claim 9, as set forth in the obviousness rejection and the combination of Haba, Liu and Chen teaches the substrate of claim 11 as set forth in the obviousness rejection. Chen further teaches the substrate of claim 11, wherein the inorganic material is SiOx (Fig.2C, element #24B and #58, paragraph [0028], rows 7-11, paragraph [0037], rows 5-9; same arguments as in the rejection of claim 11 apply). Regarding claim 13, the combination of Haba and Liu teaches the substrate of claim 9, as set forth in the obviousness rejection. The combination of Haba and Liu does not teach the substrate of claim 9, wherein the first dielectric layer and the second dielectric layer each comprise a polymeric material chosen from polyimide, benzocyclobutene polymers, and mixtures and combinations thereof. Chen teaches, wherein the first dielectric layer and the second dielectric layer each comprise a polymeric material chosen from polyimide, benzocyclobutene polymers, and mixtures and combinations thereof (Fig.2C, element #24B and #58, paragraph [0028], rows 9-11, paragraph [0037], rows 7-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Chen and disclose wherein the first dielectric layer and the second dielectric layer each comprise a polymeric material chosen from polyimide, benzocyclobutene polymers, and mixtures and combinations thereof. Dielectric layers made of polyimide or benzocyclobutene polymers have high thermal stability, high chemical resistance and are easy to process. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CRISTIAN A TIVARUS whose telephone number is (703)756-4688. The examiner can normally be reached Monday- Friday 8:00AM-5:00PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at (571)270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899 Application/Control Number: 18/091,555 Page 2 Art Unit: 2899 Application/Control Number: 18/091,555 Page 5 Art Unit: 2899 Application/Control Number: 18/091,555 Page 7 Art Unit: 2899 Application/Control Number: 18/091,555 Page 8 Art Unit: 2899 Application/Control Number: 18/091,555 Page 9 Art Unit: 2899 Application/Control Number: 18/091,555 Page 10 Art Unit: 2899 Application/Control Number: 18/091,555 Page 11 Art Unit: 2899 Application/Control Number: 18/091,555 Page 12 Art Unit: 2899 Application/Control Number: 18/091,555 Page 13 Art Unit: 2899 Application/Control Number: 18/091,555 Page 15 Art Unit: 2899 Application/Control Number: 18/091,555 Page 16 Art Unit: 2899
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Prosecution Timeline

Dec 30, 2022
Application Filed
Jul 19, 2023
Response after Non-Final Action
Jun 09, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+22.3%)
3y 5m (~0m remaining)
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