The present application is being examined under the pre-AIA first to invent provisions.
DETAILED ACTION
Current Status of Claims
This action responding to communication of March 30, 2026. By amendment of March 30, 2026 the Applicant argues that the prior art of the record does not show the claimed invention. Therefore, claims 1-13 remain active in the application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on February 6, 2026 was filed before the mailing date of the Final Office Action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-13 have been considered but are not convincing since the claim language remain broad and not clear. Specifically, the Applicant analyzes the primary reference to Wei et al. concluding: “the person skilled in the art would not conceive of applying the technique of simultaneously sending the same enable signal to all driver circuits 120 in the same group” (See page 5 of Remarks section of March 30, 2026, emphasis added by examiner). The Applicant’s attention is drawn to limitation of claim 1 “wherein all of said drivers of at least one of said driving groups receive said enable signal from a controller.” Question is why the Applicant argues “simultaneously sending” when the claim language is silent about timing? Additionally, the limitation of claim 1, line 7 “enable signal driving said drivers” is not technically correct. It is well known in the art that an enable signal is a control signal that causes a circuit such as driver to become active. The expression “enable signal driving the driver” is somewhat awkward because the verb “driving” has interpretation of “control/activation/enabling”. So, language like “an enable signal configured to enable the driver” or “enable signal activates the driver” would be more appropriate. Therefore, examiner takes the position that as currently presented the instant claims are broad and require improvement to more clearly reflect specifics of the instant invention. The previous rejection is maintained and made final. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wei et al. (US Patent Publication Application 2021/0056891 A1) in view of Huang et al. (US Patent Publication Application 2007/0195030 A1).
In regard of claim 1, Wei et al. disclose a driving architecture for a display panel, comprising: a plurality of driving groups, disposed on a display panel and mutually coupled in series, each said driving group including said a plurality of drivers (See Figure 1A of Wei et al. illustrating a display panel (100) with plurality of driving groups of plurality of drivers (120) coupled in series as discussed in paragraphs [0033-0036]), each said driver including an enable input terminal, and each said driver coupled to at least one display element of said display panel, said enable input terminals of all said drivers of at least one of said driving groups mutually coupled for mutually transmitting an enable signal, and said enable signal driving said drivers (See at least Figures 1A and 3 of Wei et al. illustrating driver (120) supplied with enable signals (115) including an enable input terminal (124, 122, 352) and each driver (120) coupled to display element (130) and wherein enable input terminals (124, 122, 352) coupled to driving groups (120) for mutually transmitting an enable signal as discussed in paragraphs [0038, 0052]).
However, the reference to Wei et al. does not specifically describe a driving architecture for a display panel, wherein all of said drivers of at least one of said driving groups receive said enable signal from a controller.
In the same field of endeavor Huang et al. discloses the driving architecture wherein a display panel (42, 43) is driven by groups of drivers (44a, 44b) as shown in Figure 4A by providing enable signals ASTH, BSTH from controller (40) to enable the plurality of drivers (441-450) as discussed in paragraph [0032].
Therefore, it would be obvious for a person skilled in the art at the moment the application was filed to use controller for providing enable signal as shown by Huang et al. in the driving architecture of Wei et al. in order to avoid usage of buffer for signals amplification.
In regard of claim 2, Wei et al. and Huang et al. further disclose the driving architecture of claim 1, wherein said controller transmits said enable signal, at least one of said driving groups receives said enable signal for driving said drivers in said at least one driving group (See at least Figure 4A of Huang et al. illustrating the driving architecture with a controller (40) transmitting enable signal (ASTH, BSTH) for driving groups of drivers (44a, 44b, 441-450) as discussed in paragraph [0032]).
In regard of claim 3, Wei et al. and Huang et al. further disclose the driving architecture of claim 1, wherein a driver in one of said driving groups transmits said enable signal for driving another driver in another of said driving groups (See Figures 1A and 3 of Wei et al. illustrating a driver (120) transmitting enable signal (352, IntAddr) for driving another driver (120) as discussed in paragraphs [0052-0053]).
In regard of claim 4, Wei et al. and Huang et al. further disclose the driving architecture of claim 2, wherein said driving groups include a first driving group adjacent to said controller and receiving said enable signal for driving said drivers in said first driving group (See Figure 1A of Wei et al. illustrates driving groups (120) receiving enable signal (IntAddr) as discussed in paragraph [0052-0053]).
In regard of claim 5, Wei et al. and Huang et al. further disclose the driving architecture of claim 2, wherein said driving groups include an Xth driving group, said Xth driving group receives the Xth enable signal; and X is a positive integer greater than 0 (See at least Figure 1A of Wei et al. illustrating X driving groups receiving enable signal (PwrM) as discussed in paragraph [0038]).
In regard of claim 6, Wei et al. and Huang et al. further disclose the driving architecture of claim 2, wherein said driving groups include an Xth driving group and a Yth driving group, a Z driving group difference is between said Xth driving group and said Yth driving group, a Z timing difference is between the timing of said Xth driving group receiving said enable signal and the timing of said Yth driving group receiving said enable signal, X, Y, and Z are positive integers greater than 0; and Y is greater than X (See at least Figures 1A and 2 illustrating driving groups has timing controller (210) generating control enable signal as discussed in paragraphs [0048-0052] of Wei et al.).
In regard of claim 7, Wei et al. and Huang et al. further disclose the driving architecture of claim 6, wherein said driving groups further include a (X+1)th driving group, and said enable input terminals of said drivers in said (X+1)th driving group are not mutually coupled (See Figure 1A of Wei et al. illustrating driving groups with X+1 group (120) with enable input terminals are not mutually coupled).
In regard of claim 8, Wei et al. and Huang et al. further disclose the driving architecture of claim 6, wherein said driving groups further include the a (Y+1)th driving group; and said enable input terminals of said drivers in said (Y+1)th driving group are not mutually coupled. a storage circuit, coupled to said driving circuit, and storing said input data; and an enable circuit, coupled to said storage circuit, and enabling said storage circuit
receiving said input data for storing said input data (See at least Figure 1A illustrating driver (120) performing storing function as discussed in paragraph [0044]).
In regard of claim 9, Wei et al. and Huang et al. further disclose the driving architecture of claim 6, wherein said driving groups further include the a (X+1)th driving group, and said enable input terminals of said drivers in said (X+1)th driving group are mutually coupled (See Figures 1A and 3 of Wei et al. illustrating enable input terminals (124, 352) and driving group are mutually coupled (120)).
In regard of claim 10, Wei et al. and Huang et al. further disclose the driving architecture of claim 6, wherein said driving groups further include the a (Y+1)th driving group, and said enable input terminals of said drivers in said (Y+1)th driving group are mutually coupled (See Figures 1A and 3 of Weil et al. illustrates driving groups of drivers (120) each having enable input terminals (124, 352) and driving groups of drivers mutually coupled).
In regard of claim 11, Wei et al. and Huang et al. further disclose the driving architecture of claim 2, wherein each said driver includes: a storage circuit, coupled to said controller, and storing input data transmitted by said controller; and an enable circuit, coupled to and enabling said storage circuit for receiving said input data; wherein after said enable circuit enables said storage circuit, said enable circuit disables said storage circuit receiving said input data and drives said enable circuit of another driver in another driving group to enable said storage circuit of said another driver to receive said input data transmitted by said controller (See at least Figures 1A and 3 of Weil et al. illustrating a storage circuit (350) part of driver (120) and enable circuit (350, 352) storage circuit receives input data (124, 122) to transmit input data (126) as discussed in paragraph [0035]).
In regard of claim 12, Wei et al. and Huang et al. further disclose the driving architecture of claim 1, wherein each said driver comprises: a driving circuit, driving said at least one display element according to input data (See at least Figures 1A and 3 of Wei et al. illustrating a driving circuit (120) with display element (130) driven according to input data (122) as discussed in paragraph [0033, 0035]).
In regard of claim 13, Wei et al. and Huang et al. further disclose the driving architecture of claim 1, wherein an arrangement direction of said driving groups is different from an arrangement direction of said drivers (See at least Figure 1A of Wei et al. illustrating arrangement direction of driving groups is different from arrangement of drivers (120)).
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Olga Aronovich whose telephone number is (571)270-7796. The examiner can normally be reached on Mon-Fri. from 7:30-5:00.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's Supervisor, Benjamin C. Lee can be reached on (571) 272-2963. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/OLGA V MERKOULOVA/Primary Examiner, Art Unit 2629
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