Prosecution Insights
Last updated: October 02, 2026

Sitronix Technology Corporation

Technology areas: Communications • Semiconductors, Circuits & Optics

5 pending office actions • 4 art units • 5 examiners • 0 of 5 (0%) have an AI response strategy ready

Analysis

Sitronix Technology Corporation is currently managing 5 pending office actions in the Semiconductors, Circuits & Optics technology area. These 5 pending office actions are being handled by 5 distinct examiners, indicating that each pending matter has a unique reviewer. The portfolio is spread across 4 distinct art units, suggesting that the company's semiconductor and optics innovations are categorized into several technical groups at the patent office. This distribution requires managing five unique examiner relationships across 4 distinct art units.

The busiest examiner, BODDIE, WILLIAM, is responsible for 1 busiest examiner pending action. With 5 distinct examiners each handling an action, the prosecution risk is evenly distributed. Practitioners should focus on the specific requirements of the 4 distinct art units involved, as the technological nuances of Semiconductors, Circuits & Optics will vary across these groups. The lack of examiner overlap means that a result with one examiner like BODDIE, WILLIAM will not predict the outcome of the other pending actions. Success for the 5 pending office actions depends on the independent reviews of the 5 distinct examiners.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

5
Total Pending OAs
0
Non-Final OAs
5
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

1
Overdue
0
Due this week
0
Due this month
0
Due in next 60 days
1
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

3
Hard (60%)
2
Medium (40%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only2 (40%)
Multi-statute (no §101)3 (60%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
2
Communications
40% of docket
3
Semiconductors
60% of docket
0
Mechanical / Eng
0% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

50 h
Manual time on pending OAs
10 h
Time saved (low, 20%)
18 h
Time saved (mid, 35%)
0.4 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
BODDIE, WILLIAM 1 27.2% +23.3%
HANUMASAGAR, SHAMITA S 1 76.9% -7.5%
ARONOVICH, OLGA 1 75.8% +13.0%
BERRY, PAUL ANTHONY 1 90.2% -1.3%
CHOUDHRY, MOHAMMAD M 1 82.0% +12.0%

Hard Cases (4)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18202360 BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF HANUMASAGAR, SHAMITA S 86d overdue
18826673 Driving circuit for display panel BODDIE, WILLIAM 61d
17714445 BUMP STRUCTURE OF CHIP BERRY, PAUL ANTHONY —
17444229 FLOW GUIDING STRUCTURE OF CHIP CHOUDHRY, MOHAMMAD M —

Interview Candidates (3)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.

App #TitleExaminerDue in
18826673 Driving circuit for display panel BODDIE, WILLIAM 61d
18091819 DRIVING STRUCTURE FOR DISPLAY PANEL ARONOVICH, OLGA —
17444229 FLOW GUIDING STRUCTURE OF CHIP CHOUDHRY, MOHAMMAD M —

Top Art Units

Art UnitApps
2629 2
2814 1
2898 1
2899 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18826673 Driving circuit for display panel BODDIE, WILLIAM 2629 §103 Final Rejection 61d Pending Sep 06, 2024
18202360 BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF HANUMASAGAR, SHAMITA S 2814 §102§103§112 Final Rejection 86d overdue Pending May 26, 2023
18091819 DRIVING STRUCTURE FOR DISPLAY PANEL ARONOVICH, OLGA 2629 §103 Final Rejection — Pending Dec 30, 2022
17714445 BUMP STRUCTURE OF CHIP BERRY, PAUL ANTHONY 2898 §102§103§112 Final Rejection — Pending Apr 06, 2022
17444229 FLOW GUIDING STRUCTURE OF CHIP CHOUDHRY, MOHAMMAD M 2899 §102§103 Final Rejection — Pending Aug 02, 2021

Managing Sitronix Technology Corporation's Patent Portfolio?

IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.

Start Free Trial

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month