DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I (claims 1-8) in the reply filed on 5/11/26 is acknowledged.
Claim Objections
Claims 7, 8 is/are objected to because of the following informalities:
Reciting the substrate, which is the subject of the claim, as a limitation of the claim, is circular. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 2019-14922 (Asano).
Asano discloses
1. (Original) A substrate, comprising:
one or more glass layers 10;
a self-assembled monolayer 21 on the one or more glass layers 10; and
a conductive layer 22-24 on the self-assembled monolayer 21, wherein the conductive layer 22-24 comprises copper 24, and wherein the self-assembled monolayer 21 is between the one or more glass layers 10 and the conductive layer 22-24.
Asano discloses
2. (Original) The substrate of Claim 1, wherein the self-assembled monolayer 21 comprises silicon and oxygen.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3, 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asano as applied to claim 2 above, and further in view of LUO, Bin et al., "Epitaxial Electrodeposition of Cu(111) onto an L-Cysteine Self-Assembled Monolayer on Au(111) and Epitaxial Lift-Off of Single-Crystal-Like Cu Foils for Flexible Electronics," J. Phys. Chem. C 2020, 124, 21426-21434. (9 pages), cited by Applicant.
Asano fails to disclose
3. (Original) The substrate of Claim 2, wherein the self-assembled monolayer further comprises sulfur, hydrogen, nitrogen, or carbon.
Asano fails to disclose
4. (Original) The substrate of Claim 2, wherein the self-assembled monolayer further comprises:
sulfur and hydrogen;
nitrogen and hydrogen;
carbon and nitrogen; or
carbon and hydrogen.
Luo teaches (at least page 21431)
A substrate comprising:
wherein the self-assembled monolayer further comprises sulfur, hydrogen, nitrogen, or carbon; and
wherein the self-assembled monolayer further comprises: carbon and hydrogen.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a SAM comprising carbon and hydrogen in Asano. The motivation would be carbon and hydrogen provide a strong coordination reaction with copper which can be used in a substrate for flexible electronic materials as taught by Luo.
Claim(s) 5, 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asano as applied to claim 1 above, and further in view of KHONG, Zhe et al., "Study on Chemical Vapor Deposited Copper Films on Cyano and Carboxylic Self-Assembled Monolayer Diffusion Barriers," Thin Solid Films 518 (2010) 4852-4859 (8 pages), cited by Applicant.
Asano fails to disclose
5. (Original) The substrate of Claim 1, wherein the self-assembled monolayer has a thickness of 25 nanometers or less.
Asano fails to disclose
6. (Original) The substrate of Claim 1, wherein the self-assembled monolayer has a thickness of 1 nanometer or less.
Khong teaches (at least page 4852)
A substrate comprising:
wherein the self-assembled monolayer has a thickness of 25 nanometers or less; and
wherein the self-assembled monolayer has a thickness of 1 nanometer or less.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a SAM having an optimized thickness in Asano. The motivation would be through routine experimentation for example, for improved barrier performance as taught by Khong. See MPEP 2144.05.
Claim(s) 7, 8 is/are rejected under 35 U.S.C. 103 as being obvious over Asano as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2023/0420373 (Duong).
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
Asano fails to disclose
7. (Original) The substrate of Claim 1, wherein:
the self-assembled monolayer is a first self-assembled monolayer;
the conductive layer is a first conductive layer; and
comprising (circular):
a glass core comprising the one or more glass layers;
a first stack of layers above the glass core, wherein the first stack of layers includes the first self-assembled monolayer and the first conductive layer, wherein the first self-assembled monolayer is between the glass core and the first conductive layer; and
a second stack of layers below the glass core, wherein the second stack of layers includes a second self-assembled monolayer and a second conductive layer, wherein the second conductive layer comprises copper, and wherein the second self-assembled monolayer is between the glass core and the second conductive layer.
Asano fails to disclose
8. (Original) The substrate of Claim 7, wherein:
one or more conductive traces; and
one or more conductive contacts on a surface
Duong teaches
A substrate comprising:
a glass core 109 comprising the one or more glass layers;
a first stack of layers 112 / 108 / 108A above the glass core 109;
a second stack of layers 111 below the glass core 109; and
one or more integrated circuit dies 114-1 / 114-2 / 114-3;
one or more conductive traces 196; and
one or more conductive contacts 122 on a surface.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a double-sided glass core substrate having stacks of layer, integrated circuit dies, traces, and contacts on the glass substrate having a SAM and a Cu layer in Asano. The motivation would be that a SAM would also improve copper adhesion / seed formation on both sides of a well-known glass package substrate as taught by Duong (teaches one object of the invention is adhesion [0027], [0030]). See MPEP 2144.03.
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Application Publication No. 2005/0011434 (Couillard), 2008/0268280 (Cho), 2015/0359094 (Nitzan), 2023/0102183 (Kulkarni), 2024/0186227 (Chen), Liu et al., “Copper Pattern on Self-Assembled Monolayer Through Microcontact Printing,” J. Nanoscience and Nanotechnology, 2010, Vol. 10, 3072-3077, KR Publication No. 2014-0081249 (Lee) teach package substrates.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.).
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/TERESA M. ARROYO/ Primary Examiner, Art Unit 2893
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